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Contextual Info: M O TO R O LA SEMICONDUCTOR TECHNICAL DATA MCM62110 32K x 9 Bit Synchronous Dual I/O or Separate I/O Fast Static RAM with Parity Checker The M C M 62110 is a 294 ,91 2 b it synchronous static random access m em ory organized as 32,7 68 w ords of 9 bits, fabricated using M otorola’s h ig h -p e rfo r­

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MCM62110 32K x 9 Bit Synchronous Dual I/O or Separate I/O Fast Static RAM with Parity Checker The MCM62110 is a 294,912 bit synchronous static random access memory organized as 32,768 words of 9 bits, fabricated usng Motorola's high-pertormance silicon-gate CMOS technology. The device integrates a 32K x 9 SRAM