6-PIN 33M MARKING Search Results

650R-22

Abstract: ICS650-22 ICS650R-22 ICS650R-22LF ICS650R-22LFT ICS650R-22T
Contextual Info: DATASHEET ICS650-22 PRV AND STB CLOCK SOURCE Description Features The ICS650-22 is a low-cost, low-jitter, high-performance clock synthesizer for personal video recorders PVR and set-top box (STB) applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal

Contextual Info: DATASHEET PRV AND STB CLOCK SOURCE ICS650-22 Description Features The ICS650-22 is a low-cost, low-jitter, high-performance clock synthesizer for personal video recorders PVR and set-top box (STB) applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal

48MVDD

Contextual Info: DATASHEET ICS650-22 PRV AND STB CLOCK SOURCE Description Features The ICS650-22 is a low-cost, low-jitter, high-performance clock synthesizer for personal video recorders PVR and set-top box (STB) applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal

ICS650-22

Contextual Info: DATASHEET ICS650-22 PRV AND STB CLOCK SOURCE Description Features The ICS650-22 is a low-cost, low-jitter, high-performance clock synthesizer for personal video recorders PVR and set-top box (STB) applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal

650R-22

Abstract: ICS650-22
Contextual Info: DATASHEET ICS650-22 PRV AND STB CLOCK SOURCE Description Features The ICS650-22 is a low-cost, low-jitter, high-performance clock synthesizer for personal video recorders PVR and set-top box (STB) applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal

48MVDD

Contextual Info: ICS650-22 PVR and STB Clock Source Description Features The ICS650-22 is a low-cost, low-jitter, high-performance clock synthesizer for personal video recorders PVR and set-top box (STB) applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal input to produce

650R-22

Abstract: ICS650-22 ICS650R-22 ICS650R-22LF ICS650R-22LFT ICS650R-22T ssop junction to ambient resistance
Contextual Info: ICS650-22 PVR and STB Clock Source Description Features The ICS650-22 is a low-cost, low-jitter, high-performance clock synthesizer for personal video recorders PVR and set-top box (STB) applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 27 MHz crystal input to produce

ICS671-15

Abstract: ICS671G-15 ICS671G-15T 671-15
Contextual Info: ICS671-15 ZERO DELAY, LOW SKEW BUFFER Description Features The ICS671-15 is a low-jitter, low-skew, high-performance zero delay buffer ZDB for high-speed applications. The device is designed using ICS’ proprietary low-jitter PLL (Phase-Locked Loop) techniques. The ICS671-15 includes a ZDB bank of

671g

Abstract: ICS671-15 ICS671G-15
Contextual Info: DATASHEET ICS671-15 ZERO DELAY LOW SKEW BUFFER Description Features The ICS671-15 is a low-jitter, low-skew, high-performance zero delay buffer ZDB for high-speed applications. The device is designed using ICS’ proprietary low-jitter PLL (Phase-Locked Loop) techniques. The ICS671-15 includes

48MVDD

Contextual Info: DATA SHEET ICS650-22 ICS650-22 PVR and STB Clock Source SPVR and STB Clock Source Description Features The ICS650-22 is a low-cost, low-jitter, high-performance clock synthesizer for personal video recorders PVR and set-top box (STB) applications. Using analog Phase-Locked Loop (PLL) techniques,

66-M

Abstract: ICS671-15 ICS671G-15 ICS671G-15T
Contextual Info: DATASHEET ICS671-15 ZERO DELAY LOW SKEW BUFFER Description Features The ICS671-15 is a low-jitter, low-skew, high-performance zero delay buffer ZDB for high-speed applications. The device is designed using ICS’ proprietary low-jitter PLL (Phase-Locked Loop) techniques. The ICS671-15 includes

Contextual Info: DATA SHEET ICS671-15 ZERO DELAY, LOW SKEW BUFFER ICS671-15 ZERO DELAY, LOW SKEW BUFFER Description Features The ICS671-15 is a low-jitter, low-skew, high-performance zero delay buffer ZDB for high-speed applications. The device is designed using ICS’ proprietary low-jitter PLL (Phase-Locked Loop)

100mhz crystal decoupling

Abstract: SRX7278 PI6C557-10 clock generator differential output GND33 tdc marking code
Contextual Info: PI6C557-10 Network Clock Generator Product Features Description • 100MHz Differential Output, 33MHz LVCMOS The PI6C557-10 is an integrated 100MHz differential and 33MHz LVCMOS clock generator. It uses a 25MHz quartz crystal to provide an input frequency reference. The high performance internal PLL

Contextual Info: PI6C557-10 Network Clock Generator Product Features Description • 100MHz Differential Output, 33MHz LVCMOS The PI6C557-10 is an integrated 100MHz differential and 33MHz LVCMOS clock generator. It uses a 25MHz quartz crystal to provide an input frequency reference. The high performance internal PLL

Contextual Info: PCS3P7303A General Purpose Peak EMI Reduction IC General Features locks on to it delivering a 1x modulated clock output. PCS3P7303A has a Frequency Selection FS control that facilitates selecting one of the two frequency ranges within the operating frequency range. Refer to the Frequency

Contextual Info: PCS3P7303A General Purpose Peak EMI Reduction IC General Features XIN / CLKIN and locks on to it delivering a 1x modulated clock output. PCS3P7303A has a Frequency Selection FS) control that facilitates selecting one of the two frequency ranges within the operating frequency range.

Contextual Info: PCS3P7303A General Purpose Peak EMI Reduction IC General Features locks on to it delivering a 1x modulated clock output. PCS3P7303A has a Frequency Selection FS control that facilitates selecting one of the two frequency ranges within the operating frequency range. Refer to the Frequency

MR60

Contextual Info: PCS3P7303A General Purpose Peak EMI Reduction IC General Features XIN / CLKIN and locks on to it delivering a 1x modulated clock output. PCS3P7303A has a Frequency Selection FS) control that facilitates selecting one of the two frequency ranges within the operating frequency range.

ICS476EG-08LFT

Abstract: ICS476EG-08LF 476eg08l crystals 4.9152 MHz jc oscillator 24.576
Contextual Info: ICS476E-08 VCXO and Clock Synthesizer for Automotive Description Features The ICS476E-08 is a voltage controlled crystal oscillator VCXO with on-chip phase locked loops (PLLs). It generates five high-quality, HDTV frequency clock outputs from a low-cost, 27 MHz pullable crystal.

PCS3P7303AG

Abstract: onsemi DEVICE CODE BK PCS3P7303
Contextual Info: PCS3P7303A General Purpose Peak EMI Reduction IC General Features locks on to it delivering a 1x modulated clock output. PCS3P7303A has a Frequency Selection FS control that facilitates selecting one of the two frequency ranges within the operating frequency range. Refer to the Frequency

CS5535

Abstract: MK1491-09 marking 09R Power supply for 24V output circuit diagram
Contextual Info: MK1491-09 CS5535 Redcloud/Capistrano Clock Source Description Features The MK1491-09 is a low cost, low jitter, high performance clock synthesizer for National Semiconductor CS5535 based computer and portable appliance applications. Using patented analog Phase-Locked Loop PLL techniques, the

Contextual Info: MK1491-09 National Geode GX2 Clock Source Description Features The MK1491-09 is a low cost, low jitter, high performance clock synthesizer for National Semiconductor’s GeodeTM GX2 processor for information appliance applications. Using patented analog Phase-Locked Loop PLL techniques, the

Contextual Info: PCS3P7303A Product Preview General Purpose Peak EMI Reduction IC Functional Description PCS3P7303A is a versatile, 3.3 V / 2.5 V Peak EMI reduction IC based on Timing−Safet technology. PCS3P7303A accepts an input clock either from a Crystal or from an external reference AC or DC

MARKING 09F

Contextual Info: MK1491-09 AMD Geode GX2 Clock Source Description Features The MK1491-09 is a low-cost, low-jitter, high-performance clock synthesizer for AMD’s Geode-based computer and portable appliance applications. Using patented analog Phased-Locked Loop PLL techniques, the device accepts a 14.318