6 INPUT OR GATE Search Results
6 INPUT OR GATE Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
---|---|---|---|---|---|
MHM411-21 | Murata Manufacturing Co Ltd | Ionizer Module, 100-120VAC-input, Negative Ion | |||
LQW18CN4N9D0HD | Murata Manufacturing Co Ltd | Fixed IND 4.9nH 2600mA POWRTRN | |||
LQW18CNR33J0HD | Murata Manufacturing Co Ltd | Fixed IND 330nH 630mA POWRTRN | |||
DFE322520F-R47M=P2 | Murata Manufacturing Co Ltd | Fixed IND 0.47uH 8500mA NONAUTO | |||
DFE32CAH4R7MR0L | Murata Manufacturing Co Ltd | Fixed IND 4.7uH 2800mA POWRTRN |
6 INPUT OR GATE Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
---|---|---|---|
Contextual Info: TC7MP01FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MP01FK Low-Voltage Triple Gate 6-input AND + 4-input OR + inverter The TC7MP01FK is a high-performance CMOS triple gate (6-input AND + 4-input OR + inverter). Desinged for use in 1.8 V, 2.5 V, or 3.3 V systems, it achieves high-speed operation |
Original |
TC7MP01FK TC7MP01FK | |
Contextual Info: TC7MP01FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MP01FK Low-Voltage Triple Gate 6-input AND + 4-input OR + inverter The TC7MP01FK is a high-performance CMOS triple gate (6-input AND + 4-input OR + inverter). Desinged for use in 1.8 V, 2.5 V, or 3.3 V systems, it achieves high-speed operation |
Original |
TC7MP01FK TC7MP01FK | |
TC7MP01FKContextual Info: TC7MP01FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MP01FK Low-Voltage Triple Gate 6-input AND + 4-input OR + inverter The TC7MP01FK is a high-performance CMOS triple gate (6-input AND + 4-input OR + inverter). Desinged for use in 1.8 V, 2.5 V, or 3.3 V systems, it achieves high-speed operation |
Original |
TC7MP01FK TC7MP01FK | |
TC7MP01FKContextual Info: TC7MP01FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MP01FK Low-Voltage Triple Gate 6-input AND + 4-input OR + inverter The TC7MP01FK is a high-performance CMOS triple gate (6-input AND + 4-input OR + inverter). Desinged for use in 1.8 V, 2.5 V, or 3.3 V systems, it achieves high-speed operation |
Original |
TC7MP01FK TC7MP01FK | |
TC7MP01FKContextual Info: TC7MP01FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MP01FK Low-Voltage Triple Gate 6-input AND + 4-input OR + inverter The TC7MP01FK is a high-performance CMOS triple gate (6-input AND + 4-input OR + inverter). Desinged for use in 1.8 V, 2.5 V, or 3.3 V systems, it achieves high-speed operation |
Original |
TC7MP01FK TC7MP01FK | |
TTL 7486
Abstract: 7486 7486 TTL chip 7486 7486 gate 9N86/7486 9n86 TTL 7486 fairchild TTL family 7486 FAIRCHILD
|
OCR Scan |
9N86/5486, 9N86/7486 9N86/5486 TTL 7486 7486 7486 TTL chip 7486 7486 gate 9N86/7486 9n86 TTL 7486 fairchild TTL family 7486 FAIRCHILD | |
74hct386Contextual Info: GD54/74HC386, GD54/74HCT386 QUAD 2-INPUT EXCLUSIVE OR GATES General Description These devices are identical in pinout to the 5 4 /7 4 L S 3 8 6 . They contain four independent 2-input Exclusive OR gates. The HC/HCT 3 8 6 are electrically identical to the HC/HCT 8 6 , However, |
OCR Scan |
GD54/74HC386, GD54/74HCT386 GD74HCT386 GD54HCT386 74hct386 | |
Contextual Info: £3 National m M Semiconductor 54AC/74AC86 Quad 2-Input Exclusive-OR Gate General Description Features The ’AC 8 6 contains four, • Ice reduced by 50% ■ Outputs source/sink 24 mA ■ Standard Military Drawing SMD — ’AC 8 6 : 5962-89550 2 -input exdusive-OR gates. |
OCR Scan |
54AC/74AC86 | |
SN54136
Abstract: SDLS048 LS136 SN54LS136 SN74136 SN74LS136
|
OCR Scan |
SDLS048 SN54136, SN54LS136, SN74136, SN74LS136 SN54LS136 SN74136 SN74LS136 SN54136 SDLS048 LS136 SN54LS136 SN74136 | |
Contextual Info: 74AUP2G86 Low-power dual 2-input EXCLUSIVE-OR gate Rev. 6 — 8 December 2011 Product data sheet 1. General description The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
Original |
74AUP2G86 74AUP2G86 | |
Contextual Info: 74AUP1G386 Low-power 3-input EXCLUSIVE-OR gate Rev. 6 — 31 July 2012 Product data sheet 1. General description The 74AUP1G386 provides a single 3-input EXCLUSIVE-OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall |
Original |
74AUP1G386 74AUP1G386 | |
ic 74LS266Contextual Info: SN54LS266, SN74LS266 QUADRUPLE 2-INPUT EXCLUSIVE NOR GATES WITH OPEN COLLECTORS OUTPUTS DECEMBER 1972 - REVISED MARCH 1988 • Can Be Used as a 4-Bit Digital Comparator SN 5 4 L S 2 6 6 . . . J OR W PACKAG E SN 7 4LS2 66 . . . D OR N PACKAG E Input Clamping Diodes Simplify System |
OCR Scan |
SN54LS266, SN74LS266 ic 74LS266 | |
74LVQ86
Abstract: 74LVQ86SC 74LVQ86SCX 74LVQ86SJ 74LVQ86SJX M14A
|
OCR Scan |
74LVQ86 LVQ86 MIL-STD-883 TL/F/11348-1 TL/F/11348-2 74LVQ86 74LVQ86SC 74LVQ86SCX 74LVQ86SJ 74LVQ86SJX M14A | |
74LVX86
Abstract: 74LVX86M 74LVX86MTCX 74LVX86MX 74LVX86SJ 74LVX86SJX M14A
|
OCR Scan |
74LVX86 LVX86 TL/F/11605â TL/F/11605-1 74LVX86 DDfi50Sb 74LVX86M 74LVX86MTCX 74LVX86MX 74LVX86SJ 74LVX86SJX M14A | |
|
|||
VM MARKING CODE SOT353
Abstract: hct1g32
|
Original |
74HC1G32; 74HCT1G32 74HC1G32 74HCT1G32 74HC32 74HCT32. OT353-1 OT753 74HC1G32GW 74HCT1G32GW VM MARKING CODE SOT353 hct1g32 | |
HEF4072BT
Abstract: HEF4072B HEF4072BD HEF4072BP
|
OCR Scan |
HEF4072B 51j9ljà 7Z69503 HEF4072BP 14-lead OT27-1) HEF4072BD HEF4072BT | |
W950Contextual Info: HEF4072B \ ^ _ gates_ DUAL 4-INPUT OR GATE The HEF4072B provides the positive dual 4-input OR function. The outputs n n fu lly buffered for highest noise immunity and pattern insensitivity of output impedance. V DD 0 2 D *8 I7 h ]6 n.c. HEF4072B |
OCR Scan |
HEF4072B HEF4072B HEF4072BP 14-lead OT27-1) HEF4072BD HEF4072BT W950 | |
74HC2G32
Abstract: 74HC2G32DC 74HC2G32DP 74HCT2G32 74HCT2G32DC 74HCT2G32DP JESD22-A114E
|
Original |
74HC2G32; 74HCT2G32 74HC2G32 74HCT2G32 JESD22-A114E JESD22-A115-A HCT2G32 74HC2G32DC 74HC2G32DP 74HCT2G32DC 74HCT2G32DP | |
74HC
Abstract: 74HC1G86 74HC1G86GV 74HC1G86GW 74HCT1G86 74HCT1G86GV 74HCT1G86GW
|
Original |
74HC1G86; 74HCT1G86 74HC1G86 74HCT1G86 74HC/HCT86. OT353-1 OT753 HCT1G86 74HC 74HC1G86GV 74HC1G86GW 74HCT1G86GV 74HCT1G86GW | |
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC10E101 M C100E101 • 500 ps Max. Propagation Delay • Extended 100E Vgg Range o f - 4 .2 V to -5 .4 6 V • 75 k il Input P ulldow n Resistors The MC10E/100E101 Is a quad 4-input OR/NOR gate. QUAD 4-INPUT OR/NOR GATE |
OCR Scan |
MC10E101 C100E101 MC10E/100E101 28-LEAD | |
Contextual Info: 74HC2G86; 74HCT2G86 Dual 2-input exclusive-OR gate Rev. 03 — 7 May 2009 Product data sheet 1. General description The 74HC2G86 and 74HCT2G86 are high-speed Si-gate CMOS devices. They provide two 2-input exclusive-OR gates. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V. |
Original |
74HC2G86; 74HCT2G86 74HC2G86 74HCT2G86 JESD22-A114E JESD22-A115-A HCT2G86 | |
hct nxp
Abstract: 74HCT2G86DC 74HCT2G86DP JESD22-A114E 74HC2G86 74HC2G86DC 74HC2G86DP 74HCT2G86
|
Original |
74HC2G86; 74HCT2G86 74HC2G86 74HCT2G86 JESD22-A114E JESD22-A115-A HCT2G86 hct nxp 74HCT2G86DC 74HCT2G86DP 74HC2G86DC 74HC2G86DP | |
Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 5 — 6 December 2011 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. |
Original |
74AUP2G32 74AUP2G32 | |
Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 6 — 5 June 2012 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. |
Original |
74AUP2G32 74AUP2G32 |