6 INPUT OR GATE Search Results

74hct386

Contextual Info: GD54/74HC386, GD54/74HCT386 QUAD 2-INPUT EXCLUSIVE OR GATES General Description These devices are identical in pinout to the 5 4 /7 4 L S 3 8 6 . They contain four independent 2-input Exclusive OR gates. The HC/HCT 3 8 6 are electrically identical to the HC/HCT 8 6 , However,

SN54136

Abstract: SDLS048 LS136 SN54LS136 SN74136 SN74LS136
Contextual Info: SN54136, SN54LS136, SN74136, SN74LS136 QUADRUPLE 2-INPUT EXCLUSIVE OR GATES WITH OPEN-COLLECTOR OUTPUTS SDLS048 DECEMBER 1972 - REVISED MARCH 1988 S N 5 4 1 3 6 , S N 5 4 L S 1 3 6 . , . J OR W PACKAGE S N 7 4 1 3 6 . . . N PACKAGE S N 74LS 13 6 . . . D OR N PACKAGE

ic 74LS266

Contextual Info: SN54LS266, SN74LS266 QUADRUPLE 2-INPUT EXCLUSIVE NOR GATES WITH OPEN COLLECTORS OUTPUTS DECEMBER 1972 - REVISED MARCH 1988 • Can Be Used as a 4-Bit Digital Comparator SN 5 4 L S 2 6 6 . . . J OR W PACKAG E SN 7 4LS2 66 . . . D OR N PACKAG E Input Clamping Diodes Simplify System

74LVQ86

Abstract: 74LVQ86SC 74LVQ86SCX 74LVQ86SJ 74LVQ86SJX M14A
Contextual Info: LVQ86 National Semiconductor 74LVQ86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVQ8 6 contains four, 2-input exclusive-OR gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and

74HC1G32GW

Abstract: 74HC1G32 74HC 74HC1G32GV 74HC32 74HCT1G32 74HCT1G32GV 74HCT1G32GW 74HCT32
Contextual Info: 74HC1G32; 74HCT1G32 2-input OR gate Rev. 05 — 14 March 2008 Product data sheet 1. General description 74HC1G32 and 74HCT1G32 are high-speed Si-gate CMOS devices. They provide a 2-input OR function. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.

74HC2G32

Abstract: 74HC2G32DC 74HC2G32DP 74HCT2G32 74HCT2G32DC 74HCT2G32DP JESD22-A114E
Contextual Info: 74HC2G32; 74HCT2G32 Dual 2-input OR gate Rev. 03 — 12 May 2009 Product data sheet 1. General description The 74HC2G32 and 74HCT2G32 are high-speed Si-gate CMOS devices. They provide two 2-input OR gates. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.

74HC

Abstract: 74HC1G86 74HC1G86GV 74HC1G86GW 74HCT1G86 74HCT1G86GV 74HCT1G86GW
Contextual Info: 74HC1G86; 74HCT1G86 2-input EXCLUSIVE-OR gate Rev. 04 — 20 July 2007 Product data sheet 1. General description 74HC1G86 and 74HCT1G86 are high-speed Si-gate CMOS devices. They provide a 2-input EXCLUSIVE-OR function. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC10E101 M C100E101 • 500 ps Max. Propagation Delay • Extended 100E Vgg Range o f - 4 .2 V to -5 .4 6 V • 75 k il Input P ulldow n Resistors The MC10E/100E101 Is a quad 4-input OR/NOR gate. QUAD 4-INPUT OR/NOR GATE

hct nxp

Abstract: 74HCT2G86DC 74HCT2G86DP JESD22-A114E 74HC2G86 74HC2G86DC 74HC2G86DP 74HCT2G86
Contextual Info: 74HC2G86; 74HCT2G86 Dual 2-input exclusive-OR gate Rev. 03 — 7 May 2009 Product data sheet 1. General description The 74HC2G86 and 74HCT2G86 are high-speed Si-gate CMOS devices. They provide two 2-input exclusive-OR gates. The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.

Contextual Info: SN54AC86, SN74AC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCAS533B – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D SN54AC86 . . . J OR W PACKAGE SN74AC86 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 9 ns at 5 V

Contextual Info: SN54AC86, SN74AC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCAS533B – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D SN54AC86 . . . J OR W PACKAGE SN74AC86 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 9 ns at 5 V

AC86

Abstract: ti AC86 SN54AC86 SN74AC86 SN74AC86D SN74AC86DBR SN74AC86DR SN74AC86N SN74AC86NSR SN74AC86PWR
Contextual Info: SN54AC86, SN74AC86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCAS533B – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D SN54AC86 . . . J OR W PACKAGE SN74AC86 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 9 ns at 5 V

74LVC2G32

Abstract: 74LVC2G32DC 74LVC2G32DP 74LVC2G32GM 74LVC2G32GT JESD22-A114E MO-187
Contextual Info: 74LVC2G32 Dual 2-input OR gate Rev. 07 — 6 June 2008 Product data sheet 1. General description The 74LVC2G32 provides a 2-input OR gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

74LS51 truth table

Abstract: 74ls51 4 inputs OR gate truth table truth table SN54LSXXJ SN74LSXXN SN74LSXXD truth table NOT gate 74 751A-02
Contextual Info: SN54/74LS51 DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE DUAL 2-WIDE 2-INPUT/ 3-INPUT AND-OR-INVERT GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 2 3 4 5 6 1 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02

74LS386P

Contextual Info: MITSUBISHI LSTTLs M74LS386P QUADRUPLE 2-IN P U T EXCLUSIVE OR GATE DESCRIPTION The M 7 4 L S 3 8 6 P is a semiconductor circuit containing four integral circuits configured into dual input exclusive OR gates. FEATURES • Capable o f withstanding high input voltages V , ^ 1 5 V

751A-02

Abstract: H12Y 74f51
Contextual Info: MC54/74F51 DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATE CONNECTION DIAGRAM VCC 1C 1B 1F 1E 1D 1Y 14 13 12 11 10 9 8 DUAL 2-WIDE 2-INPUT, 2-WIDE 3-INPUT AND-OR-INVERT GATE FAST SCHOTTKY TTL 1 2 3 4 5 6 7 1A 2A 2B 2C 2D 2Y GND J SUFFIX CERAMIC CASE 632-08

Contextual Info: MC10117L IL08 ECL 2-WIDE 2-3-INPUT OR-AND/OR-AND-INVERT GATE —TOP VIEW— 16 GND GND 1 15 14 13 12 11 10 9 2 3 4 5 6 7 VEE 8

Contextual Info: NB3H83905C 1.8V/2.5V/3.3V Crystal Input to 1:6 LVTTL/LVCMOS Clock Fanout Buffer with OE Description The NB3H83905C is a 1.8 V, 2.5 V or 3.3 V VDD core Crystal input to 1:6 LVTTL/LVCMOS fanout buffer with outputs powered by flexible 1.8 V, 2.5 V, or 3.3 V supply VDDO with VDD w VDDO . The

74LS86 gate diagram

Abstract: 74LS86 GATE 74ls86 pin diagram l74ls86 pin diagram of 74ls86
Contextual Info: SANYO SEM ICONDUCTOR COUP ' 12 E D I 7Ti707ti DDDSbTa 7 T -V 3 -^ / LC74HC86M* t CMOS High-Speed Standard Logic LC74HC Series 3034A Quad 2-Input Exclusive OR Gate 2187. , Features • T he L C 7 4 H C 8 6 M consists of 4 identical 2-input exctusive-OR gates.

ic 74ls86

Abstract: 74LS86 pin configuration ic
Contextual Info: GD54/74LS86 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES Description Pin Configuration This device contains four independent 2-input Exclusive-OR gates. It performs the Boolean func­ tions Y = A B = A B + A B in positive logic. 1 1A 2 1B 3 1V 4 5 6 7 2A 2B 2Y

74136

Abstract: SN54136
Contextual Info: SN54136, SN54LS136, SN74136. SN74LS136 QUADRUPLE 2 INPUT EXCLUSIVE OR GATES WITH OPEN COLLECTOR OUTPUTS DECEMBER 1 9 7 2 - SN 54136, SN 5 4 L S 1 3 6 . . . J OR W PACKAG E SN74136 . N PACKAG E SN 7 4 L S 1 3 6 . . . D OR N PACKAG E F U N C T IO N T A B L E

Contextual Info: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529C – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE

Contextual Info: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529C – AUGUST 1995 – REVISED SEPTEMBER 2002 D D D 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 6.5 ns at 5 V SN54AC10 . . . J OR W PACKAGE SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE

Contextual Info: IR43x1 Features Product Summary Integrated analog input Class D audio amplifier in a small 5 x 6 mm PQFN package High peak music power output No mechanical heatsink required Split or single power supply Differential or single-ended input Over-current, over-temperature and under