5V INPUT 3V OUTPUT Search Results

Contextual Info: CD74LPT16646 Semiconductor December 1996 Fast CMOS 3 .3V 16-Bit Registered Transceiver Description Features • Compatible with LCX Families of Products • Supports 5V Tolerant Mixed Signal Mode Operation • Input Can Be 3V or 5V • Output Can Be 3V or Connected to 5V Bus

PVDI

Abstract: pv0d
Contextual Info: Configuration of 3V/5V Input/Output Cells Overview This document describes the configuration of the pad ring of a device containing a mixture of 3V and 5V input/output cells for the Atmel 0.5 and 0.35 micron triple-layer metal processes. Note that the supply voltage referred to in this application note as 3V

74LVX00

Abstract: 74LVX00M 74LVX00MTC 74LVX00SJ LVX00 M14A M14D MTC14
Contextual Info: 74LVX00 Low Voltage Quad 2-Input NAND Gate Features General Description • Input voltage level translation from 5V to 3V The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

Contextual Info: CD74LPT16952 Semiconductor Fast CMOS 3.3V 16-Bit Registered Transceiver December 1996 Description Features • Compatible with LCX Families of Products • Supports 5V Tolerant Mixed Signal Mode Operation - Input Can Be 3V or 5V • Output Can Be 3V or Connected to 5V Bus

Contextual Info: ù PERICOM Fast CMOS 3.3V 16-Bit Bidirectional Transceiver Product Features: • Compatible with LCX and LVT™ families of products • Supports 5V Tolerant Mixed Signal Mode Operation - Input can be 3V or 5V - Output can be 3V or connected to 5V bus

74LVX00

Abstract: 74LVX00M 74LVX00MTC 74LVX00SJ LVX00 M14A M14D MTC14
Contextual Info: Revised March 1999 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX00

Abstract: 74LVX00M 74LVX00MTC 74LVX00MTCX 74LVX00MX 74LVX00SJ LVX00 M14A M14D MTC14
Contextual Info: Revised February 2005 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02MTCX 74LVX02SJ M14A M14D MTC14
Contextual Info: Revised February 2005 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX08

Abstract: 74LVX08M 74LVX08MTC 74LVX08MTCX 74LVX08SJ LVX08 M14A M14D MTC14
Contextual Info: Revised February 2005 74LVX08 Low Voltage Quad 2-Input AND Gate General Description Features The LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86SJ M14A M14D MTC14
Contextual Info: 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. n Input voltage level translation from 5V to 3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86SJ M14A M14D MTC14
Contextual Info: 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate Features General Description • Input voltage level translation from 5V to 3V The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02SJ M14A M14D MTC14
Contextual Info: Revised March 1999 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

lvx08

Abstract: 74LVX08 74LVX08M 74LVX08MTC 74LVX08SJ M14A M14D MTC14
Contextual Info: Revised March 1999 74LVX08 Low Voltage Quad 2-Input AND Gate General Description Features The LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

LVX32

Contextual Info: Revised February 2005 74LVX32 Low Voltage Quad 2-Input OR Gate General Description Features The LVX32 contains four 2-input OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

Contextual Info: Ù PERICOM Fast CMOS 3.3V 16-Bit Registered Transceivers Product Features: Product Description: • Compatible with LCX and LVT™ families of products • Supports 5V Tolerant Mixed Signal Mode Operation - Input can be 3V or 5V - Output can be 3V or connected to 5V bus

PI74LPT16373

Contextual Info: PI74LPT16373 Fast CMOS 3.3V 16-Bit Transparent Latch Features Description • Compatible with LCX and LVT™ families of products • Supports 5V Tolerant Mixed Signal Mode Operation – Input can be 3V or 5V – Output can be 3V or connected to 5V bus

H2A-7H

Abstract: 1a8h PU 54 111 X
Contextual Info: ù PERICOM Fast CMOS 3.3V 20-Bit Buffers Product Description: Product Features: • Compatible with LCX and LVT™ families of products • Supports 5V Tolerant Mixed Signal Mode Operation - Input can be 3V or 5V - Output can be 3V or connected to 5V bus

74LVX02

Abstract: 74LVX02M 74LVX02MTC 74LVX02MTCX 74LVX02MX 74LVX02SJ 74LVX02SJX M14A M14D 116002
Contextual Info: LVX02 National Semiconductor 74LVX02 Low Voltage Quad 2-Input NOR Gate General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tems to 3V systems. • Input voltage level translation from 5V to 3V

Contextual Info: Revised September 2003 74LVX02 Low Voltage Quad 2-Input NOR Gate ‘ General Description Features The LVX02 contains four 2-input NOR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86SJ M14A M14D MTC14
Contextual Info: Revised March 1999 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX00

Abstract: 74LVX00M 74LVX00MTC 74LVX00MTCX 74LVX00MX 74LVX00SJ 74LVX00SJX M14A M14D
Contextual Info: LVXOO National Semiconductor 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVXOO contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tems to 3V systems. • Input voltage level translation from 5V to 3V

2N3866 MOTOROLA

Abstract: LT1719 so-8 2N3866 pin diagram 2N3866 MOTOROLA s parameters 1N5711 2N3866 LT1719 LT1719CS8 LT1719IS8 TC02
Contextual Info: LT1719 4.5ns Single/Dual Supply 3V/5V Comparator with Rail-to-Rail Output U FEATURES • ■ ■ ■ ■ ■ ■ DESCRIPTIO UltraFast: 4.5ns at 20mV Overdrive 7ns at 5mV Overdrive Low Power: 4.2mA at 3V Separate Input and Output Power Supplies Output Optimized for 3V and 5V Supplies

Contextual Info: PI74LPT16244 3.3V, 16-Bit Buffer/Line Driver Features Description • Compatible with LCX and LVT families of products • Supports 5V Tolerant Mixed Signal Mode Operation – Input can be 3V or 5V – Output can be 3V or connected to 5V bus • Advanced Low Power CMOS Operation

Contextual Info: PI74LPT16244 3.3V, 16-Bit Buffer/Line Driver Features Description • Compatible with LCX and LVT families of products • Supports 5V Tolerant Mixed Signal Mode Operation – Input can be 3V or 5V – Output can be 3V or connected to 5V bus • Advanced Low Power CMOS Operation