54967ASP Search Results
54967ASP Datasheets Context Search
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Contextual Info: DESCRIPTION PIN CONFIGURATION The 54967ASP is a semiconductor integrated circuit con VIEW PACKAGE 20-PIN SHRINK DIP sisting of an oxide-film separated E C L /I2L PLL frequency TEST INPUT J E S T synthesizer. A prescaler and PLL capable of operating at a |
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M54967ASP 20-PIN 1000MHz 54967ASP |