512 KBIT STATIC RAM Search Results

Contextual Info: CYM1821 — 16K x 32 Static RAM Module CYPRESS ^ SEMICONDUCTOR Features Functional Description • High-density 512-Kbit SRAM module The CYM1821 is a high-performance 512-Kbit static RAM module organized as 16K words by 32 bits. This module is con­ structed from eight 16K x 4 SRAM SOJ

Contextual Info: This is a partial data sheet. F or com plete data sheet, see Section 8, Modules. CYM1821 s CYPRESS SEMICONDUCTOR 16K x 32 Static RAM Module Features Functional Description • High-density 512-kbit SRAM module T he CYM1821 is a high-performance 512-kbit static RAM module organized as

CYM1821PZ-15C

Contextual Info: CYM1821 5f CYPRESS 16K x 32 Static RAM Module Features Functional Description • High-dcnsity 512-Kbit SRAM module The CYM1821 is a high-performance 512-Kbit static RAM module organteed as 16K words by 32 bits. This module is con­ structed from eight 16K x 4 SRAM SOJ

Contextual Info: CY7C1020D 512-Kbit 32 K x 16 Static RAM 512-Kbit (32 K × 16) Static RAM Features • Pin- and function-compatible with CY7C1020B ■ High speed ❐ tAA ■ = 10 ns Low active power ❐ ICC ■ consumption when deselected.The input and output pins (IO0 through IO15) are placed in a high-impedance state when:

Contextual Info: CY7C1020D 512-Kbit 32 K x 16 Static RAM 512-Kbit (32 K × 16) Static RAM Features • Pin- and function-compatible with CY7C1020B ■ High speed ❐ tAA ■ = 10 ns Low active power ❐ ICC ■ consumption when deselected.The input and output pins (IO0 through IO15) are placed in a high-impedance state when:

Contextual Info: CYM1822 € SEMICONDUCTOR 16K x 32 Static RAM Module with Separate I/O Features Functional Description • High-density 512K-bit SRAM module The CYM1822 is a high-performance 512-kbit static RAM module organized as 16K words by 32 bits. This module is con­

Contextual Info: _CYM1822 T SEMICONDUCTOR 16K x 32 Static RAM Module with Separate I/O Features Functional D escription • High-density 512K-bit SRAM module The CYM1822 is a high-performance 512-kbit static RAM module organized as 16K words by 32 bits. This module ¡»con­

cym1821PZ-25C

Abstract: CYM1821 182112 CYM1821PZ-15C
Contextual Info: fax id: 2010 1CY M18 21 CYM1821 16K x 32 Static RAM Module Features • High-density 512-Kbit SRAM module • 32-bit standard footprint supports densities from 16K x 32 through 1M x 32 • High-speed CMOS SRAMs — Access time of 12 ns • Low active power

Contextual Info: bSE D CYPRESS SEM ICO ND UC TOR • SSB^bbE ODIDIDI bTb « C Y P CYM1821 CYPRESS SEMICONDUCTOR 16K x 32 Static RAM Module Features Functional Description • High-density 512-Kbit SRAM module • High-speed CMOS SRAMs — Access time of 12 ns • Low active power

PM12C

Contextual Info: fax id: 20 10 CYM1821 16K x 32 Static RAM Module Features • High-density 512-Kbit SRAM module • 32-bit standard footprint supports densities from 16K x 32 through 1M x 32 • High-speed CMOS SRAMs constructed from eight 16K x 4 SRAM SOJ packages mount­

k 1821

Abstract: A10C CYM1821 CYM1821PZ-15C jedec 64-pin simm a30c5
Contextual Info: CYM1821 ^ CYPRESS 16K x 32 Static RAM Module Features F unctional D escription • High-dcnsity 512-Kbit SRAM module • 32-bit standard footprint supports densities from 16K x 32 through 1M x 32 • High-speed CMOS SRAMs — Access time of 12 ns • Low active power

Contextual Info: CY7C1020CV26 512-Kbit 32 K x 16 Static RAM Features Writing to the device is accomplished by taking chip enable (CE) and write enable (WE) inputs LOW. If byte low enable (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0

HMNR5128D

Abstract: 1N5817 HMN5128D HMN5128DV MBRS120T3
Contextual Info: HANBit HMNR5128D V 5.0 or 3.3V, 4 Mbit (512 Kbit x 8) TIMEKEEPER NVSRAM Part No. HMNR5128D(V) GENERAL DESCRIPTION The HMNR5128D(V) TIMEKEEPER SRAM is a 512Kb x 8 non-volatile static RAM and real time clock organized as 524,280 words by 8 bits. The special DIP package provides a fully integrated battery back-up memory and real time clock

Contextual Info: _CYM1821 SEMICONDUCTOR 16K x 32 Static RAM Module Features Functional Description • High'density 512-kbit SRAM module • High-speed CMOS SRAMs — Access time o f 12 ns T h e C Y M 1 8 2 1 is a h ig h -p e rfo rm a n c e 51 2 -K b it s ta tic R A M m o d u le o rg a n iz e d as

SST30VR041

Abstract: SST30VR043 SST31LF041A
Contextual Info: 4 Mbit ROM + 1 Mbit / 256 Kbit SRAM ROM/RAM Combo SST30VR041 / SST30VR043 Data Sheet SST30VR041 / 0434Mb Mask ROM x8 + 1Mb / 256Kb SRAM (x8) Combo FEATURES: • ROM + SRAM ROM/RAM Combo – SST30VR041: 512K x8 ROM + 128K x8 SRAM – SST30VR043: 512K x8 ROM + 32K x8 SRAM

SST30VR041

Abstract: SST30VR043 SST31LF041A 128k x8 SRAM TSOP
Contextual Info: 4 Mbit ROM + 1 Mbit / 256 Kbit SRAM ROM/RAM Combo SST30VR041 / SST30VR043 Data Sheet SST30VR041 / 0434Mb Mask ROM x8 + 1Mb / 256Kb SRAM (x8) Combo FEATURES: • Low Power Dissipation: – Standby: 1.0 µW (Typical) – Operating: 3.0 mW (Typical) • Fully Static Operation

32-PIN

Abstract: SST30VR041 SST30VR043 SST31LF041A cl381
Contextual Info: 4 Mbit ROM + 1 Mbit / 256 Kbit SRAM ROM/RAM Combo SST30VR041 / SST30VR043 Preliminary Specifications SST30VR041/0434 Mb Mask ROM x8 + 1 Mb / 256 Kbit SRAM (x8) Combo FEATURES: • ROM + SRAM ROM/RAM Combo – SST30VR041: 512K x8 ROM + 128K x8 SRAM – SST30VR043: 512K x8 ROM + 32K x8 SRAM

gcu 101

Abstract: SED1351FOA gcu 101 Circuit diagram gcu 101 connection diagram gcu 101 setting manual SED1351F SED1351 SED1351F0A Application of 8088 mpu GLC 555
Contextual Info: SEDI 351 SED1351 GRAPHICS LCD CONTROLLER DESCRIPTION The SED1351F is a graphics LCD controller capable of controlling medium to large resolution displays. It transfers data from MPU to external frame buffer RAM and converts this data to display signals for LCD

5768MV

Abstract: MAX 1532 ULTRA HIGH SPEED FREQUENCY DIVIDER 5512MV 5000MX Ternary CAM
Contextual Info: E X P A N D E D Non-Volatile Instant-On Infinitely Reconfigurable P R O G R A M M A B L E L O G I C D E V I C E S ispXPLD 5000MX Ultimate ispXP Flexibility The ispXPLD™ 5000MX family represents a new class of devices from Lattice Semiconductor called eXpanded

Contextual Info: S G S -T H O M S O N STU2071 4B3T U INTERFACE CIRCUIT PRELIMINARY DATA 4B3T TWO-WIRE U INTERFACE CIRCUIT FOR LT AND NT APPLICATION 120 kbaud LINE SYMBOL RATE 120 SYM­ BOLS PER FRAME SCRAMBLER AND DESCRAMBLER AC­ CORDING TO CCITT REC V.29 BARKER CODE (11 SYMBOLS) SYNCHRO­

TIC 2460

Abstract: i8088 ZZ13 14503B SMOS 1351F SED1351F0A
Contextual Info: SEDI 351 SED1351 GRAPHICS LCD CONTROLLER • DESCRIPTION The SED1351F is a graphics LCD controller capable of controlling medium to large resolution displays. It transfers data from MPU to external frame buffer RAM and converts this data to display signals for LCD

MPC5644C

Abstract: e200z4d
Contextual Info: Freescale Semiconductor Product Brief Document Number: MPC5646CPB Rev. 4, 12/2011 MPC5646C Microcontroller Product Brief 32-bit MCU built on the Power Architecture embedded category for automotive body electronics applications Contents 208-pin LQFP 28 mm x 28 mm

MPC5646C

Abstract: MPC5645 e200z4d MPC5644B MPC5645B MPC5644C MPC5645C MPC5646B MPC5646c freescale e200z4
Contextual Info: Freescale Semiconductor Product Brief Document Number: MPC5646CPB Rev. 2.1, 02/2011 This document contains preview information on a new product that may be in a design phase or under development. Freescale reserves the right to change or discontinue this product without notice.

chn 723

Abstract: TSMC 180nm dual port sram chn 448 CHN 727 chn 501 chn 711 CHN 450 TSMC 180nm single port sram tsmc 180nm sram TSMC 180nm
Contextual Info: CS4100 TM ADPCM Speech Coders Virtual Components for the Converging World The CS4100 family of adaptive differential pulse code modulators ADPCMs is designed to provide high performance solutions for a broad range of applications requiring speech compression and decompression.