5011 F1 Search Results

86092645113755000E1

Abstract: 5159.035.32.12.93.11 RPI43G20R5G00 PI43G2RTA10P1
Contextual Info: DIN 41612 Index of catalogue numbers References 3013.M.10.C1 5011.C4 5011.E5.8.Y3.13.A 5011.E5.8.Y3.23.A 5011.E6.8.Y3.13.A 5011.E6.8.Y3.23.A 5011.F1.8.V1.13.B/H 5011.F1.8.V1.23.B/H 5011.F2.8.V1.12 5011.F2.8.V1.22 5011.P 5042.MP.1441.N0.14 5042.MP.1441.N0.24

Contextual Info: Power module, right angle female 5011 series 5011.F1.8.V1.X3.H 5011.F1.8.V1.X3.B . 600 5 .0 6 (.200 ) n T - 0- D- IT | 0,6x1.51.024X.059I 34, 98 ( 1.377 ) 30 . 48 ( 1. 2 0 0 ) ' ) (.6 0 0 5 .0 8 (.2 0 0 ) 5011 *2.5 7 ( .098) F18V1.H 93-41 , 20 .4

Contextual Info: DIN 41612 Power module, pin header 5011 series without individual polarization 5011.E5.8.Y3.x3.A with individual polarization 5011.E6.8.Y3.x3.A Performance class / plating • DIN 41612 class I: replace x by 2 in part number. • DIN 41612 class II: replace x by 1 in part

din 41612 FCI Connector

Abstract: vg 95324 222H Framatome Connectors 96 DIN 41612 connector Framatome Connectors 2 x 25 5011 F1 5011p bt 04 600 PTT177
Contextual Info: Power module, right angle female 5011 series 5011.F1.8.V1.X3.H 5011.F1.8.V1.X3.B 1 5 .2 4 .6 0 0 (.6 0 0 ) 5 .0 6 (.200 ) ( . 200) fc-o-Jf 1111 •É— - T 0 D r Il 0 .6 x 1 . 5 1 . 024X .0 5 9 ) -0 .6 x 1 .5 (. 024x. 059) 3 4 , 98 ( 1 . 3 7 7 ) 3 4 . 98 ( 1 .3 7 7 )

Contextual Info: 100113 National Semiconductor F100113 Quad Driver General Description The F100113 is a monolithic quad driver with two OR and two NOR outputs and common enable. The common input is buffered to minimize input loading. If the D inputs are not used the Enable can be used to drive sixteen 5011 lines. All

100114DC

Contextual Info: 100114 Egl National Sim Semiconductor F100114 Quint Differential Line Receiver General Description The F100114 is a monolithic quint differential line receiver with emitter-follower outputs. An internal reference supply VBB is available for single-ended reception. When used in

Contextual Info: National ÆjA Semiconductor F100107 Quint Exclusive OR/NOR Gate General Description Re' r'° ,h! F100307datasheetfor: POO Packaging The F100107 is monolithic quint exclusive-OR/NOR gate. The Function output is the wire-OR of all five exclusive-OR Lower Power

F100150

Abstract: F100350
Contextual Info: l 100150 f jg J \ N a tio n a l M S e m ic o n d u c to r F100150 Hex D Latch General Description The F100150 contains six D-type latches with true and com­ plement outputs, a pair of common Enables Ea and Eb , and a common Master Reset (MR). A Q output follows its_D

Contextual Info: 100104 O T National ÆM Semiconductor F100104 Quint AND/NAND Gate General Description The F100104 is monolithic quint AND/NAND gate. The Function output is the wire-NOR of all five AND gate out­ puts. All inputs have 50 k il pull-down resistors. Refer to the F100304 datasheet for:

Contextual Info: National ÆSA Semiconductor F100131 Triple D Flip-Flop General Description The F100131 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Com­ mon Clock CPc , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct

D2322

Abstract: 100118
Contextual Info: 100118 Zgjk National ÆSASemiconductor F100118 5-Wide 5, 4, 4, 4, 2 OA/OAI Gate General Description The F100118 is a monolithic 5-wide 5, 4, 4, 4, 2 OR/AND gate with true complementary outputs. All inputs have 50 k il pull-down resistors and all outputs are buttered.

100180dc

Abstract: BIT 3195 G
Contextual Info: F100180 High-Speed 6-Bit Adder General Description The F 100180 is a high-speed 6-bit adder capable of per­ forming a full 6 -bit addition of two operands. Inputs for the adder are active-LOW Carry, Operand A, and Operand B; outputs are Function, active-LOW Carry Generate, and ac­

SE 5011

Contextual Info: F100151 HEX D FLIP-FLOP F100K S E R IE S E C L DESCRIPTION— The F100151 contains six master/slave flip-flops with True and LO GIC SYMBOL Complement outputs. A pair of Common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa and CPb are LOW and

Contextual Info: National 221 Semiconductor F100122 9-Bit Buffer General Description The F100122 is a monolithic 9-bit buffer. The device con­ tains nine non-inverting buffer gates with single input and output. All inputs have 50 kft pull-down resistors and all outputs are buffered.

Contextual Info: 100151 National Semiconductor F100151 Hex D Flip-Flop General Description The F100151 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa and

Contextual Info: F100126 9-Bit Backplane Driver General Description The F100126 contains nine independent, high-speed, buffer gates each with a single input and a single output. The gates are non-inverting. These buffers are useful in bus-oriented systems where minimal output loading or bus isola­

100171dc

Contextual Info: 100171 National Semiconductor F100171 Triple 4-Input Multiplexer with Enable General Description The F100171 contains three 4-inpul multiplexers which share a common decoder inputs So and S ^ . Output buffer gates provide true and complement outputs. A HIGH on the

Contextual Info: F100141 8-Bit Shift Register F A IR C H IL D A Schlumberger Company F100K ECL Product Description The F100141 contains eight edge-triggered, D-type flip-flops with individual inputs Pn and outputs (Qn) for parallel operation, and with serial inputs (D n) and

Contextual Info: 100160 O T National düiI Semiconductor F100160 Dual Parity Checker/Generator General Description The F100160 is a dual parity checker/generator. Each half has nine inputs; the output is HIGH when an even number of inputs are HIGH. One of the nine inputs la or lb has the

100102DC

Contextual Info: 100102 National Semiconductor F100102 Quint 2-Input OR/NOR Gate General Description R efer to th e F100302 datasheet for: PCC packaging Low er pow er M ilitary versions E xtended voltage specs - 4 . 2 V to - 5 .7 V The F100102 is a m onolithic quint 2-input O R /N O R gate

100107DC

Contextual Info: 100107 O T National ÆSASemiconductor F100107 Quint Exclusive OR/NOR Gate General Description The F100107 is monolithic quint exclusive-OR/NOR gate. The Function output is the wire-OR of all five exciusive-OR outputs. Refer to the F100307 datasheet for: PCC Packaging

100101DC

Contextual Info: 100101 National Semiconductor F100101 Triple 5-Input OR/NOR Gate General Description The F100101 is a monolithic triple 5-input OR/NOR gate. All inputs have 50 k fl pull-down resistors and all outputs are buffered. Refer to the F100301 datasheet for: PCC packaging

Contextual Info: 100164 Egl National ä !A Semiconductor F100164 16-Input Multiplexer General Description The F100164 is a 16-input m ultiplexer. Data paths are co n ­ tro lle d by fo u r S elect lines S 0 - S 3 . Their decoding is shown in th e truth table. O utput data polarity is th e sam e as the

Contextual Info: Chassis Mount HF Oven Controlled Crystal Oscillators S ee pages 56, 58 fo r s m a lle r size H F m odels. HIGH STABILITY to 5 x KT'Yday Higher temperature stability Higher output level M o s t econom ical CO-211 SERIES CO-218S SERIES CO-200 SERIES CO-205S SERIES