50 PIN IDE Search Results

Contextual Info: IBM11T8645HP 8M x 64 144 PIN SO DIMM Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses Au contacts Optimized for byte-write non-parity applications • 8Mx64 Extended Data Out SO DIMM • Performance: -50

Contextual Info: ADS5423 www.ti.com SLWS160 − FEBRUARY 2005 14 Bit, 80 MSPS AnalogĆtoĆDigital Converter D 52 Pin HTQFP Package With Exposed FEATURES D 14 Bit Resolution D 80 MSPS Maximum Sample Rate D SNR = 74 dBc at 80 MSPS and 50 MHz IF D SFDR = 94 dBc at 80 MSPS and 50 MHz IF

Contextual Info: ADS5424 www.ti.com SLWS157A − JANUARY 2005 − REVISED MAY 2005 14 Bit, 105 MSPS Analog-to-Digital Converter D 52 Pin HTQFP Package With Exposed FEATURES D 14 Bit Resolution D 105 MSPS Maximum Sample Rate D SNR = 74 dBc at 105 MSPS and 50-MHz IF D SFDR = 93 dBc at 105 MSPS and 50-MHz IF

Contextual Info: .125" X . 125" Wiremount Socket .050" Pitch Cable, 50 Position Backplane Connector Special holes secure shroud to back panel pins Optional keying strip 3439-5650 allows keying without pin loss Header side walls provide polarization Optional 3505-5 latch provides socket retention

TMS34061FNL

Abstract: lad1-5v TMS34070NL S3406 TL 413 SPVU001 MJ340 TA2625
Contextual Info: SM J 3 4 0 1 0 GRAPHICS SYSTEM PROCESSOR NOVEMBER 1 98 8 - • Military Temperature . . . - 5 5 ° C to 12 5°C • Instruction Cycle Time: 200 ns . . . S M J3 4010-40 160 ns . . . S M J3 4010-50 REVISED SEPTEMBER 1989 GB PACKAGE 68-PIN GRID ARRAY TOP VIEW

Contextual Info: Integrated Circuit Systems, Inc. ICS9175 Low Skew Output Buffer Features The ICS9175 is ideal for generating multiple, high drive CPU clocks for Pentium applications. It meets the typical system specification for maximum skew between out­ puts 250 ps and clock stability (± 250 ps).

20.000 Mhz crystal

Abstract: CRYSTAL 20 mhZ XTAL 50MHZ MK2011 MK2011S MK2011STR X-TAL 20m 20000 XTAL
Contextual Info: MK2011 Fast Ethernet Clock Source I C R O C LOC K Description Features The MK2011 is the ideal way to generate clocks for Fast Ethernet cards or systems. It provides 20MHz, 25MHz, and 50MHz clocks. In an 8 pin SOIC, the MK2011 can save component count, board space, and cost over surface mount crystals

3.686 MHZ

Abstract: crystal 3.68mhz MK3233-01S 32.768 MHZ OSCILLATOR CRYSTAL 20 mhZ MK3233 MK3233-01STR MK3233-02S MK3233-02STR 32.768 khz crystal
Contextual Info: I C R O C LOC K MK3233 Handheld System Clock Synthesizer Description Features The MK3233 is the smallest size, lowest power system clock synthesizer available. It is the ideal way to generate clocks for smart cell phones, PDAs, and other devices where low power is required. Using analog

Contextual Info: FS8844 250 mA Low Quiescent Current LDO Linear Regulator General Description Features The FS8844 series is a positive voltage regulator with high accuracy output voltage and ultra-low quiescent current which is typically 2.0µA. The device is ideal for handheld communication

Contextual Info: CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9 IDT72132 IDT72142 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • The IDT72132/72142 are high-speed, low-power serial-toparallel FIFOs. These FIFOs are ideally suited to serial communications applications, tape/disk controllers, and local

W91030BS

Abstract: tda 5100 B3 W91030 SIN227 W91030B LM 501-50
Contextual Info: Preliminary W91030B CALLING LINE IDENTIFIER Table of ContentsGENERAL DESCRIPTION .2

Dt7210

Contextual Info: CM O S PARALLEL-SERIAL FIFO 2048 x 9-BIT & 4096 x 9-BIT üliiiün w p IDT72103 IDT72104 Integrated D evicelechnology Inc. FEATURES: DESCRIPTION: • 50ns parallel port access time The IDT72103/72104 are high-speed Parallel-Serial FIFOs that are ideally suited for serial communications, high-density media

54ACT563

Abstract: 54ACT ACT573
Contextual Info: 54ACT563 Octal Latch with TRI-STATE Outputs General Description The ’ACT563 is a high-speed octal latch with buffered common Latch Enable LE and buffered common Output Enable (OE) inputs. The ’ACT563 device is functionally identical to the ’ACT573,

connector bendix

Abstract: Pressure TransDUCER 4 WIRE 0-5000 psi HP-Series bendix 6 pin
Contextual Info: APPLICATIONS MODEL AB/HP • FLUSH MOUNT GENERAL PURPOSE, HIGH PRESSURE TRANSDUCER The AB is ideal for a wide range of applications. That's because it has a variety of mounting options, stainless steel construction, and wide pressure ranges. In addition, the AB has two

82430HX

Abstract: 435B 82430VX 431b 434B diode D42 / 1400 intel 82430VX 82430FX CYM74P430B CYM74P431B
Contextual Info: 1CY M74 P43 4B/4 35B CYM74P430B/431B CYM74P434B/435B PRELIMINARY Intel 82430FX, HX, VX PCIset Pipelined L2 Cache Modules Features The CYM74P430B/431B/434B/435B modules are based on industry standard 32Kx32 synchronous pipelined BSRAM. • Secondary cache modules that are ideal for the Intel

Amplifier s thermocouple texas

Abstract: INA120 INA120AP INA120BG INA120CG X1000 Amplifier k thermocouple texas chromel seebeck Table 18a2g
Contextual Info: INA120 Precision INSTRUMENTATION AMPLIFIER FEATURES DESCRIPTION ● LOW OFFSET VOLTAGE: 25µV max ● LOW OFFSET VOLTAGE DRIFT: 0.25µV/°C max ● PIN-STRAPPED GAINS: 1, 10, 100, 1000 The INA120 is a precision instrumentation amplifier ideal for accurate signal acquisition. It combines precision, protected-input operational amplifiers, lasertrimmed gain-setting resistors, and a high commonmode rejection difference amplifier on a single chip.

TC51832FL10

Abstract: TC51832 TC51832FL-10 TC51832PL-10 256IC 832P
Contextual Info: 832P/S 832 P/S 832P/S 32,768 WORD x 3 BIT CMOS PSEUDO STATIC RAM IDESCRIPTION] The TC51832 Family is a 256IC bit high-speed CMOS Pseudo-Static RAM organized as 32,768 words by 8 bits. The TC51832 Family utilizes one transistor dynamic memory cell array with

940C

Abstract: HC240A HC244A LS244 MC54HCXXXAJ MC74HCXXXAN
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal 3-State Noninverting Buffer/Line Driver/ Line Receiver High–Performance Silicon–Gate CMOS MC54/74HC244A J SUFFIX CERAMIC PACKAGE CASE 732–03 20 1 The MC54/74HC244A is identical in pinout to the LS244. The device

Contextual Info: THS6052, THS6053 175 mA, ±12 V ADSL CPE LINE DRIVERS SLOS293D – JUNE 2000 – REVISED DECEMBER 2001 D Remote Terminal ADSL Line Driver D D D D D High Speed – Ideal for Both Full Rate ADSL and G.Lite – Compatible With 1:1 Transformer Ratio Low 2.7 pA/√Hz Noninverting Current Noise

Contextual Info: Revised January 2003 NC7SV04 TinyLogic ULP-A Inverter General Description Features The NC7SV04 is a single inverter from Fairchild’s Ultra Low Power-A ULP-A Series of TinyLogic. ULP-A is ideal for applications that require extreme high speed, high drive

IAGMF

Abstract: IDS500
Contextual Info: & I-Cube PS48 Data Sheet Features Description • SRAM-based, In-system Programmable • Non-Blocking Switch Matrix - User Configurable D atapath W idth of 4, 8, or 16 bits - Identical and Predictable Delays • 48 I/O Ports - Individually Program m able as Input,

current fed push pull topology

Contextual Info: UC1827-1, UC1827-2 UC2827-1, UC2827-2 UC3827-1, UC3827-2 www.ti.com SLUS365A – APRIL 1999 – REVISED AUGUST 2005 BUCK CURRENT/VOLTAGE FED PUSH-PULL PWM CONTROLLERS FEATURES • • • • • • • • DESCRIPTION Ideal for Multiple Output and/or High

Contextual Info: SIEMENS TLE 4202 DC Motor Driver B ip o la r IC I F eatures • M ax. o u tpu t cu rre n t 3.0 A • O p e n-lo o p gain 80 dB typ. • PNP input stages • Large c o m m o n -m o d e inpu t-vo lta g e range • W ide control range • Low saturation voltages

Contextual Info: SIEMENS PEB 20320 Electrical Characteristcs 7 Electrical Characteristcs Note: All specifications are for V2.1 and V2.2 unless otherwise specified. Version numbers are identified in the Interrupt Information bits VN 3:1 : these bits are ‘000’ for version 1.1