5 PIN Search Results

Contextual Info: N O TES: REV POS.I 2. DELETED. DIMENSIONS APPLY AFTER INSTALLATION IN P.C. BOARD. [6 ] .0078/0.2 MAX. GAP PERM ISSIBLE TO P.C. BOARD. 5 ROW d - 5 ROW c - 5 ROW b - 5 ROW a - 5 ROW z - 0 I ROW e - 5 5 5 5 5 0I l oi 5 5 5 5 5 6 5 5 5 5 0I0I O E 6 I BACKPANEL PIN CONNECTORS

T25 4 h5

Abstract: AF4 equivalent AF14 160 e7 af17 AR29 J9-J14 AC22 AE23 EPF10K130E
Contextual Info: EPF10K130E Device Pin-Outs ver. 1.1 Pin Name 1 MSEL0 (3) MSEL1 (3) nSTATUS (3) nCONFIG (3) DCLK (3) CONF_DONE (3) INIT_DONE (4) nCE (3) nCEO (3) nWS (5) nRS (5) nCS (5) CS (5) RDYnBUSY (5) CLKUSR (5) DATA7 (5) DATA6 (5) DATA5 (5) DATA4 (5) DATA3 (5) DATA2 (5)

AF14

Abstract: AC22 AE23 EPF10K130E AJ32 AE10-AE11 AE20-AE21
Contextual Info: EPF10K130E Device Pin-Outs ver. 1.1 Pin Name 1 MSEL0 (3) MSEL1 (3) nSTATUS (3) nCONFIG (3) DCLK (3) CONF_DONE (3) INIT_DONE (4) nCE (3) nCEO (3) nWS (5) nRS (5) nCS (5) CS (5) RDYnBUSY (5) CLKUSR (5) DATA7 (5) DATA6 (5) DATA5 (5) DATA4 (5) DATA3 (5) DATA2 (5)

AJ32

Abstract: AF14 AR33 AC34 B5 AE23 B1 121 W31 AR-17 ak32 AR17 EPF10K130E
Contextual Info: EPF10K130E Device Pin-Outs ver. 1.2 Pin Name 1 MSEL0 (3) MSEL1 (3) nSTATUS (3) nCONFIG (3) DCLK (3) CONF_DONE (3) INIT_DONE (4) nCE (3) nCEO (3) nWS (5) nRS (5) nCS (5) CS (5) RDYnBUSY (5) CLKUSR (5) DATA7 (5) DATA6 (5) DATA5 (5) DATA4 (5) DATA3 (5) DATA2 (5)

29810

Contextual Info: NOTES: CONNECTOR SYSTEM INFORMATION. ROW f — 6 6 6 6 I o> I o> I o> I o> I o> 6 6 I6 I o I o> ROW e — b b b b b b b b b b b b b b b b b b b b b b ROW d — b b b b b b b b b b b 6 b 6 b 6 b 6 b 6 b b <N PIN 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 6 5 6 5 5 5 CODE

Contextual Info: be / defin ing a degree of ex c e lle n c e PASSIVE S -I-L DELAY LINES 3 PIN 0402 SERIES 3 o - j— -o ' L _r 1 ; GND 2 PART NUMBER 55 OHM ± 10% 0 4 0 2 -0 0 .5 - 5 5 04-02-0001 - 5 5 0 4 0 2 -0 1 .5 - 5 5 0 4 0 2 -0 0 0 2 -5 5 0 4 0 2 -0 2 .5 - 5 5 0 4 0 2 -0 0 0 3 -5 5

Contextual Info: NOTES: M e tC o n -2 D DIMENSIONS APPLY AFTER INSTALLATION. 5 5 5 5 5 5 5 5 5 5 ROW e 5 ROW d 6 w 65 56 5 cr^ui ROW c ROW b 6. CONNECTOR WITH MIXED PIN LENGTH LOADING PER PICMG 2.0 R2.1. ItL ROW □ .0078/0.2 MAX. GAP PERM ISSIBLE TO PC BOARD. J a S P E C IF IC A TIONS

Contextual Info: NOTES: NX SERIES - M e tC o n -2 P0S.1 2. DELETED. SELECTIVE LOADING CHART 4 4 4 4 4 5 5 5 5 5 5 6 6 6 6 6 6 5 5 5 5 5 5 5 MATING LENGTH OF CONTACTS CONTACT T A IL PIN ALL GROUND LEN GTH S CODE SIG N A L P M (N) L 4 4 4 4 4 4 4 6 | 6 CO CO .0078/0.2 MAX. GAP PERMISSIBLE TO P.C. BOARD.

Contextual Info: Ü_ I_ M* DIM "A" APPLICATION 8 9 0 5 5 -1 1 1 3 .5 0 8 9 0 5 5 -1 2 1 6 .9 0 8 9 0 5 5 -1 3 1 4 .4 8 9 0 5 5 -1 4 1 5 .6 5 REAR PLUG WIRE WRAP REAR PLUG REAR PLUG CUSTOMER SPECIAL PARTNUM8ER REQUIRED RPU PIN LENGTH BOARD RANGE 1 . 6 - 3 . 2 m m

7002B

Contextual Info: CKT. SIZE EDP. NO. 4 0 2 2 -5 5 -2 0 4 2 7 0 4 5 0 -0 0 5 0 6 0 2 2 -5 5 -2 0 6 2 7 0 4 5 0 -0 0 5 1 NOTES î 1. M ATERIAL: G.F. POLYESTER 2. HOUSING TO BE USED WITH TERMINAL NOS. 7 0 0 2 B , OPTION "B" ROUND PINS. — B — 0 2 2 -5 5 -2 0 8 2 7 0 4 5 0 -0 0 5 2

MSP430

Contextual Info: MSP430 Family Pin Input/Output Simulation Topics Page 5 Pin Input/Output Simulation 5-3 5.1 Input Simulation Files 5-4 5.1.1 Relative Signal Levels 5-5 5.1.2 Absolute Signal Levels 5-6 5.1.3 Boundaries in Pin Simulation Files 5-7 5.2 Output Simulation Files

Contextual Info: SIEMENS BPX 65 BPX 66 SILICON PIN PHOTODIODE Package Dimensions in Inches mm .216(5 5) 197 (5 0) 570(14 5) 492(12 5) 208(5 3) .197(5.0) Jl* 0.100 _L/ (2 5 4 t 7 Cathode 1 0 018(0 45) T 0 2 2 0 (5 6) 0 208(5 3) ' - c 102, 189(4 8) (2 6 ) 181 (4.6) Chip Location

Contextual Info: g OPTEK P roduct B ulletin OP906 June 1996 PIN Silicon Photodiode Type OP906 0 .0 5 5 ( 1 .4 0 ) TYP .1 5 0 , • 125 ( 3 . 1 8 ) .1 1 5 .1 0 0 (2 .9 2 ) .1 9 5 (4 .9 5 ) .1 8 5 (4 .7 0 ) .0 3 0 (2 .5 4 ) NOM (3 .6 1 ) \ Ly .0 2 5 (0 .6 4 ) .0 1 5 (0 .3 8 )

Contextual Info: 101 Surface Mount Devices High Voltage Transistors Ratings Type Package v CEO V v CBO V typ MHz Pinout See Section VII 3 0 /5 3 0 /5 3 0 /5 5 0 /5 60 60 60 100 AE R F F 10/1 200 F 5 0 /5 10/1 2 0 /2 2 0 /2 100 F 200 50 50 F F R 3 0 /5 60 AE 3 0 /5 3 0 /5 2 0 /2

Contextual Info: CONNOR—WINFIELD CORPORATION HIGH FREQUENCY 14 PIN DIP SINEWAVE AURORA, IL. 6 0 5 0 5 PHONE 6 3 0 8 5 1 - 4 7 2 2 FAX (6 3 0 ) 8 5 1 - 5 0 4 0 S X 5 5 -*5 * SPECIFICATIONS 24MHz to 225MHz ±5ppm ±1 Oppm Frequency Range Frequency Calibration 25*C Frequency S tability

282974

Abstract: ASSEMBLY INSTRUCTIONS Radiall RG316DT kx22dt radiall dsx Radiall assembly instructions BLY 67
Contextual Info: RADIALL COMfCTEURS MULTICONTACTS PRELIMINARY TECHNICAL DATA SHEET 616163 SIZE 5 COAXIAL PIN CONTACT FOR KX 22 DT AND RG 316 DT Séries DSX 30 MARCH 93 _ 0 5-61 10 5 . 5 5 14.80 14.60 4 .3 5 4 .2 5 WW W 2 .6 0 2 .5 0 to md* «\y modificati«*« Jjdgtd FERRULE

M50255P

Abstract: M50253P M50255 TIL 013 16 bit serial parallel mitsubishi clk M50253
Contextual Info: • b a im a b O G lS -m M IT S U B IS H I ELEK b?5 b M ITSU BISHI ICS a v m it e ( L IN E A R tS E common ) JM 5 0 2 5 3 P /M 5 0 2 5 5 P 12-B IT/16-B IT S E R IA L PAR ALLEL CO NVERTER DESCRIPTION M 5 0 2 5 3 P /M 5 0 2 5 5 P PIN CONFIGURATION (TOP VIEW)

Contextual Info: M ATERIAL NO. •P- DIMENSION 4 3 9 5 4 -0 1 0 1 4 3 9 5 4 -0 2 0 1 4 3 9 5 4 -0 3 0 1 4 3 9 5 4 -0 4 0 1 4 3 9 5 4 -0 5 0 1 4 3 9 5 4 -0 6 0 1 3 .5 0 /Î .I3 8 3 .5 0 /U 3 8 ) 4 .3 0 /U 6 9 ) 4 .3 0 / . 169) 5 .I0 / ( .2 0 I) 5. l0 / ( .2 0 1) PIN FINISH CODE

Contextual Info: 6 APPROVED: DATE:_ TITLE: .029 PICK & PLACE CAP n n n 0000 PIN 2 0000 “T .200 [5 .0 8 ] u u u u PIN 1 .15 7 [4 .0 0 ] 2 ~ 8 PINS .40 0 [1 0 .1 5 ] 9 ~ 4 0 PINS .019 [0 .5 0 ] REF L T ~ .19 7 [5 .0 0 ] n .061 [1 .5 5 ] REF .198 [5 .0 5 ] _ L .010 [0 .2 5 ]-

60045

Contextual Info: 1 ISUULl isrm blULIL isrm ° NOTES: 1.0 PINS NOT ELECTRICALLY CONNECTED ARE OMITTED. ELECTRICAL SPECIFICATIONS: 1.0 INDUCTANCE: P 1 -J 1 = P 2 -J 2 ; P 4 -J 4 = P 5 -J 5 2.0 DC RESISTANCE: P 1-J1 P 2 -J 2 P 4 -J 4 P 5 -J 5 3.0 COMMOM MODE: .5 .5 .5 .5

F*P10L

Abstract: FP1012 m5m5165p
Contextual Info: MITSUBISHI LS Is M 5 M 5 1 6 5 P , F P -7 0 , - 1 0 , - 1 2 , - 1 5 , - 7 0 L ,- 1 0 L ,- 1 2 L ,- 1 5 L 6 5 S 3 6 - B IT 8 1 9 2 -W ORD B Y 8 -B IT CMOS S TA TIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M 5 M 5 1 6 5 P ,F P is a 6 5 5 3 6 -b it C M OS static R A M orga­

5258B

Contextual Info: MITSUBISHI LS Is M 5 M 5 2 5 8 B P , J - 1 5 , - 2 , - 2 5 262144-BIT 65536-WORD BY 4-BIT CMOS STATIC RAM DESCRIPTION The M 5 M 525 88 is a family of 6 5 5 3 6 w ord by 4-bit static PIN CONFIGURATION (TOP VIEW) RAMs, fabricated w ith the high performance CMOS silicongate

UM3751

Abstract: garage Manchester code RX 26 a1016 A1117
Contextual Info: 3QE D UNITED MICROELECTRONICS • T~ T?.'! i =1325052 0 0 0 0 2 5 2 5 ■ “ — UM 37 5 1 /5 2 /5 3 /5 4 /5 5 Features " r j- ~ n n - 3 SSSSSSm , Pin Configuration ■ Single chip contains both Encoder and Decoder. ■ 3V to 5V operation. ■ On-chip oscillator uses inexpensive non-critical RC

8255 intel microprocessor block diagram ppi

Abstract: intel 8255A Peripheral interface 8255 with ADC 8255A intel IC 8255 intel 8255 8255a intel keyboard interfacing with 8255 microprocessors Control word 8255 PPI datasheet intel IC 8255
Contextual Info: inU 8 2 5 5 A /8 2 5 5 A -5 PROGRAMMABLE PERIPHERAL INTERFACE • M C S - 8 5 TM Compatible 8255A-5 ■ 24 Programmable I/O Pins ■ Direct Bit Set/Reset Capability Easing Control Application Interface ■ Completely TTL Compatible ■ Reduces System Package Count