486BASED Search Results

0Q171

Abstract: C11256 OPTI802GP burndy CONNECTOR TAG7_ equivalent SRAM timing c9539
Contextual Info: -V • y CYPRESS Features CYM9244, CYM9245 CYM9246, CYM9247 PRELIMINARY 128K/256K Cache Module Family for the OPTi 802GP Chip Set pins and on-board decoupling capacitors ensure maximum protection from noise. • TTL-compatible inputs/outputs Functional Description

D5032

Abstract: IC TTL 7400 free J1810 Altera LP5 PLDS-ENCORE plej5128
Contextual Info: PLDS-ENCORE MAX+PLUS, A+PLUS & SAM+PLUS Programmable Logic Development System Data Sheet September 1991, ver. 2 Contents □ □ □ □ □ General Description P L S -M A X — M A X + P L U S P ro g ra m m ab le Logic Softw are P L S - S U P R E M E — A + P L U S P ro g ra m m a b le L ogic Softw are

CY7C193

Abstract: CY7C19J C1316
Contextual Info: CY7C193 W / CYPRESS Features • Synchronous 32K x 8 SRAM • Supports 33-MHz 486 cache systems with zero wait states • Clock-to-output time — 20 ns into 30 pF • Synchronous self-timed write • TTL-compatible inputs and outputs • Easy memory expansion with OE fea­

Contextual Info: PRELIMINARY a Enhanced Am486 Microprocessor Family Advanced Micro Devices DISTINCTIVE CHARACTERISTICS Complete 32-Bit Architecture • High-Performance Design — Improved cache structure supports industrystandard write-back cache — Frequent instructions execute in one clock

schematic flash disk

Abstract: CY3140 ABEL
Contextual Info: PRELIMINARY CY3140 ABEL /Synario™ Design Kit for FLASH370i™ Features System Requirements • Device independent design entry formats: — ABEL-HDL for ABEL-4, ABEL-5, and ABEL-6 — Schematic entry, VHDL, and ABEL-HDL for Synario™ • Full integration supporting all ABEL™ and Synario™

Contextual Info: PRELIMINARY CYPRESS 128K/256K Cache Module for the UMC491 Chip Set Features • TTL-compatible inputs/outputs • 128 K-byte CYM9236 or 256 K-byte (CYM9237) secondary cache module organized as 32K by 32 o r 64K by 32 • Ideal for Intel 486-based systems

AMD 486DX embedded

Abstract: Am486 DX instruction set Am486 AM486DX gdt ansi y14.5m-1982 microprocessor in SLOT MACHINE SMM 201 S-15 80286 microprocessor paging mechanism 486DX MEMORY CONTROLLER
Contextual Info: FINAL Am486DE2 8-Kbyte Write-Through Embedded Microprocessor DISTINCTIVE CHARACTERISTICS • High-Performance Design ■ Complete 32-Bit Architecture — 66-MHz operating frequency — Address and data buses — Frequent instructions execute in one clock

117 AJG

Contextual Info: PRELIMINARY CYPRESS SEMICONDUCTOR 128K Write-Through Secondary Cache Module Features Functional Description • 128-Kbyte d irect-m ap p ed , w ritethro u g h , zero-w ait-state secondary cache m odule • O p e ra tes w ith 33-M H z In tel 486 p ro ­ cessors

floppy drive emulator

Abstract: CP000600-DSP0698 Z080QFP0ZET Z89321 Z8932101ZEM Z89371 Z8937100ZAC Z8937101ZAC
Contextual Info: P r e l im in a r y D a t a S h e e t O Z8932101ZEM Totally Logical DSP F a m il y E m u l a t o r D evelo pm ent T o o ls— Z89321 FEATURES Supported Devices Provides Source-Level D ebugging for D SP Codes. Sym bolic D isassem bly in the Debug Window Packages

adsp 210xx architecture

Abstract: 12pin connector circular ADSP-21020 ADDS-21020-EZ-ICE c1855 INVERSE FAST FOURIER TRANSFORM ADSP-21000 ADSP-21010 AD1849 ADSP21020
Contextual Info: a ADSP-21000 Family Development Tools ADDS-210xx-TOOLS FEATURES FEATURES DEVELOPMENT SOFTWARE TOOLS DEVELOPMENT HARDWARE TOOLS ASSEMBLER Easy-to-Use Algebraic Syntax EZ-LAB DEVELOPMENT BOARD Enables Evaluation, Prototyping, and Development of ADSP-21000 Family-Based Systems

lcd interfacing with arm7 processor

Abstract: block diagram of LCD interfacing with ARM7 lps 256
Contextual Info: CL-PS7110 ^^W ciRRUS LOG/C Preliminary Data Book FEATURES • Ultra low power — Designed for applications that require long battery life while using standard AA/AAA batteries — Average 20 mA in normal operation everything on — Average 5 mA in idle mode (dock to the CPU stopped,

ttl 7492

Abstract: 74912 7490 pin diagram 7490 mod 16 chip 7490 TTL 7490 data 7492 pin out diagram C108H
Contextual Info: PRELIMINARY CYM7490 CYM7491 CYM7492 i486 Level II Cache Module Family Features Functional Description • Cache sizes of 64 KB, 256 KB, or 1 MB • Tag width of 8 bits • Independent dirty bit • Operates with 33-MHz Intel ¡486 processors • Zero-wait-state operation

mab16

Abstract: W5086
Contextual Info: W5086 USER INTERFACE CONTROLLER PRELIMINARY July 1991_ 1. Technical Overview 1.1. Features WINDOWS ACCELERATOR WEITEK-supplied AutoCAD device drivers allow Auto­ CAD to take advantage of these features automatically

Cyrix 486dx

Abstract: VL16C451
Contextual Info: SCAMP IILOW-POWER NOTEBOOK CHIP SET c in O v e r v ie w The VL82C315A SCAMP II System Controller and the VL82C322A SCAMP Power Management Unit PMU provide a high-performance, low-chip count, low-power 16-bit notebook solu­ tion. These devices support fullystatic AMD Am386™ and Cyrix

RF substitution

Abstract: Hercules Graphics Card 8850
Contextual Info: Weinschel CAMLab for Windows CALIBRATION, ATTENUATION MEASUREMENT LAB P/N 189-22 The Weinschel Corporation Calibration, Attenuation Measurement Lab (CAMLab) is application specific software that runs in the Microsoft Windows environment on IBM compatible PC’s. The CAMLab

Contextual Info: MAX 7000 / aNb rfe rva\ Programmable Logic Device Family D a ta S h e e t □ □ □ □ □ □ □ □ □ □ □ □ □ H ig h -p erfo rm an ce, erasab le C M O S d ev ices b ased on secon d generation M ultiple Array M atriX MAX architecture Complete EPLD fam ily w ith logic densities up to 10,000 available

Contextual Info: EPM 7032V EPLD 3.3-Volt 32-Macrocell Device Data Sheet Features. □ Preliminary Information □ □ □ □ □ □ □ □ 3.3-V version of the popular EPM7032 EPLD Combinatorial speeds with t PD = 15 ns Clock frequencies up to 71 MHz Innovative power-saving features

VL82c311

Abstract: VL82C48 vl82c486
Contextual Info: VL82C425 CACHE MEMORY CONTROLLER O v e r v ie w VLSI Technology, Inc.'s VL82C425 is a high-performance, highintegration, single-chip secondlevel cache memory controller for use in the design of 486-based PC/AT-compatible systems. When used with the VLSI SC486

Contextual Info: XC4000 Logic Cell Array Family flX IU N X Product Description, August 1992 DESCRIPTION FEATURES Third Generation Field-Programmable Gate Arrays - Abundant flip-flops - Flexible function generators - On-chip ultra-fast RAM - Dedicated high-speed carry-propagation circuit

Contextual Info: C 'C I R R U S L O G IC " L - P S 7 1 1 0 D ata B o o k FEATURES • Ultra low power — Designed for applications that require long battery life while using standard AA/AAA batteries — Average 20 mA in normal operation everything on Low-Power System-on-a-Chip

programming manual EPLD EPS448

Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
Contextual Info: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,

WASHING machine interfacing 8051

Abstract: line following robot diagram 8051 Allen-Bradley PID tuning panasonic ELEVATOR CONTROLler 8051 microcontroller for washing machine 8051 WASHING machine controller flying robot with camera apple computer FC110B VME 6U 7 hp card DIMENSIONS
Contextual Info: Product Summary and Suggestions m Togai InfraLogic, Inc. Product Overview The Personal-FCDS is a related product serving as an exploratory or training version o f the FCDS. FC110 Developm ent System - Software tool to generate fuzzy logic systems for FC 110 see below

Lattice PDS Version 3.0 users guide

Abstract: lattice ispl 1016 ispl 1016 ABEL-HDL Reference Manual pDS lattice manual
Contextual Info: Data I/O and pDS+ Design and Simulation Environment User Manual Version 3.0 Technical Support Line: 1-800-LATTICE or 408 428-6414 pDS2102-UM Rev 3.00 Copyright This document may not, in whole or part, be copied, photocopied, reproduced, translated, or reduced to any electronic medium or machine-readable form without

16cudslr

Abstract: EP320I EPM7160 Transition vhdl code for lift controller EPM9560 ep330 INTEL 8-series NEC 9801 altera ep220 Silicon Laboratories
Contextual Info: M+2Book Page i Thursday, June 12, 1997 12:49 AM MAX+PLUS II Programmable Logic Development System Getting Started Altera Corporation 2610 Orchard Parkway San Jose, CA 95134-2020 408 894-7000 M+2TOC+ Page iii Monday, June 9, 1997 9:34 AM Contents Preface