44TLE03 Search Results

Contextual Info: HITACHI/ L O G I C / A RR AY S/ NE d TE D E ] 44TLE03 QD1D411 □ 92D HD74HC164 10411 D T -% -O f-O S ~ # 8-bit Parallel-out Shift Register PIN ARRANGEMENT This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flip -flo p . Inputs A

Contextual Info: HM62W1664H Series HM62W1864H Series P r e lim in a r y 65536-word x 16/18-bit High Speed CMOS Static RAM T h e H M 6 2 W 1 6 6 4 H /H M 6 2 W 1 8 6 4 H is an asyncronous 3.3 V operation high speed static RAM organized as 64 kword x 16/18 bit. It realize h ig h sp eed access tim e 2 5 /3 0 /3 5 /4 5 ns w ith

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Abstract: ZW22 HM5241605 HM5241605TT-15 HM5241605TT-17 HM5241605TT-20
Contextual Info: ADE-203-186A Z HM5241605 Series 131,072-word x 16-bit x 2-bank Synchronous Dynamic RAM A ll inputs and outputs are referred to the rising edge o f the clock input. The HM5241605 is offered in 2 banks for improved performance. Features Ordering Information

Contextual Info: HITACHI/ LOGIC/ARRAYS/NEfI TE D E I 4M c]bED3 O d l D S i M 9 2D HD74HC682, HD74HC684, HD74HC686 # 10594 D Î^ 5 *i1 8-bit M agnitude Comparator These magnitude comparators perform comparisons o f tw o eight-bit binary or BCD words. A il types provide P*Q ou t­

10431-D

Abstract: hd74hc181 a27cn
Contextual Info: HITACHI/ LOGIC/ARRAYS/HEH =ia D E p 44TL,S03 OD1D42? 92 D HD74HC181 4 | 10427 D # Arithmetic Logic Unit/Function Generator • FEA TU RES I PIN ARRANGEMENT • High Speed Operation 2Ï]v«c - HJ^Ai AiD S B. t,—~22|Bi s*Gl Sj Ai *— ïï]» Inpuu S.

Contextual Info: HITACHI/ LOGIC/ARRAYS/tlEH De | 4 4 ^ 2 0 3 00103^3 2 | 92D HD74HC151 10393 lof-8-line Data Selector/M ultiplexer The HD74HC151 selects one of the 8 data sources, depend­ ing on the address presented on the A, B, and C inputs. It features both true Y and complement (W) outputs. The