40INCH Search Results

TLK1102E

Contextual Info: TLK1102E www.ti.com . SLLS958 – MARCH 2009 11.3-Gbps Dual-Channel Cable and PC Board Equalizer

nrzi Decoder

Abstract: DS32EL0124 DS32EL0124SQ DS32EL0124SQE DS32EL0124SQX DS32ELX0124 DS32ELX0124SQ
Contextual Info: DS32EL0124, DS32ELX0124 125 MHz - 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface General Description Features The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and

DS32ELX0124SQE

Abstract: DS32EL0124 dvi-d 24 pin diagram DS32EL0124SQ DS32EL0124SQE DS32EL0124SQX DS32ELX0124 DS32ELX0124SQ
Contextual Info: DS32EL0124, DS32ELX0124 125 MHz — 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface General Description Features The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and

dvi-d 24 pin diagram

Abstract: DS32EL0421 DS32ELX0421 SDI scrambler DVI-D Single Link
Contextual Info: DS32EL0421, DS32ELX0421 125 – 312.5 MHz FPGA-Link Serializer with DDR LVDS Parallel Interface General Description Features The DS32EL0421/DS32ELX0421 is a 125 MHz to 312.5 MHz DDR serializer for high-speed serial transmission over FR-4 printed circuit board backplanes, balanced cables, and optical

Contextual Info: PM5376 TSE-Nx160 Released Transmission Switch Element FEATURES • Provides two pages of connection memory with software and hardware controlled hitless page swaps at frame boundaries. • Supports trunk conditioning on a per port, per egress grain basis for AIS and

Contextual Info: DS42BR400 Quad Transceiver with Input Equalization and Output DeEmphasis General Description Features The DS42BR400 is a quad 250 Mbps – 4.25 Gbps CML transceiver, or 8-channel buffer, for use in XAUI Fibre Channel backplane and cable applications. With operation down to

Contextual Info: DS25BR400 Quad 2.5 Gbps CML Transceiver with Transmit DeEmphasis and Receive Equalization General Description Features The DS25BR400 is a quad 250 Mbps – 2.5 Gbps CML transceiver, or 8-channel buffer, for use in PCI Express, SATA, SAS, Fibre Channel backplane and cable applications.

DS25BR400

Abstract: DS25BR400TSQ
Contextual Info: DS25BR400 Quad Transceiver with Input Equalization and Output De-Emphasis General Description Features The DS25BR400 is a quad 250 Mbps – 2.5 Gbps CML transceiver, or 8-channel buffer, for use in PCI Express, SATA, SAS, Fibre Channel backplane and cable applications. With operation down to 250 Mbps, the DS25BR400

DS25BR400

Abstract: DS25BR400TSQ CAT-7 english
Contextual Info: DS25BR400 Quad Transceiver with Input Equalization and Output DeEmphasis General Description Features The DS25BR400 is a quad 250 Mbps – 2.5 Gbps CML transceiver, or 8-channel buffer, for use in PCI Express, SATA, SAS, Fibre Channel backplane and cable applications.

DS25BR400

Abstract: DS25BR400TSQ
Contextual Info: DS25BR400 Quad Transceiver with Input Equalization and Output De-Emphasis General Description Features The DS25BR400 is a quad 250 Mbps – 2.5 Gbps CML transceiver, or 8-channel buffer, for use in XAUI Fibre Channel backplane and cable applications. With operation down

Contextual Info: DS32EL0421,DS32ELX0421 DS32EL0421, DS32ELX0421 125 - 312.5 MHz FPGA-Link Serializer with DDR LVDSParallel Interface Literature Number: SNLS282D DS32EL0421, DS32ELX0421 125 – 312.5 MHz FPGA-Link Serializer with DDR LVDS Parallel Interface General Description

89H64H16G3

Abstract: PES64H16G3 89HPES64H16G3
Contextual Info: 64-Lane 16-Port PCIe Gen3 System Interconnect Switch 89HPES64H16G3 Data Sheet ® Device Overview – Autonomous and software managed link width and speed control – Per lane SerDes configuration • Full back channel equalization support • Rx, 5 tap DFE

RF sensor

Abstract: flexible sensor
Contextual Info: Temposonics ® Magnetostrictive, Absolute, Non-contact Linear-Position Sensors SENSORS R-Series Model RF Flexible Housing Option Document Part Number 551081 Revision B Data Sheet Model RF flexible housing option for R-Series sensors with voltage, current, SSI, CANbus,

Contextual Info: Stratix GX The Low-Risk Path to 3.125-Gbps Transceiver Applications October 2002 The Low-Risk Path to 3.125-Gbps Tranceiver Applications Today’s high-speed applications need a reliable data transfer technology that transmits information from source to destination in nanoseconds. To meet this need, Altera

Amphenol QSFP

Abstract: TLK1102E
Contextual Info: TLK1102E www.ti.com . SLLS958 – MARCH 2009 11.3-Gbps Dual-Channel Cable and PC Board Equalizer

WQFN-6

Contextual Info: DS25BR400 www.ti.com SNLS230I – MAY 2006 – REVISED FEBRUARY 2013 DS25BR400 Quad 2.5 Gbps CML Transceiver with Transmit De-Emphasis and Receive Equalization Check for Samples: DS25BR400 FEATURES DESCRIPTION • • • • • • • The DS25BR400 is a quad 250 Mbps – 2.5 Gbps

DS42BR400

Abstract: DS42BR400TSQ
Contextual Info: DS42BR400 Quad 4.25 Gbps CML Transceiver with Transmit De-Emphasis and Receive Equalization General Description Features The DS42BR400 is a quad 250 Mbps – 4.25 Gbps CML transceiver, or 8-channel buffer, for use in backplane and cable applications. With operation down to 250 Mbps, the

DS125RT410

Contextual Info: DS100RT410 www.ti.com SNLS448 – JANUARY 2013 DS100RT410 Low Power 10GbE Quad Channel Retimer Check for Samples: DS100RT410 FEATURES – DS100RT410 EQ+CDR+DE : 10.3125 Gbps – DS100DF410 (EQ+DFE+CDR+DE): 10.3125 Gbps – DS110RT410 (EQ+CDR+DE): 8.5 - 11.3 Gbps

Contextual Info: DS42MB200 www.ti.com SNOSAT8G – JANUARY 2006 – REVISED APRIL 2013 DS42MB200 Dual 4.25 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization Check for Samples: DS42MB200 FEATURES DESCRIPTION • • • • The DS42MB200 is a dual signal conditioning 2:1

prbs pattern generator using vhdl

Abstract: BUT16
Contextual Info: LatticeECP2/M Family Handbook HB1003 Version 04.9, April 2011 LatticeECP2/M Family Handbook Table of Contents April 2011 Section I. LatticeECP2/M Family Data Sheet Introduction Features . 1-1

8 bit alu in vhdl mini project report

Abstract: DDR3 layout guidelines lfe3-17ea-6fn484c lfe3-35 LFE3-17EA-7FTN256C LFE3-17EA-6FTN256C HB1009 LFE3-70EA-6FN672C DDR3 layout LFE395
Contextual Info: LatticeECP3 Family Handbook HB1009 Version 04.1, January 2012 LatticeECP3 Family Handbook Table of Contents January 2012 Section I. LatticeECP3 Family Data Sheet Introduction Features . 1-1

Contextual Info: LatticeECP2/M Family Handbook HB1003 Version 02.2, February 2007 LatticeECP2/M Family Handbook Table of Contents February 2007 Section I. LatticeECP2/M Family Data Sheet Introduction Features . 1-1

DS42BR400

Abstract: DS42BR400TSQ
Contextual Info: DS42BR400 Quad 4.25 Gbps CML Transceiver with Transmit De-Emphasis and Receive Equalization General Description Features The DS42BR400 is a quad 250 Mbps – 4.25 Gbps CML transceiver, or 8-channel buffer, for use in backplane and cable applications. With operation down to 250 Mbps, the

Contextual Info: DS32EL0421, DS32ELX0421 www.ti.com SNLS282E – MAY 2008 – REVISED OCTOBER 2012 DS32EL0421 , DS32ELX0421 125 - 312.5 MHz FPGA-Link Serializer with DDR LVDS Parallel Interface Check for Samples: DS32EL0421, DS32ELX0421 FEATURES 1 • • • • • • 2