390C2 Search Results

Contextual Info: LATTICE SEMICONDUCTOR bflE » Lattice S3flbE14t1 □ 0 Q 2 7 ß ci 70S « L A T GAL18V10 High Performance E2CMOS PLD Generic Array Logic FUNCTIONAL B LO C K DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOG Y — 15 ns Maxim um Propagation Delay

Contextual Info: APP S? Î993 pLSÌ 1024 Lattice programmable Large Scale Integration High-Density Programmable Logic Functional Block Diagram Features U • PROGRAMMABLE HIGH-DENSITY LOGIC — — — — — Member of Lattice’s pLSI Family High-Speed Global Interconnects

Contextual Info: pLSÌ 1048 Lattice programmable Large Scale Integration High-Density Programmable Logic Functional Block Diagram Features PROGRAMMABLE HIGH-DENSITY LOGIC ^n_mgjxu=LU=U=! u ijj_ n iijj_ u =ü_Q=n3 Output Routing Pool ] [ Output Routing Pool — — — —

Contextual Info: Q V Lattica V Ï Î i f c ispLSI3256A !Semiconductor I Corporation High Density Programmable Logic F u n c tio n a l B lo c k D iagram F eatures • HIGH-DENSITY PROGRAMMABLE LOGIC — 128 I/O Pins — 11000 PLD Gates — 384 Registers — High Speed Global Interconnect

Contextual Info: Lattice ispLSr and pLSI* 3256E Semiconductor I Corporation Features High Density Programmable Logic Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 256 I/O Pins — 11000 PLD Gates — 512 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State

Contextual Info: ±1% Tolerance 0402 to 1206 Chip Resistors Specifications - X 1 % Resistance Values OHM 0O 1 0 .0 0 f 10.2 a 1 0 .5 0 1 0 .7 0 1 1 .0 0 1 1 1 .3 0 1 1 .5 0 1 1 .8 0 7 2 .0 0 12.1Q. 1 2 .4 0 1 2 .7 0 1 3 .0 0 1 1 3 .3 0 1 3 .7 0 1 4 .0 0 1 4 .3 0 1 4 .7 0 1 5 .0 0 f

EQUIVALENT TIC 160D

Abstract: MHI-002 MM5311 equivalent transistor bf 175 LM5522 DM7441A lm1514 LH0032
Contextual Info: m Edge Index by Product Family Here is the new INTERFACE catalog from National Semiconductor Corporation. It contains complete information on all of National's INTERFACE products whether they be Linear, Digital, or MOS. It is the first such catalog in the industry and we hope it becomes your most im portant INTERFACE guide.

Contextual Info: is o 2-c m o s s t-b us-f a m ily MT8971B/72B M ITEL Digital Subscriber Interface Circuit Digital N etw ork Interface Circuit 9161-002-118-NA Features • • • • • • • • • ISSUE 2 Full duplex transmission over a single tw isted pair. Selectable 80 o r 160 kb it/s line rate.

GAL20XV10B-20LP

Abstract: ali 1631 GAL20XV10B SOCN ICE 47E
Contextual Info: LATTICE SEMICONDUCTOR M7E D 530^4^ Lattice DDDSG32 ILAT 4 G A L20XV10B T - 1/ 6 -1 9 - 0 7 High-Speed E’CMOS PLD Generic Array Logic FU N CTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E*CMOS* TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz

isp synario

Contextual Info: Product specification Philips Semiconductors 32 macrocell CPLD with enhanced clocking PZ3032C FEATURES DESCRIPTION • Industry’s first TotalCMOS PLD - both CMOS design and process technologies The PZ3032C CPLD Complex Programmable Logic Device is a