LTC2314-14
Abstract: 7803 3V 1A positive voltage regulator 1407A1 l 7803 3V Positive Voltage Regulator LTC5551 LTC6947 LTM2987 LT6236 LTC5577
Text: May 2014 New Products Catalog High Performance Analog ICs LTC6947 Ultralow Noise and Spurious 0.35GHz to 6GHz Fractional-N Synthesizer LTM2987 16-Channel µModule PMBus Power System Manager LTC3128 3A Monolithic Buck-Boost Supercapacitor Charger and Balancer with Accurate Input Current Limit
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LTC6947
35GHz
LTM2987
16-Channel
LTC3128
LT8301
42VIN
LT8471
LT8620
LT6020/LT6020-1
LTC2314-14
7803 3V 1A positive voltage regulator
1407A1
l 7803 3V Positive Voltage Regulator
LTC5551
LT6236
LTC5577
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Lucent SLC 2000
Abstract: f 4556 GR-253-CORE GR-499-CORE T7690 T7698 SA6H T7698-FL3-DB
Text: Data Sheet January 1999 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features • ■ ■ ■ ■ Integrated quad T1/E1 line interface and octal T1/ E1 receive frame monitor with HDLC processor provides system QoS capabilities. Hardware and software reset options.
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T7698
CB119
TR-54016
TR-TSY-000170
TR-TSY-000009
GR-499-CORE
GR-253-CORE
DS98-297T1E1
DS98-228TIC)
Lucent SLC 2000
f 4556
GR-253-CORE
GR-499-CORE
T7690
SA6H
T7698-FL3-DB
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2795C
Abstract: Digital Alarm Clock by ttl dis 5261 b f 4556 GR-253-CORE GR-499-CORE T7690 T7698 lucent dacs ii
Text: Data Sheet May 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features • ■ ■ ■ ■ ■ ■ Integrated quad T1/E1 line interface and octal T1/ E1 receive frame monitor with HDLC processor provides system QoS capabilities. Hardware and software reset options.
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T7698
CB119
TR-54016
TR-TSY-000170
TR-TSY-000009
GR-499-CORE
GR-253-CORE
DS02-241BBAC
DS98-297T1E1)
2795C
Digital Alarm Clock by ttl
dis 5261 b
f 4556
GR-253-CORE
GR-499-CORE
T7690
lucent dacs ii
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lucent dacs ii
Abstract: CRC-4 "Analog Line Interface" 7495 data sheet ANSI T1.102-93 dis 5261 b et 312 slc 500 circuit diagram T7698
Text: Advisory November 1998 T7698 Device Advisory for Version 2 of the Device Data Pattern Limitation of the LIU Internal Full Local Loopback FLLOOP Without Zero Substitution Coding One of the loopback modes in the quad line interface unit is the full local loopback (FLLOOP). This mode internally connects the LIU transmit driver to the LIU line receiver circuit. This loopback mode is controlled by primary (LIU) registers 6, 7, 8, and 9, bits 3 and 4; registers 6 through 9 control channels 1 through 4 of the
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T7698
DS98-228TIC
DS96-102TIC)
lucent dacs ii
CRC-4
"Analog Line Interface"
7495 data sheet
ANSI T1.102-93
dis 5261 b
et 312
slc 500 circuit diagram
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f 4556
Abstract: GR-253-CORE GR-499-CORE T7690 T7698 SR52 W 18
Text: Data Sheet September 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features • Integrated quad T1/E1 line interface and octal T1/ E1 receive frame monitor with HDLC processor provides system QoS capabilities. ■ ■ ■ ■ Hardware and software reset options.
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T7698
CB119
TR-54016
TR-TSY-000170
TR-TSY-000009
GR-499-CORE
GR-253-CORE
DS02-241BBAC-1
DS02-241BBAC)
f 4556
GR-253-CORE
GR-499-CORE
T7690
SR52 W 18
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SR52 W 18
Abstract: GR-253-CORE GR-499-CORE PR11 T7690 T7698 uig823
Text: a e re 8 AdLib OCR Evaluation systems Data Sheet September 2002 T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features . Integrated quad T1/E1 line interface and octal T1/ El receive frame monitor with HDLC processor provides system QoS capabilities .
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T7698
CB119
TR-54016
GR-499-CORE
GR-253-CORE
DS02-241
SR52 W 18
GR-253-CORE
GR-499-CORE
PR11
T7690
uig823
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CRT - TCL COLOUR TV SCHEMATIC DIAGRAM
Abstract: MATSUA compressor catalogue Riyadh Cables Catalogue PD 18N50 equivalent MATSUSHITA compressor catalogue CRT TCL COLOUR TV SCHEMATIC DIAGRAM Anritsu ML524B operation manual ML2430 CRT - tcl 29" COLOUR TV SCHEMATIC DIAGRAM Anritsu MG442A
Text: CONTENTS Outline of Anritsu Corporation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 How to Use This Catalog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Sales, Shipping, and Service Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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DMO 565 R
Abstract: chn 924 CHN G4 120
Text: xr XRT86L30 PRELIMINARY SINGLE T1/E1/J1 FRAMER/LIU COMBO JUNE 2005 REV. P1.0.2 GENERAL DESCRIPTION The XRT86L30 is a single channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86L30
XRT86L30
DMO 565 R
chn 924
CHN G4 120
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dmo 565 r
Abstract: 8214a CHN 549 chn 924 CHN 507 CHN 522 CHN 703 ST MEET CHN 507 chn 751 CHN 534
Text: XRT86L30 PRELIMINARY PRELIMINARY SINGLE T1/E1/J1 FRAMER/LIU COMBO MAY 2004 REV. P1.0.1 GENERAL DESCRIPTION The XRT86L30 is a single channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L30 provides protection
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XRT86L30
XRT86L30
dmo 565 r
8214a
CHN 549
chn 924
CHN 507
CHN 522
CHN 703
ST MEET CHN 507
chn 751
CHN 534
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CHN 932
Abstract: No abstract text available
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.1.0 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
CHN 932
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DMO 565 R
Abstract: chn 530 CHN 507 CHN 549 Transistor Checker Model LB-1 CHN 519 CHN 534 ST MEET CHN 507 CHN 545 chn 542
Text: XRT86L30 SINGLE T1/E1/J1 FRAMER/LIU COMBO JANUARY 2008 REV. 1.0.1 GENERAL DESCRIPTION The XRT86L30 is a single channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86L30
XRT86L30
DMO 565 R
chn 530
CHN 507
CHN 549
Transistor Checker Model LB-1
CHN 519
CHN 534
ST MEET CHN 507
CHN 545
chn 542
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dmo 565 r
Abstract: CHN 522 chn 542 chn 621 CHN 616 CHN 507 chn 638 chn 537 chn 543 CHN 618
Text: xr XRT86VL32 PRELIMINARY PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO SEPTEMBER 2004 REV. P1.0.1 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86VL32 provides protection
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XRT86VL32
XRT86VL32
dmo 565 r
CHN 522
chn 542
chn 621
CHN 616
CHN 507
chn 638
chn 537
chn 543
CHN 618
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DMO 565 R
Abstract: chn 648 equivalent CHN 507 CHN 618 CHN 552 TS13 SCR PIN CONFIGURATION CHN 035 dmo 265 chn 605 nB00
Text: XRT86VL32 PRELIMINARY PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO APRIL 2004 REV. P1.0.0 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86VL32 provides protection
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XRT86VL32
XRT86VL32
DMO 565 R
chn 648 equivalent
CHN 507
CHN 618
CHN 552
TS13
SCR PIN CONFIGURATION CHN 035
dmo 265
chn 605
nB00
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DMO 565 R
Abstract: CHN 652 CHN 933 chn 539 W0104 CHN 628 CHN 523 chn 648 equivalent 3667 ict XRT86L34IB
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO MAY 2004 REV. P1.1.1 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
DMO 565 R
CHN 652
CHN 933
chn 539
W0104
CHN 628
CHN 523
chn 648 equivalent
3667 ict
XRT86L34IB
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DMO 565 R
Abstract: chn 656 chn 637 chn 547 CHN 549 dmo 265 CHN 922 equivalent CHN 632 CHN 645 chn 648 equivalent
Text: XRT86L34 PRELIMINARY PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO JUNE 2004 REV. P1.1.3 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy . The physical interface is optimized with internal impedance, and with the patented pad structure, the XRT86L34 provides protection
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XRT86L34
XRT86L34
DMO 565 R
chn 656
chn 637
chn 547
CHN 549
dmo 265
CHN 922 equivalent
CHN 632
CHN 645
chn 648 equivalent
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chn 542
Abstract: No abstract text available
Text: xr XRT86VL32 PRELIMINARY DUAL T1/E1/J1 FRAMER/LIU COMBO FEBRUARY 2005 REV. P1.0.3 GENERAL DESCRIPTION The XRT86VL32 is a two-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .
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XRT86VL32
XRT86VL32
chn 542
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R807D
Abstract: No abstract text available
Text: R8070 *» Rockwell R8070 T1/CEPT PCM Transceiver INTRODUCTION FEATURES The R ockw ell R 8070 T1/C EPT PCM Transceiver is a m onolithic silicon gate C M O S device designed to im ple m en t PCM tra n s m itter and receiver functions applied in primary-rate digital carrier
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R8070
R807D
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet May 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7698 QuadT1/E1 Line Interface and Octal T1/E1 Monitor Features • Fully integrated quad T1/E1 line transceiver and octal T1/E1 receive framer/monitor with HDLC pro
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T7698
CB119
TR54016
TR-TSY-000170
TR-TSY000009
TR-TSY-000499,
TR-TSY-000253;
DS96-102TIC
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet May 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7698 QuadT1/E1 Line Interface and Octal T1/E1 Monitor Features • Fully integrated quad T1/E1 line transceiver and octal T1/E1 receive framer/monitor with HDLC pro
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T7698
CB119
TR54016
TR-TSY-000170
TR-TSY000009
TR-TSY-000499,
TR-TSY-000253;
005002b
002b740
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Untitled
Abstract: No abstract text available
Text: Preliminary Data Sheet May 1998 microel ect ro nic s group Lucent Technologies Bell Labs Innovations T7698 QuadT1/E1 Line Interface and Octal T1/E1 Monitor Features • Fully integrated quadT1/E1 line interface and octal T1/E1 receive framer/monitor with HDLC proces
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T7698
CB119
TR54016
TR-TSY-000170
TR-TSY000009
TR-TSY-000499,
TR-TSY-000253;
DS98-228TIC
DS96-102TIC)
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dis 5261 b
Abstract: f 4556 la 4548 T7630 T7690 T7698 Z915
Text: Preliminary Data Sheet May 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7698 QuadT1/E1 Line Interface and Octal T1/E1 Monitor Features • Fully integrated quad T1/E1 line transceiver and octal T1/E1 receive framer/monitor with HDLC pro
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T7698
CB119
TR-54016
TR-TSY-000170
TR-TSY-000009
TR-TSY-000499,
TR-TSY-000253;
005002b
100-Pin
dis 5261 b
f 4556
la 4548
T7630
T7690
Z915
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Untitled
Abstract: No abstract text available
Text: Data Sheet January 1999 microelectronics group Lucent Technologies Bell Labs Innovations T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor Features • Integrated quad T1/E1 line interface and octal T1/ E1 receive frame monitor with HDLC processor provides system QoS capabilities.
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OCR Scan
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T7698
CB119
TR-54016
TR-TSY-000170
TR-TSY-000009
GR-499-CORE
GR-253-CORE
T-7698â
100-Pin
DS98-297T1E1
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TTK SG 2368
Abstract: BV EI 303 3628 7 segment LD 1106 BS LM 6863 D I8253 yx 8018 0308 082c ez 422 BV EI 304 3083 0429 01 2701 00 RELE 12,8 mhz e 4895 lf
Text: AP-55A APPLICATION NOTE i n t e i A u g u s t 1979 S.A. Distributor E l e c t r o n ic \ \ B u il d in g E l e m e n t s p t y l t d PURVEYORS OF a l l ELECTRONIC COMWNENTS Tel eph on e 7 8 - 9 2 2 1 / 6 P O B o x 4 6 0 9 , Pretoria T e l e x 3 01 8 1 S A
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AP-55A
PR00UCT.
MCS-48
/TP-11/1179/5K
TTK SG 2368
BV EI 303 3628
7 segment LD 1106 BS
LM 6863 D
I8253
yx 8018 0308
082c ez 422
BV EI 304 3083
0429 01 2701 00 RELE
12,8 mhz e 4895 lf
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c8c1
Abstract: No abstract text available
Text: Im •■ § QT1F-P/us Device l/lf l T r T H ■ Quad T1 Framer-P/i/s TXC-03103 DATASHEET FEATURES DESCRIPTION • D4 SF; ESF (including HDLC Link support), and transparent framing modes • Delects, counts and forces line code errors (BPVs and excess zeros), CFC errors (ESF only), and frame bit
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TXC-03103
TXC-03103-MB
c8c1
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