36 OJ Search Results

72V3670L10

Abstract: 72V3680
Contextual Info: 3.3 VOLT HIGH-DENSITY 36-BIT SyncFIFO 4,096 x 36 8,192 x 36 16,384 x 36 32,768 x 36 65,536 X 36 131^ 72x36 FEATURES: • Choose among the following memory organizations: IDT72V3660 4,096 x 36 IDT72V3670 8,192x36 IDT72V3680 16,384x36 IDT72V3690 32,768 x 36

72V3680

Contextual Info: Integrated Device Technology, Inc. 3.3 VOLT HIGH-DENSITY 36-BIT SyncFlFO 4,096 x 36 8,192 x 36 1 6 ,3 8 4 x 3 6 32,768 x 36 65,536 x 36 1 3 1 ,0 7 2 x 3 6 FEATURES: • Choose among the following memory organizations: IDT72V3660 4 ,0 9 6 x 3 6 IDT72V3670

Contextual Info: QS725420A PRELIMINARY High-Speed CMOS 256 x 36 x 2 Bi-directional FIFO Ö QS725420A FEATURES/BENEFITS • • • • • • • Fast cycle times: 20/25/30/35 ns Two 256 x 36-bit FIFO buffers Full 36-bit word width Selectable 36/18/9-bit word width on port B

d22a

Contextual Info: QS725420A High-Speed CMOS 256 x 36 x 2 Bi-directional FIFO Q QS725420A FEATURES/BENEFITS • • • • • • • Fast cycle times: 20/25/30 ns Two 256 x 36-bit FIFO buffers Full 36-bit word width Selectable 36/18/9-bit word width on port B Fully asynchronous operation of port A and port B

Contextual Info: Integrated Device Technology, Inc. 3.3 VOLT CMOS TRIPLE BUS SyncFlFO WITH BUS-MATCHING 256 x 36 x 2, 512 x 36 x 2, 1,024x36x2 FEATURES: • Memory storage capacity: IDT72V3626-256 x 36 x 2 ID T72V3636-512 x 3 6 x 2 ID T72V 3646-1,024 x 36 x 2 • Clock frequencies up to 67 MHz 10ns access time

Contextual Info: QS723651. QS723661 PRELIMINARY High-Speed CMOS 2K x 36, 4K x 36 Clocked FIFO Q QS723651 QS723661 FEATURES • • • • • • Clocked interface 2K/4K x 36 FIFO Programmable Almost-Full and Empty flags Bi-directional mailbox registers Adjustable retransmit

418160d

Contextual Info: TM124MBJ36F, TM124MBJ36U 1 048576 BY 36-BIT DYNAMIC RAM MODULE TM248NBJ36F, TM248NBJ36U 2097152 BY 36-BIT DYNAMIC RAM MODULE S M M S 662-M A Y 1996 • Or ga n i za t i o n T M 1 2 4 M B J 3 6 F . . . 1 0 4 8 576 x 36 T M 2 4 8 N B J36F . . . 2 09 7 1 52 x 36

Contextual Info: 3.3 VOLT CMOS SyncBiFlFO 256x36x2, 512x36x2, 1 ,02 4 x3 6 x 2 I dt PRELIMINARY IDT72V3622 IDT72V3632 IDT72V3642 Integrated Device Technology, Inc. FEATURES: • Memory storage capacity: IDT72V3622-256 x 36 x 2 1DT72V3632-512 x 36 x 2 IDT72V3642-1,024 x 36 X 2

Contextual Info: Integrated Devile Technology, lie. CMOS TRIPLE BUS SyncFIFOT WITH BUS-MATCHING AND BYTE SWAPPING 64 x 36 x 2 FEATURES: • Two independent FIFOs 64 X 36 storage capacity each buffer data between bidirectional 36-bit port A and two unidirectional 18/9-bit ports (Port B transmits, Port C

Contextual Info: CMOS Bus Matching SyncFlFO 256 x 36, 512 x 36, 1024 x 36 IJ d t PRELIMINARY ¡¡£¡^23623 IDT723643 Integrated Device Technology, Inc. FEATURES: Big- or Little-Endian form at for w ord and byte bus sizes M aster Reset clears data and configures FIFO, Partial

TK 19 1380

Abstract: FLF01
Contextual Info: CMOS SyncBiFlFO with Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1,024x36x2 Integrated Device Technology, lie. IDT723624 IDT723634 IDT723644 • Port B bus sizing of 36-bits long word , 18-bits (word) and 9-bits (byte) • Big- or Little-Endian format for word and byte bus sizes

Contextual Info: CMOS SyncBiFlFO with Bus-Matching 256 x 36 x 2, 512 x 36 x 2, 1,024x36x2 Integrated Device TechnoJogy, Sc. IDT723624 IDT723634 IDT723644 • Port B bus sizing of 36-bits long word , 18-bits (word) and 9-bits (byte) • Big- or Little-Endian format for word and byte bus sizes

MB87030

Abstract: sdb01 MB87031 EXBF fpt-1 MB87035
Contextual Info: MB87035/36 SCSI Protocol Controller SPC for use with Differential or Single-end Drivers Edition 1.0 September 1989 GENERAL DESCRIPTION The MB87035/36 SCSI Protocol Controller (SPC) Is a CMOS LSI circuit specifically designed to control a Small Computer Systems Interface (SCSI). The MB87035/36 is an enhanced version of Fujitsu’s

Nippon capacitors

Contextual Info: HB56E836 Series, HB56E436 Series 8388608-word x 36-bit High Density Dynamic RAM Module 4194304-word x 36-bit High Density Dynamic RAM Module HITACHI ADE-203-673 Z Preliminary Rev. 0.0 Oct. 18, 1996 Description The HB56E836 Series is a 8 M x 36 Dynamic RAM Module, mounted 16 pieces of 16-Mbit DRAM

MB87030

Contextual Info: MB87035/36 SCSI Protocol Controller SPC lor use with Differential or Single-end Drivers E dition 1.0 S e p te m b e r 1989 GENERAL DESCRIPTION The MB87035/36 SCSI Protocol Controller (SPC) is a CMOS LSI circuit specifically designed to control a Small Computer Systems Interface (SCSI). The MB87035/36 is an enhanced version of Fujitsu’s

TC55VD836FFI-133

Contextual Info: TOSHIBA TC55VD836FFI-133,-143 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 262,144-WORD BY 36-BIT SYNCHRONOUS NO-TURNAROUND STATIC RAM DESCRIPTION The TC55VD836FFI is a synchronous static random access memory SRAM organized as 262,144 words by 36

Contextual Info: TOSHIBA TC55VD836FFI-133,-143 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 262,144-WORD BY 36-BIT SYNCHRONOUS NO-TURNAROUND STATIC RAM DESCRIPTION The TC55VD836FFI is a synchronous static random access memory SRAM organized as 262,144 words by 36

d432937

Contextual Info: DATA SHEET_ NEC MOS INTEGRATED CIRCUIT UPD432937 2M-BIT CMOS SYNCHRONOUS FAST SRAM 64K-WORD BY 36-BIT PIPELINED OPERATION / HSTL INTERFACE Description The ,uPD432937 is a 65,536-word by 36-bit synchronous static RAM fabricated with advanced CMOS technology

d432937

Abstract: TRANSISTOR MARKING A33 MXXXXX O-I/025
Contextual Info: DATA SHEET_ NEC MOS INTEGRATED CIRCUIT UPD432937 2M-BIT CMOS SYNCHRONOUS FAST SRAM 64K-WORD BY 36-BIT PIPELINED OPERATION / HSTL INTERFACE Description The ,uPD432937 is a 65,536-word by 36-bit synchronous static RAM fabricated with advanced CMOS technology

Contextual Info: Uniti m P —Z IP 2 8 —400—1.27 3. 05±0 2 OJ o +1 X c co n co co OJ o +1 o - o +1 in 'co lo, 25 -8: ¿5 2. 54 36, 7MAX 36, 2±0, 2 iT T T T T T T T T T T T T lt 12 28 Nov,2003

Contextual Info: 128K x 36, 3.3V Synchronous IDT71V546 SRAM with ZBT Feature, Burst Counter and Pipelined Outputs i f l l > * * « « * : Features * 128K x 36 memory configuration, pipelined outputs clock cycle, and two cycles later Its associated data cycle occurs, be it

Contextual Info: TriQuint <+ Advance Product Information SEMICONDUCTOR* 36 - 40 GHz Power Amplifier TGA1071-EPU Key Features and Performance 0.25um pHEMT Technology 36-40 GHz Frequency Range 22 dBm Nominal Pout @ P1dB 15 dB Nominal Gain 5V, 120 mA Bias Chip Dimensions 3.4mm x 2.1 mm

2N1208

Abstract: 2N1209 2N1212 2N1616 2N1616A 2N1617 2N1617A 2N1618 2N1724 2N2101
Contextual Info: POWER TRANSISTORS A Sat Test Voltages Conditions * 7 7 * hTM m m mrm lir a y y V A A ma 80 6 .5 12 36 .5 10 7.5 6.0 .5 .250 120 120 6 .5 12 36 .5 10 7.5 6.0 .5 .250 40 80 80 6 .5 30 90 .5 10 7.5 6.0 .5 .250 120 6 .5 30 90 .5 10 7.5 6.0 .5 .1 .250 12 36 .5

Contextual Info: | CMOS Bus-Matching SyncFlFO 256 x 36, 512 x 36,1,024 x 36 dt PRELIMINARY ¡DT723633 IDT723643 Integrated D ev ic e Techno logy, Inc. NOTE: There is an errata notice on the last page and the corrections have been incorporated into this document. FEATURES: