30 PIN LVDS CABLE Search Results

Contextual Info: DS90LV804 4-Channel 800 Mbps LVDS Buffer/Repeater General Description Features The DS90LV804 is a four channel 800 Mbps LVDS buffer/ repeater. In many large systems, signals are distributed across cables and signal integrity is highly dependent on the data rate, cable type, length, and the termination scheme. In

Contextual Info: SN75LVDT1422 www.ti.com SLLS653 – JUNE 2005 14-BIT FULL DUPLEX SERIALIZER/DESERIALIZER FEATURES • • • • • • • • • 10 MHz to 100 MHz Shift Clock Support 175 Mbytes/sec In TX/RX Modes Reduces Cable Size, Cost, and System EMI Bidirectional Data Communication

dielectric constant of 4.4, loss tangent of 0.02 of FR4

Abstract: fr-4 dielectric constant 4.4
Contextual Info: DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis General Description Features The DS25BR120 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. Fully differential signal paths ensure exceptional signal

A115

Abstract: C101 SN75LVDT1422 183T2
Contextual Info: SN75LVDT1422 www.ti.com SLLS653 – JUNE 2005 14-BIT FULL DUPLEX SERIALIZER/DESERIALIZER FEATURES • • • • • • • • • 10 MHz to 100 MHz Shift Clock Support 175 Mbytes/sec In TX/RX Modes Reduces Cable Size, Cost, and System EMI Bidirectional Data Communication

AN-1187

Abstract: DS10BR150 DS10BR150TSD SDA08A
Contextual Info: DS10BR150 1.0 Gbps LVDS Buffer / Repeater General Description Features The DS10BR150 is a single channel 1.0 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity

DS90C124

Contextual Info: May 2006 DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description The DS90C241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by

DS90UR124

Abstract: AN-1217 DS90C124 DS90UR241 ISO10605 245RL
Contextual Info: September 2006 DS90UR241/DS90UR124 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by

DS90C124

Abstract: AN-1108 AN-1217 DS90C241 ISO10605
Contextual Info: DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description The DS90C241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by

Contextual Info: DS10CP154A 1.5 Gbps 4x4 LVDS Crosspoint Switch General Description Features The DS10CP154A is a 1.5 Gbps 4x4 LVDS crosspoint switch optimized for high-speed signal routing and switching over FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity. The non-blocking architecture

DS10CP152

Abstract: DS10CP152TMA M16A SOIC-16
Contextual Info: DS10CP152 1.5 Gbps 2X2 LVDS Crosspoint Switch General Description Features The DS10CP152 is a 1.5 Gbps 2x2 LVDS crosspoint switch optimized for high-speed signal routing and switching over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal

Contextual Info: 19-3029; Rev 2; 8/08 KIT ATION EVALU E L B AVAILA 1.8V, 10-Bit, 250Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications Applications Wireless and Wired Broadband Communication Cable-Head End Systems Digital Predistortion Receivers Communications Test Equipment

AN-808

Abstract: AN-971 AN-977 DS92LV090A DS92LV090ATVEH
Contextual Info: DS92LV090A 9 Channel Bus LVDS Transceiver General Description Features The DS92LV090A is one in a series of transceivers designed specifically for the high speed, low power proprietary backplane or cable interfaces. The device operates from a single 3.3V power supply and includes nine differential line drivers

LMH0340

Abstract: FPGA BOARD NATIONAL INSTRUMENTS
Contextual Info: LMH0040,LMH0050,LMH0070,LMH0340 LMH0340, LMH0040, LMH0070, LMH0050 3 Gbps, HD, SD, DVB-ASI SDI Serializer and Cable Driver with LVDS Interface Literature Number: SNLS271H 3 Gbps, HD, SD, DVB-ASI SDI Serializer and Cable Driver with LVDS Interface General Description

Contextual Info: DS92LV040A 4 Channel Bus LVDS Transceiver General Description Features The DS92LV040A is one in a series of Bus LVDS transceivers designed specifically for high speed, low power backplane or cable interfaces. The device operates from a single 3.3V power supply and includes four differential line drivers

Contextual Info: DS92LV040A DS92LV040A 4 Channel Bus LVDS Transceiver Literature Number: SNOS521C DS92LV040A 4 Channel Bus LVDS Transceiver General Description Features The DS92LV040A is one in a series of Bus LVDS transceivers designed specifically for high speed, low power backplane or cable interfaces. The device operates from a single

62G3

Contextual Info: SCAN92LV090 9 Channel Bus LVDS Transceiver w/ Boundary SCAN General Description The SCAN92LV090A is one in a series of Bus LVDS transceivers designed specifically for the high speed, low power proprietary backplane or cable interfaces. The device operates from a single 3.3V power supply and includes nine

Contextual Info: CMOS area image sensors S10830 S10834 CMOS area image sensors for X-ray imaging S10830 is CMOS area image sensor suitable for intra-oral X-ray imaging in dental diagnosis. S10830 has 1.5 megapixels 1000 x 1500 with a pixel size of 20 × 20 m. FOP (fiber optic plate) is used as an input window, making S10830 high imagequality and long-term X-ray life. S10834 is an easy-to-use X-ray imaging module using S10830 with a cable. S10830 has 14bit ADC on chip and LVDS digital output signal. These features are to contribute cost reduction in a user’s system. S10831

1838 b ir sensor

Abstract: 1838 t ir receiver ir receivers 1838 1838 pin configuration ir 1838 ir sensor IR 1838 TO PIN DIAGRAM 1838 ir receiver 1838 t ir sensor, 3 pin ir sensor 1838 IR 1838 3.3 v
Contextual Info: CAMELIACOL 2.5M 2.5 MEGAPIXEL COLOR DIGITAL CAMERA User guide CAMELIA PACKAGE CONTENTS : Depending on the selected configuration, a CAMELIA package may include : ♦ CAMELIA COLOR camera ♦ FGT COLOR frame grabber board ♦ ‘’Power supply’’ cable + ‘’RS232’’ cable

EP20K1000E

Abstract: EP20K400E EP20K600E 10226-1A10VE ldvs connector altlvds_tx vhdl code for lvds driver vhdl code for lvds receiver
Contextual Info: Using LVDS in APEX 20KE Devices July 2001, ver. 1.1 Application Note 120 Introduction Because complex designs continually demand more bandwidth, designers need a high-performance solution that offers fast data transfer and low power consumption. To address this need, Altera has

Contextual Info: J t Ú Te x a s LMH0395 ▼ In s tr u m e n ts 3G HD/SD SDI Dual Output Low Power Extended Reach Adaptive Cable Equalizer General Description Features The LMH0395 3 Gbps HD/SD SDI Dual Output Low Power Extended Reach Adaptive Cable Equalizer is designed to

THC63LVDM83R

Abstract: lvds 20 pin lcd lvds 30 pin lcd LVDS 18bit lvds 20 pin lcd panel LVDS Transmitter THine Thine THC63LVDM83R THC63LVDM63R thc63lvdm83 DS90C363
Contextual Info: THC63LVDM83R/THC63LVDM63R_Rev2.0 THC63LVDM83R/THC63LVDM63R REDUCED SWING LVDS 24Bit/18Bit COLOR HOST-LCD PANEL INTERFACE General Description Features The THC63LVDM83R transmitter converts 28bits of CMOS/TTL data into LVDS Low Voltage Differential Signaling data stream. A phase-locked transmit clock

Contextual Info: PTN3460 eDP to LVDS bridge IC Rev. 3 — 13 February 2014 Product data sheet 1. General description PTN3460 is an embedded DisplayPort to LVDS bridge device that enables connectivity between an (embedded) DisplayPort (eDP) source and LVDS display panel. It processes

424M

Abstract: video sdi splitter
Contextual Info: LMH0395 3G HD/SD SDI Dual Output Low Power Extended Reach Adaptive Cable Equalizer General Description Features The LMH0395 3 Gbps HD/SD SDI Dual Output Low Power Extended Reach Adaptive Cable Equalizer is designed to equalize data transmitted over cable or any media with similar dispersive loss characteristics . The equalizer operates

Contextual Info: 19-2828; Rev 5; 3/12 KIT ATION EVALU E L B A IL AVA Programmable DC-Balanced 21-Bit Serializers Features The MAX9209/MAX9213 serialize 21 bits of LVTTL/ LVCMOS parallel input data to three LVDS outputs. A parallel rate clock on a fourth LVDS output provides