3 INPUT OR GATE Search Results

DM74LS51

Abstract: 54LS51DMQB 54LS51FMQB 54LS51LMQB DM74LS51M DM74LS51N E20A J14A M14A 54LS51
Contextual Info: DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates Each package contains one 2-wide 2-input and one 2-wide 3-input AND-OR-INVERT gates. General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function.

74LVC1G386

Abstract: 74LVC1G386GV 74LVC1G386GW
Contextual Info: 74LVC1G386 3-input EXCLUSIVE-OR gate Rev. 02 — 3 September 2007 Product data sheet 1. General description The 74LVC1G386 provides a 3-input EXCLUSIVE-OR function. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices in a mixed 3.3 and 5 V environment.

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D N14A
Contextual Info: 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate 3-3 AND-OR-INVERT function. General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a Ordering Code: Commercial Package Number

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Contextual Info: Revised September 2000 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code:

SP384A

Abstract: SP334A SP374A 7333-A 380J SP333A SP375A
Contextual Info: OR GATES SP333A SP334A SP374A SP375A SP384A Dual 3-Input Expandable Dual 4-Input Expandable Triple 3-Input Triple 2-Input Quad 2-Input PIN CONFIGURATIONS 14 13 12 11 10 9 TRIPLE 3-INPUT DUAL 4-INPUT EXPANDABLE DUAL 3-INPUT EXPANDABLE 8 U 13 12 11 10 9 14 8

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4071

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

7706002CA

Abstract: CD4071B CD4071BE CD4071BF CD4071BF3A CD4071BM CD4071BM96 CD4071BM96E4 CD4072B CD4075B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4075

Abstract: cd4071
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4071B

Abstract: CD4072B CD4075B MS-001 SCHS056D
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

7706002CA

Abstract: CD4071B CD4071BE CD4071BEE4 CD4071BF CD4071BF3A CD4071BF3AS2534 CD4071BM CD4072B CD4075B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

cd4075

Abstract: CD4071 CD4072 CD4071B CD4072B CD4075B MS-001 "OR Gates"
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4075B

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056C – Revised June 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Contextual Info: Revised July 1999 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code: Order Number

CD4072

Abstract: IC 7448 7448 ic diagram IC 7446 pin diagram CD4071 CD4071BMS CD4072BMS CD4075 CD4075BMS pin diagram of ic 7447
Contextual Info: CD4071BMS, CD4072BMS CD4075BMS CMOS OR Gate December 1992 Features Pinout • High-Voltage Types 20V Rating CD4071BMS TOP VIEW • CD4071BMS Quad 2-Input OR Gate • CD4072BMS Dual 4-Input OR Gate A 1 14 VDD B 2 13 H J=A+B 3 12 G K=C+C 4 11 M = G + H • CD4075BMS Triple 3-Input OR Gate

TC4072BP

Abstract: TC4075BP TC4075 TC4072BF
Contextual Info: TC4071BP/BF, TC4072BP/BF, TC4075BP/BF C2M O S DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4071BP/TC4071BF QUAD 2 INPUT OR GATE TC4072BP/TC4072BF DUAL 4 INPUT OR GATE TC4075BP/TC4075BF TRIPLE 3 INPUT OR GATE TC4071BP/BF, TC4075BP/BF and TC4072BP/BF are

74AUP1G386

Abstract: 74AUP1G386GF 74AUP1G386GM 74AUP1G386GW 74AUP1G386GN
Contextual Info: 74AUP1G386 Low-power 3-input EXCLUSIVE-OR gate Rev. 4 — 5 August 2010 Product data sheet 1. General description The 74AUP1G386 provides a single 3-input EXCLUSIVE-OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall

Contextual Info: ss DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR- INVERT GATE DESCRIPTION The T54LS51/T74LS51 is a high speed DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR INVERT GA­ TE fabricated in LOW POWER SCHOTTKY tech­ nology. I 1 1 B1 D1/D2 Plastic Package Ceramic Package s M1 / C1

Contextual Info: S G S-THOMSON Si » 7 ci 2 ci 2 3 7 D0332Ö2 T ISGTH -15 SGS-THOMSON T74LS51 ¡y DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR-INVERT GATE DESCRIPTIO N The T74LS51 is a high speed DUAL 2-WIDE 2INPUT / 3-INPUT AND-OR-INVERT GATE fabri­ cated in LOW POWER SCHOTTKY technology.

3-input orgate

Abstract: SOT-120 74AUP1G332 74AUP1G332GF 74AUP1G332GM 74AUP1G332GW
Contextual Info: 74AUP1G332 Low-power 3-input OR-gate Rev. 3 — 7 October 2010 Product data sheet 1. General description The 74AUP1G332 provides a single 3-input OR gate. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.