3 BUS SYSTEM Search Results

Contextual Info: IDT74LVCH16652A 3.3 V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD device is organized as two independent 8-bit bus transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between A bus and B bus

0A48

Abstract: IDT74ALVCHR16501 SO56-2
Contextual Info: IDT74ALVCHR16501 EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER W/3-STATE OUTPUTS 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: IDT74ALVCHR16501 DESCRIPTION: This 18-bit universal bus transceiver is built using advanced dual

Contextual Info: IDT74LVCH16245A 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE IDT74LVCH16245A 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: This 16-bit bus transceiver is built using advanced dual metal CMOS

IDT74LVCH245A

Contextual Info: IDT74LVCH245A 3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: IDT74LVCH245A ADVANCE INFORMATION DESCRIPTION: – –

74ALS244B-1WM

Abstract: 74ALS244B-1N DM74ALS244AN 74LS DM74ALS244ASJ DM74ALS244AWM DM74ALS244 ALS244B-1 DM74ALS244BSJ ALS244B
Contextual Info: DM74ALS244A/74ALS244B-1 Octal 3-STATE Bus Driver General Description Features This octal 3-STATE bus driver is designed to provide the designer with flexibility in implementing a bus interface with memory, microprocessor, or communication systems. This device offers 64-extended temperature Grade product guaranteeing performance from −40˚C to +85˚C. The output

74ABT373

Abstract: 74ABT373CMSA 74ABT373CMTC 74ABT373CSC 74ABT373CSJ ABT373 M20D MSA20 MTC20
Contextual Info: 74ABT373 Octal Transparent Latch with 3-STATE Outputs tm Features General Description • 3-STATE outputs for bus interfacing The ABT373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flipflops appear transparent to the data when Latch Enable

56DL

Abstract: SN74AS841
Contextual Info: TYPES SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D TYPE LATCHES WITH 3 STATE OUTPUTS D 2 8 2 5 , DECEMBER 1983 • 3-State Buffer-Type Outputs Drive Bus-Lines Directly • Bus-Structured Pinout

D 245A

Abstract: IDT74LVCH32245A LVCH32245A 3b43b
Contextual Info: IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER W/ 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE IDT74LVCH32245A 3.3V CMOS 32-BIT ADVANCE BUS TRANSCEIVER INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: – – – – –

IDT74LVCH2245A

Abstract: LVCH2245A
Contextual Info: IDT74LVCH2245A 3.3V CMOS OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL BUS IDT74LVCH2245A TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, AND BUS-HOLD DESCRIPTION: FEATURES: – – 0.5 MICRON CMOS Technology

Overdrive

Contextual Info: IDT74ALVCH162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT BUS TRANSCIEVER WITH 3-STATE OUTPUTS AND BUS-HOLD IDT74ALVCH162245 FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK o (Output Skew) < 250ps

4G25

Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM I2C BUS EEPROM 2-Wire BR24G256-3 General Description BR24G256-3 is a serial EEPROM of I2C BUS Interface Method Packages W(Typ) x D(Typ) x H(Max) Features „ Completely conforming to the world standard I2C BUS.

BR24G32FVM-3

Abstract: BR24G32NUX
Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM I2C BUS EEPROM 2-Wire BR24G32-3 General Description BR24G32-3 is a serial EEPROM of I2C BUS Interface Method Packages W(Typ) x D(Typ) x H(Max) Features „ Completely conforming to the world standard I2C BUS.

Contextual Info: HD74HCT620, HD74HCT623 Octal Bus Transceivers with inverted 3-state outputs Octal Bus Transceivers (with 3-state outputs) REJ03D0671–0200 (Previous ADE-205-561) Rev.2.00 Mar 30, 2006 Description This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control

Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM I2C BUS EEPROM 2-Wire BR24G16-3 General Description BR24G16-3 is a serial EEPROM of I2C BUS Interface Method Packages W(Typ) x D(Typ) x H(Max) Features „ Completely conforming to the world standard I2C BUS.

Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM I2C BUS EEPROM 2-Wire BR24G04-3 General Description BR24G04-3 is a serial EEPROM of I2C BUS Interface Method Features Packages W(Typ) x D(Typ) x H(Max) „ Completely conforming to the world standard I2C BUS.

Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM I2C BUS EEPROM 2-Wire BR24G32-3 General Description BR24G32-3 is a serial EEPROM of I2C BUS Interface Method Packages W(Typ) x D(Typ) x H(Max) Features „ Completely conforming to the world standard I2C BUS.

DM74AS640

Abstract: DM74AS640N DM74AS640WM
Contextual Info: DM74AS640 3-STATE Octal Bus Transceiver General Description This advanced Schottky device contains 8 pairs of 3-STATE logic elements configured as octal bus transceiver. This circuit is designed for use in memory, microprocessor systems and in asynchronous bidirectional data buses. This device

bc 147 transistor

Abstract: BC 107 transistor technical details transistor BC 147 BC 107 transistor equivalent transistor bc 172 b 1553B MA3690 MA3693 3-1553B
Contextual Info: MA3690/1/3 MA3690/1/3 1553B Bus Controller/Remote Terminal Replaces June 1999 version, DS3587-4.0 The MA3690/1 chip set has three modes of operation: remote terminal, bus controller, and passive monitor It has a dual bus capability, requires minimum support hardware /

diode sy 710

Abstract: YMB 24 H 04 D 35 sy 164 16-BYTE 80386DXRP 80386DXRP-16 80386DXRP-20 3BS16 T2716
Contextual Info: 80386DXRP SPACE PRODUCTS GROUP SE22V10B SEGMENTATION UNIT EFFECTIVE ADDRESS BUS PAGING UNIT 3-INPUT ADDER BUS CONTROL 34 PAGE CACHE LIMIT AND ATTRIBUTE PLA BUS PROTECTION TEST UNIT CONTROL AND ATTRIBUTE PLA INTERNAL CONTROL BUS BARREL SHIFTER, ADDER DECODE AND

DL122

Abstract: MC10H123
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Triple 4-3-3-Input Bus Driver MC10H123 The MC10H123 is a triple 4–3–3–Input Bus Driver. The MC10H123 consists of three NOR gates designed for bus driving applications on card or between cards. Output low logic levels are specified with

SOIC-20W

Abstract: MC74ACT640 MC74ACT640DW MC74ACT640DWG MC74ACT640DWR2 MC74ACT640DWR2G MC74ACT640MEL MC74ACT640MELG MC74ACT640N MC74ACT640NG
Contextual Info: MC74ACT640 Octal 3−State Inverting Transciever The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to

MC74AC640DT

Abstract: MC74AC640DWR2 MC74AC640MEL MC74ACT640 MC74ACT640DTR2 MC74ACT640DW MC74ACT640M MC74ACT640N
Contextual Info: MC74ACT640 Octal 3-State Inverting Transciever1 The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to

nippon capacitors

Abstract: DL140 MC100E336 MC10E336
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3ĆBit Registered Bus Transceiver MC10E336 MC100E336 The MC10E/MC100E336 contains three bus transceivers with both transmit and receive registers. The bus outputs BUS0–BUS2 are specified for driving a 25Ω bus; the receive outputs (Q0 – Q2) are

Contextual Info: SN54HC125, SN74HC125 QUADRUPLE BUS BUFFER GATES WITH 3ĆSTATE OUTPUTS SCLS104D − MARCH 1984 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D High-Current 3-State Outputs Interface D Directly With System Bus or Can Drive Up To 15 LSTTL Loads