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AM29827

Abstract: CY54FCT827BTDMB CY74FCT827CTQC CY74FCT827CTSOC
Contextual Info: fax id: 7005 1CY 54/7 4FCT827 T CY54/74FCT827T 10-Bit Buffer Features • Sink current • Function, pinout and drive compatible with FCT, F, and AM29827 logic • FCT-C speed at 4.4ns max. Com’l FCT-A speed at 5.0ns max. (Com’l) • Reduced VOH (typically = 3.3V) versions of equivalent

b9236

Abstract: B9233 CY7B923-jC CY7B933 CY7B923 foto sensor B9237 7B923
Contextual Info: CY7B923 CY7B933 HOTLink Transmitter/Receiver Features • • • • • • • • • • • • • • • • • • • that transfer data over high-speed serial links fiber, coax, and twisted pair . Standard HOTLink data rates range from 160-330 Mbits/second. Higher speed HOTLink is also available for high speed applications (160-400 Mbits/second), as

20RA10

Abstract: 20RA10-15 PLDC20RA10 PLDC20RA10-15JC RA1021
Contextual Info: fax id: 6015 1P LDC20 RA10 PLDC20RA10 Reprogrammable Asynchronous CMOS Logic Device Features • • • • • • • • • — ICC max = 85 mA Military • High reliability — Proven EPROM technology Advanced-user programmable macrocell CMOS EPROM technology for reprogrammability

CY7C263-35PC

Abstract: 7C261 CY7C263 CY7C26345DMB cerdip z PACKAGE 7C264 C261 CY7C261 CY7C264 f1b0
Contextual Info: CY7C261 CY7C263/CY7C264 CYPRESS Features • CMOS for optimum speed/power • Windowed for reprogrammability • High speed — 20 ns commercial — 25 ns (military) • Low power — 660 mW (commercial) — 770 m\V (military) • Super low standby power (7C261)

AM29827

Abstract: CY74FCT2827CTPC
Contextual Info: CY54/74FCT2827T CYPRESS 10-Bit Buffer • Matched rise and fall times • Fully compatible with TTL input and output logic levels • Sink current 12 mA Com’l , 12 mA (Mil) Source current 15 mA (Com’l), 12 mA (Mil) Features • Function and pinout compatible with

CY7C225A

Contextual Info: CY7C225A '= C Y P R E S S Features • CMOS for optimum speed/power • High speed — 18 ns address set-up — 12 ns clock to output • Low power — 495 mW commercial — 660 mW (military) • Synchronous and asynchronous out­ put enables • On-chip edge-triggered registers

AM29827

Abstract: CY74FCT827CTQC CY74FCT827CTSOC
Contextual Info: fax id: 7005 CY54/74FCT827T 10-Bit Buffer Features • Sink current • Function, pinout and drive com patible with AM29827 logic • FCT-C speed at 4.4ns max. Com ’I FCT-A speed at 5.0ns max. (Com ’I) • Reduced V qh (typically = 3.3V) versions of

L496D

Abstract: 9l reset CY7C331 ST L11922 0423-J
Contextual Info: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,

Contextual Info: CY54/74FCT2652T ^ 0 CYPRESS Features • Function and pinout compatible with FCT and F logic • FCT-C speed at 5.4 ns max. Com’l FCT-A speed at 6»3 ns max. (Com’l) • 25Q output series resistors to reduce transmission line reflection noise • Reduced V oh (typically = 3.3V)

CY74FCT2543DTQC

Abstract: 15T11
Contextual Info: “ Features • Function and pin ou t com p atib le with FC T and F logic • FCT-C speed at 5.3 ns m ax. Com*l FCT-A speed at 6.5 n s m ax. (C om ’l) • 25W output series resistors to reduce tra n sm ission lin e reflection n oise • R educed V oh (typically = 3 3 V )

Contextual Info: CY54/74FCT841T CYPRESS Features • Function, pinout and drive compatible with FCT, F, and AM29841 logic • FCT-C speed at 5.5ns max. Com’l FCT-B speed at 6.5ns max. (Com’l) 10-Bit Latch • Fully compatible with TTL input and output logic levels • Sink current

Contextual Info: PAL22V10C _ PAL22VP10C Universal PAL Device SEMICONDUCTOR Features • • Ultra high speed supports today’s and tomorrow’s fastest microprocessors 10 user>programmable output macrocells — Output polarity control — Registered or combinatorial

Contextual Info: CY7C330 C Y P R E S S •0 Features • Twelve I/O macrocells each having: — registered, three-state I/O pins — input register clock select multi­ plexer — feed back multiplexer — output enable OE multiplexer • All twelve macrocell state registers

Contextual Info: 7 PLD20G10C C YPRESS • Features • Ultra high speed supports today’s and tomorrow’s fastest microprocessors Generic 24-Pin PAL Device 10 user-programmable output macrocells — Output polarity control — Registered or combinatorial operation — tpo = 7.5 ns

Contextual Info: PLDC20G10B/PLDC20G10 CYPRESS Features • Fast — Commercial: tpp - 15 ns, tc o — 10 ns, tg = 12 ns — Military: tpp = 20 ns, tc o = 15 ns, tg = 15 ns CMOS Generic 24-Pin Reprogrammable Logic Device • Generic architecture to replace stan­ dard logic functions including: 20L10,

Contextual Info: fax id: 6011 PALCE22V10 'CYPRESS Flash Erasable, Reprogrammable CMOS PAL Device 5 ns tPD 181-MHz state machine Features • Low power — 90 mA max. commercial 10 ns — 130 mA max. commercial (5 ns) • CMOS Flash EPROM technology for electrical erasability and reprogramm ability

Contextual Info: CYBUS3384 CYBUS3L384 CYPRESS Features Dual 5-Bit Bus Switch Functional Description Zero propagation delay 20. switches connect inputs to outputs Direct bus connection when switches are ON High >500 Meg O. resistance when switch is OFF Performs bidirectional translator function between

Contextual Info: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin

Contextual Info: ¿S* rszgggfpr rP ìF p n CY29FCT818T n L> I 1 i l ì L O O Diagnostic Scan Register circuits, where it is desirable to load known data at a specific location in the circuit and to read the data at that location. Features • Function, pinout and drive compatible with FCT, F Logic

Contextual Info: fax id: 5004 CY7B923 CY7B933 H O TLink T ra n sm itte r/R e ce ive d Features • • • • • • • • • • • • • • • • • twisted pair at data rates from 160 to 330 Mbits/second 400 Mbits/second for -400 devices). Figure 1 illustrates typical

Contextual Info: fax id: 7005 W CYPRESS CY54/74FCT827T 10-Bit Buffer Features S in k c u rre n t • F u n ctio n , p in o u t and d riv e c o m p a tib le w ith FCT, F, and AM29827 lo g ic • FCT-C speed at 4.4ns m ax. C o m ’ I FCT-A speed at 5.0ns m ax. (C o m ’ I)

Contextual Info: CY54/74FCT480T '0 C Y P R E S S Features • Function, pinout and drive compatible with FCT and F logic • FCT-A speed at 7.5 ns max. Com’l FCT-B speed at 5.6 ns max. (Com’l) • Reduced Voh (typically = 33V) versions of equivalent FCT functions • Edge-rate control circuitry for

Contextual Info: CYPRESS SEMICONDUCTOR Flash Erasable, Reprogrammable CMOS PAL Device DIP, LCC, and PLCC available — 7.5 ns commercial version 5 ns tco 5 ns t§ 7.5 ns tpo 133-MHz state machine — 10 ns military and industrial ver­ sions 6 ns tco 6 ns tg 10 ns tpo 110-MHz state machine

Contextual Info: CY54/74FCT2543T y CYPRESS Features • Function and pinout compatible with FCT and F logic 8-Bit Latched Transceiver • Back to back latches for storage • FCT-C speed at 5.3 ns max. Com’l FCT-A speed at 6.5 ns max. (Com’l) • E S D > 2000V • 25W output series resistors to reduce