255X64 Search Results

256l18

Abstract: 256l30 sar106 1024Mbit 1024-Mbit PF48F 298132 PBA 16-10
Contextual Info: Intel StrataFlash£ Wireless Memory System LV18/LV30 SCSP 1024-Mbit LV Family Datasheet Product Features • ■ ■ ■ ■ Device Architecture — Flash die density: 128-, 256-Mbit — Top or Bottom flash parameter configuration Device Voltage — Core: VCC = 1.8 V (Typ)

16-PSK

Abstract: 16PSK viterbi decoder for tcm decoders branch metric XOR 7486 CS3410 64 tcm trellis differential encoder for psk Convolutional Encoder viterbi IESS-308/309
Contextual Info: CS3410 TM High Speed Viterbi/TCM Decoder Virtual Components for the Converging World The CS3410 Viterbi/TCM Decoder is a high performance implementation suitable for a range of Forward Error Correction applications. This highly integrated Application Specific Virtual Component ASVC can be used in

RD38F4

Abstract: 1024-Mbit rd58f0012lvybb0 30094* intel
Contextual Info: Intel StrataFlash Wireless Memory System LV18 SCSP 1024-Mbit LVX Family with LPSDRAM Datasheet Product Features • ■ ■ ■ ■ ■ Device Memory Architecture — Flash die density: 128-, 256-Mbit — LPSDRAM die density: 128-, 256-Mbit — Top or Bottom parameter flash

253852

Contextual Info: Intel StrataFlash£ Wireless Memory System LV18/LV30 SCSP 768-Mbit LVQ Family with Asynchronous Static RAM Datasheet Product Features • ■ ■ ■ ■ ■ Device Architecture — Flash density: 64-, 128-, 256-Mbit — PSRAM density: 32-, 64-, 128-Mbit

strataflash 256 x 2 Mbits

Abstract: Migration Guide for Intel StrataFlash Memory J 253854 Intel SCSP 253853
Contextual Info: Intel StrataFlash£ Wireless Memory System LV18 SCSP 1024-Mbit LVX Family with LPSDRAM Datasheet Product Features • ■ ■ ■ ■ ■ Device Memory Architecture — Flash density: 128- and 256-Mbit — LPSDRAM density: 128, 256 Mbit — Top/Bottom parameter flash

253854

Abstract: x16D strataflash 512 p30 strataflash 256 x 2 Mbits 256l18
Contextual Info: Intel StrataFlash£ Wireless Memory System LV18/LV30 SCSP 1024-Mbit LV Family Datasheet Product Features • ■ ■ ■ ■ Device Architecture — Flash die density: 128-, 256-Mbit — Top or Bottom flash parameter configuration Device Voltage — Core: VCC = 1.8 V (Typ)

Contextual Info: Intel StrataFlash£ Wireless Memory System LV18 SCSP 1024-Mbit LVX Family with LPSDRAM Datasheet Product Features • ■ ■ ■ ■ ■ Device Memory Architecture — Flash density: 128- and 256-Mbit — LPSDRAM density: 128, 256 Mbit — Top/Bottom parameter flash

RFUS 20

Abstract: 298161 strataflash 256 x 2 Mbits
Contextual Info: Intel StrataFlash£ Wireless Memory System LV18 SCSP 1024-Mbit LVX Family with LPSDRAM Datasheet Product Features • ■ ■ ■ ■ ■ Device Memory Architecture — Flash density: 128- and 256-Mbit — LPSDRAM density: 128, 256 Mbit — Top/Bottom parameter flash

DEMODULATOR PSK-8

Abstract: 16-PSK 16PSK CS3410 Viterbi Decoder viterbi decoder for tcm decoders IESS-308/309 tcm 5/6 decoder branch metric Viterbi Trellis Decoder
Contextual Info: CS3410 TM High Speed Viterbi/TCM Decoder Virtual Components for the Converging World The CS3410 Viterbi/TCM Decoder is a high performance implementation suitable for a range of Forward Error Correction applications. This highly integrated Application Specific Virtual Component ASVC can be used in