24 T0 5 Search Results

64TI

Contextual Info: A r -A r 28 6 8.5 8tO .25 7 l.5 8 t0 .2 5 TYP 2.54 CENTRES 27 6 6 .0 4 i0 .2 5 6 9 .0 4 tO .2 5 26 6 3 .5 0 t0 .2 5 6 6 .5 0 t0 .2 5 25 6 0 .9 6 t0 .2 5 6 3.9 6tO .25 24 5 8 .4 2 t0 .2 5 6 l.4 2 tO .2 5 23 5 5.8 8tO .25 58.88tO .25 LOCKING FEATURE OPTIONAL

2-64A2A

Abstract: 2-94D1A T03PN
Contextual Info: T0-3P N TQ-220SM 15 9MAX * 3 2± 0 . } 1. Gate 2. Collector (Heat Sink) 3. Emitter 1. Gate 2. Collector (Heat Sink) 3. Emitter TO-3P(LH) T0-220(IS) 1. Gate 2. Collector 3. Emitter 1. Gate 2. Collector (Heat Sink) 3. Emitter 19 T0-3P(L) 2-109A4A 3±0 5 24± 0 5

Contextual Info: 5.0mm .197” Pitch Beau Eurostyle Single-piece Terminal Block FEATURES AND SPECIFICATIONS Electrical Features and Benefits 2 to 24 circuits Holds wires for secure, reliable contact Molded t0 length High flammability rating Voltage: 300 V Maximum Current: 20 Amp

Contextual Info: 5.0mm .197” Pitch Beau Eurostyle Single-piece Terminal Block FEATURES AND SPECIFICATIONS Electrical Features and Benefits n n n n n Sizes 2 to 24 circuits Holds wires for secure, reliable contact Molded t0 length Small footprint High flammability rating

HGTM24N60D1

Abstract: HGTM hgtm24n60 hgtm24n60d hgtm24
Contextual Info: HGTM24N60D1 33 Î Â December 1993 24A, 600V N-Channel IGBT Package Features JEDEC T0-204AA BOTTOM VIEW • 24 Amp, 600 Volt • Latch Free Operation • Typical Fall Time <500ns • High Input Impedance EMITTER • Low Conduction Loss C\ ® Description

5.5 kw abb

Contextual Info: VRRM IF AV M IFSM V(T0) rT VDClink = = = = = = 4500 810 24x103 2.42 1.1 2800 V A A V mΩ V Fast Recovery Diode 5SDF 10H4502 PRELIMINARY Doc. No. 5SYA1115-03 Oct. 06 • Patented free-floating technology • Industry standard housing • Cosmic radiation withstand rating

STK200 circuit

Abstract: 74HC00 STK200 PC1246 5V 74HC00 MOSI PB317 20PIN BAT85 digital clock
Contextual Info: Programming Interface P-RESET 1 RESET ADC5 PC5 28 PD0 (RXD) (ADC4) PC4 27 RESET PC5 MOSI PC4 P-RESET SCK MISO PD0 2 PD1 3 PD1 (TXD) (ADC3) PC3 26 PC3 PD2 4 PD2 (INT0) (ADC2) PC2 25 PC2 PD3 5 PD3 (INT1) (ADC1) PC1 24 PC1 PD4 6 PD4 (T0) (ADC0) PC0 23 PC0 AGND

sn75494

Abstract: 75494 SN75492 SS012
Contextual Info: TEXAS INSTR ÌL IN/INTFCJ Tl D eT| 0 ^ 1 7 5 4 896 17 24 TEXAS INSTR C L I N / INTFC 0075 0S5 b 9 1D 75055 D. T-52-13-Û7 SN75494 HEX M0S-T0-LED DIGIT DRIVERS D I932, MARCH 1983-HEVISED JANUARY 1987 • Low Input Current for MOS Compatibility • Low Voltage Operation

MCC44-14I08B

Abstract: MCC44-18I08B MCC44-14I08 MCC56-14IO1B PAGE-42 MCC56-12I08B MCC5616I01B 10MSA MCC72-18I01 MCC72-08IO1B
Contextual Info: Thyristor Modules «.- j i - MCC.io1B MCC.Ì08B Itav = 18-116 A Type V HRM V 1 TAV @ Tc *TRMS *TSM V T0 V □ p rT thJC Package style thCK K/W K/W 125 1.3 0.2 Z cb Ll 24 18 125 1.3 0.2 27 0.85 11 125 0.88

L194-12

Abstract: L7812 TO-220 l130
Contextual Info: FIXED VOLTAGE REGULATORS JUNCTION TEMP. RANGE C C Vo V) D EVIC E TYPE MAX OUTPUT CU RREN T lo fmA) V. MAX (V) 12 •L194-12 500 281 1% 10 TO 2bu 10 15 TO 25 -25, +150 ¡1 L78ML12 500 35 25 5 TO 500 6 14.5 TO 30 0, +150 TO-220 T0-220 (1) 1 15 18 24 LOAD REG

Contextual Info: C tt EN-0 IC 032)MXJ-32 5348 STICK 6 }ì) NOTES, BOTH ENDS 2o WITH 14 - I0T9 100 5 -0979 90 IT -0879 80 19 -0779 T0 9 -6879 68 2 -0679 60 24 -0579 50 28 -0479 40 -0579 50 5548 I-02T9 20 5o i S S i a I ^ I F OR SD-5348 - AVAIRABLE *g fnv7 ITEMS. - is r ^ c

Contextual Info: t ijc a Electronics Catalog 1308658 Issued 3-01 Z-PACK HM-Zd 20 Pair Header Assembly Pari Number PIN Length 1469025-1 1469025-2 5.20 3.70 3 7 5 i 0.2 24 9 i 0.05 3.2 - 5.7 REF 11.65 i 0.05 ' .5 TYP 15 3R t fl ns . A 675 . 0.2 :.95±Q 05 -02 H3 4 t0 U 5 20 Pair Header Insertion Tool

CRT9006-135

Abstract: CRT9006 CRT9006-83 B135 crt5037 5037 crt crt 9006-135
Contextual Info: CRT 9006-135 CRT 9006-83 STANDARD MICROSYSTEMS CORPORATION Single Row Buffer SRB PIN CONFIGURATION D O U T3 D O U T2 DOUT1 D O U T0 C LK C C C Cl Cl 1 ^ 24 2 23 3 22 4 21 5 |- •n 20 6\ I 19 - J 8 Cl W REN C C LRCNT 3 ID =1 ID ID ID ID Ci GND DO U T4

atmel 80C52X2

Abstract: 80C52X2 AT89C5131A-RD at89c5131 parallel programmer AT89C5131 PLCC 52 AT89C5131 80C51 80C52 AT89C5131A-L PLCC52
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

atmel 80C52X2

Abstract: at89c5131 parallel programmer 80C52X2 80C51 80C52 AT89C5131A-L PLCC52 VQFP64 at89c5131a-tisul
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

atmel 80C52X2

Abstract: at89c5131 parallel programmer AT89C5131A-S3SUM AT89C5131A Electrical Life Test
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

Microcontroller

Abstract: atmel 80C52X2 watch dog timer of 8051 AT89C5130A AT89C5130 AT89C5131 UCAP 80C51 80C52 80C52X2 AT89C5131A-M
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

w-1 htf

Contextual Info: UNCONTROLLED DOCUMENT 9 .ED P IN 24 P IN [0 .3 6 £ ] 13 4 .5 0 oo Tò+<T0 oooo oooo oooo oooo [0 .1 7 7 ] REV. LDM —244288M B REV, E.C.N. NUM BER AND A E.C.N. #10BRDR. B E .C .N . # 1 0 B R 0 R . PARAMETCR 6 0 .9 6 112.4 0 0 ] 4 5 .7 2 Cl,8 0 0 ] MIN AXIAL INTENSITY

at89c5131 parallel programmer

Abstract: AT89C5131 AT89C5131 PLCC 52 80C51 80C52 80C52X2 AT89C5131A-L PLCC52 VQFP64 at89c5131 usb interface code example
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

atmel 80C52X2

Abstract: 80C52X2 CPU instruction set AT89C5131 UCAP AT89C5131 AT89C5131A usb eeprom programmer schematic 80C51 80C52 80C52X2 AT89C5130A-M
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

AT89C5130A-M

Abstract: format .pof stl 106 a QFP64 package 80C52X2 CPU instruction set atmel bootloader C51 3 x 4 keypad to 7 segment decoder uep 49 AT89C5131 UCAP atmel 80C52X2
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

atmel 80C52X2

Abstract: at89c5131 parallel programmer 80C51 80C52 80C52X2 AT89C5131A-L PLCC52 VQFP64
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

80C51

Abstract: 80C52 80C52X2 AT89C5130A-M AT89C5131A-M PLCC52 QFN32 VQFP64 at89c5131 parallel programmer atmel 80C52X2
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2

AT89C5131

Abstract: atmel 80C52X2 80C51 80C52 80C52X2 AT89C5130A-M AT89C5131A-M PLCC52 QFN32 VQFP64
Contextual Info: Features • 80C52X2 Core 6 Clocks per Instruction • • • • • • • • • • • • • • • • • • • – Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2