24 C 1024 W Search Results

Contextual Info: LF48410 1024 x 24-bit Video Histogrammer D EVICES I N C O R P O R A T E D DESCRIPTION FEATURES □ 40 MHz Data In p u t and C om pu­ tation Rate □ 1024 x 24-bit Memory A rray □ Histograms of Images up to 4K x 4K w ith 10-bit Pixel Resolution □ Memory Array Flash Clear

Contextual Info: LF48410 1024 x 24-bit Video Histogrammer DESCRIPTION FEATURES □ 40 M H z Data Input and C om pu­ tation Rate □ 1024 x 24-bit M em ory Array □ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution □ M em ory Array Flash Clear □ User-Programmable Modes:

scientific imaging technologies

Abstract: SI-003A SIA003A AD590 mpp schematic scientific imaging technologies inc ccd incoming inspection SI003
Contextual Info: S C I E N T I F I C I M A G I N G T E C H N O L O G I E S , I N C . 1024 x 1024 pixel format 24µm square n Front-illuminated or thinned, back-illuminated versions n Packaged with a two stage Thermoelectric cooler for improved performance without a dewar

scientific imaging technologies

Abstract: SI-003A mpp schematic infrared diode p1d scientific imaging technologies inc ccd incoming inspection SI-424A
Contextual Info: S C I E N T I F I C I M A G I N G T E C H N O L O G I E S , I N C . 1024 x 1024 pixel format 24µm square n Front-illuminated or thinned, back-illuminated versions n Unique thinning and Quantum Efficiency enhancement processes n Excellent QE from IR to UV

Contextual Info: This document was generated on 04/24/2012 PLEASE CHECK WWW.MOLEX.COM FOR LATEST PART INFORMATION Part Number: Status: Overview: Description: 15-38-1024 Active C-Grid Products 2.54mm Pitch C-Grid® Shunt Terminal Housings, All Over Tin Sn , 2 Circuits, with

Contextual Info: DALLAS SEMICONDUCTOR DS2010 1024x9 FIFO Chip PIN ASSIGNMENT FEATURES • First-in, first-out memory-based architecture W C 1* 28 □ V C C 27 □ D4 • Flexible 1024 x 9 organization D SC 2 D3C 3 • Low-power HCMOS technology D 2Ü 4 24 • Asychronous and simultaneous read/write

7L084

Abstract: 2708 eprom 27L08 eprom 2708 TMS2708 texas 2708 rom 1024x8 7L08
Contextual Info: TM S2708, TMS27L08, SM J2708. SM J27L08 1024-W0RD BY 8-BIT ERASABLE PROGRAMMABLE READ-ONLY MEMORIES MOS LSI D ECEM BER 1979 All Inputs and Outputs Fully T T L Compatible A 7C S tatic Operation {No C lo cks, IMo Refresh Max A ccess/M in C y cle Time 24 3 v c c

27L08-45

Abstract: 2708 eprom 27L08 2708-45 74LS TTL 245 TMS 2708 JL a1023 ansi y32.14 diagram 2708 memory TMS2708
Contextual Info: TMS 2708-35 JL. TMS 2708-45 JL, TMS 27L08-45 JL 1024-WORD BY 8-BIT ERASABLE PROGRAMMABLE READ-ONLY MEMORIES MOS LSI D E C E M B E R 1 9 7 9 - R E V I S E D M A Y 1982 1024 X 8 Organization A ll Inputs and O utputs F ully T T L Compatible 24-PIN CER P AK D U A L -IN -L IN E PACKAG E

Contextual Info: LF48410 DEV IC ES IN C O R PO R A TE D FEATURES □ 40 M H z Data Input and C om pu­ tation Rate □ 1024 x 24-bit Memory Array □ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution □ Memory Array Flash Clear □ User-Programmable Modes: Histogram, Histogram Accumulate,

RRUS 32

Abstract: CL-GD542X CL-GD543X CL-GD5452 CL-GD5453 bitblt GD54 vl-bus RRUS
Contextual Info: • CIRRUS LOGIC ElBbfc^ DGOMTbM E4T H C I R CL-GD5452/GD5453 Preliminary Product Bulletin FEATURES ■ Two-chip multiplexer-less, VRAM-based graphics accelerator ■ Resolutions supported: High-Resolution True Color Graphics Accelerator — 1280 x 1024 x 24 bits per pixel non-interlaced

Contextual Info: DA TA SHEET TFT COLOR LCD MODULE N L 1 0 2 7 6 A C 24-02 31cm 12.1 type , 1024 x 768 pixels, Full color Vertical screen expansion (Multi-scan), Incorporated backlight w ith inverter DESCRIPTION NL10276AC24-02 is a TFT (thin film transistor) active matrix color liquid crystal display (LCD) comprising

RE27C

Contextual Info: V E R Y H IG H S P E E D C M O S C L O C K E D F IF O MEMORY C O M PO N EN TS P R E L IM IN A R Y FEATURES □ 1024 x 5 O rganization ^ 1 c □ 24 V ce 2 C □ 23 CKW 3 C □ W E, D, 4 □ □ 21 U 20 DR □ Very high perform ance °3 22 Cycle Frequency Access

CHN13

Contextual Info: m HARRIS U m HSP48410 S E M I C O N D U C T O R Histogrammer/Accumulating Buffer January 1994 Features Description • 10-Blt Pixel Data The Harris HSP48410 is an 84 lead Histogrammer 1C intended for use in image and signal analysis. The on-board memory is configured as 1024 x 24 array. This translates to a

Contextual Info: LF48410 D E V IC E S IN C O R P O R A T E D DESCRIPTION FEATURES □ 40 M H z D ata In p u t and C om pu­ tation Rate □ 1024 x 24-bit M em ory A rra y □ Histogram s of Im ages up to 4K x 4K w ith 10-bit Pixel Resolution □ M em ory A rra y Flash C lear

Contextual Info: 4Meg x 1 Monolithic DRAM molaic MDM14000-80/10/12 Issue 3.2 : September 1993 S e m ic o n d u c to r Inc. 4,194,304 x 1 CMOS High Speed Dynamic RAM Features Row Access Time of 80,100,120 ns Available in 20 Pin DIP,20 & 24 Pin VIL 5 Volt S u p p ly! 10% 1024 Refresh Cycles 16 ms

Contextual Info: 4Meg x 1 Monolithic DRAM molate M DM 14000-80/10/12 Issue 3.2 : September 1993 S e m ic o n d u c to r 4,194,304 x 1 CMOS High Speed Dynamic RAM Features Row Access Time of 80,100,120 ns Available in 20 Pin DIP,20 & 24 Pin VIL 5 Volt Supply ±10% 1024 Refresh Cycles 16 ms

b72 voltage regulator

Abstract: AN/URT-23E
Contextual Info: O K I SEMI CONDUCTOR GROUP 23E D • b7S454D ~ T 'S L - \ Z □ OOti4=14 1 - o .s O K I semiconductor _ MSC1187-XX_ DOT DRIVER WITH DIMMING FUNCTION G ENERAL DESCRIPTION The MSC1187-XX is a vacuum fluorescent display tube driver IC using the Bi-CMOS process for

77-AH

Contextual Info: SflE D • b?24240 □ □ 14 54 cl 77A H O K I J O K I Semiconductor M S C 1 1 8 7 -X X » * 1 se" T - S « « " » uc Z ' lS » -_ < 2 > 9 WUP " 33-BIT SEGM ENT DRIVER WITH DIM M ING FUNCTION GENERAL DESCRIPTION The M SC1187-XX is a vacuum fluorescent

PIC18F66J10-I/PT

Abstract: ML-ND PIC18F66J15-I/PT PIC18F4620-I/P PDF DOWNLOAD PIC18LF4620 PIC18LF4620-I/P PIC18LF4620-I/PT PIC18LF6622 PIC18LF6722-I/PT PIC18LF8722
Contextual Info: Flash Microcontrollers Cont. ds PIC18F Devices (Cont.) Memory Size Program RAM EEPROM Words Bytes Bytes 24K x 16 B 3328 1024 I/O Pins Timer/ Counters 8/16-bit UART I2C SPI™ CAN/ USB PWM A/D Analog Comp. 36 1/3 1 (EUSART) 1 (Master/ Slave) 1 ECAN 5 11-ch. 10-bit

CL-GD5465

Abstract: colour tv kit circuit diagram apple powermac cirrus logic laguna Chinese tv circuit schematic diagram vga to tv CL-GD546X PC97 3D Accelerator rdram 667
Contextual Info: CL-GD5465 Advance Product Bulletin ILI C IR R U S L O G IC FEATURES • 6 4 -b lt g ra p h ic s e n g in e w ith in te g ra te d a c c e le ra tio n — — — — — — — — — — — — — — — High-Performance 3D AGP Graphics Accelerator 3D g a m e

diagram LG TV circuits

Abstract: lg tv electronic diagram concurrent rdram NEC LG concurrent RDRAM NEC RDRAM concurrent RDRAM CONCURRENT LG RDRAM 800x600
Contextual Info: CL-GD5465 Preliminary Data Book CIRRUS LOGIC FEATURES • 64-bit graphics engine with integrated 3D game acceleration — — — — — — — — — — — — — — — Perspective textures mapping FilterJet fast bilinear filtering Lit, copy, decal, and blend textures

CL-GD546X

Abstract: "64-bit graphics engine" 640 x 480 16-Blt buffer CL-GD5462 CL-GD5464 CL-GD5465 texture mapping 3d graphics
Contextual Info: FCIRRUS LOGIC CL-GD546X Advance Product Bulletin FEATURES High-Performance VisualMedla Accelerators • 64-blt graphics engine with integrated 3D game acceleration CL-GD5464 CL-GD5462 (2D) CL-GD5464 (3D) CL-GD5465 (AGP) - Perspective textures mapping

CL-GD5462

Abstract: CL-GD5464 CL-GD5465 CL-GD546X MIP 320
Contextual Info: CL-GD546X Advance Product Bulletin FEATURES • 64-bit graphics engine with integrated 3D game acceleration CL-GD5464 — — — — — — — — — — — — — — Perspective textures mapping Bilinear/trilinear filtering Mip mapping Lit, copy, decal, and blend textures

isp1024

Abstract: 0127A-24-80-isp 102480LJ PLSI 1024-60LJ 5962-9476101mx 5962-9476101 1024-60LJ
Contextual Info: ispLSI and pLSI 1024 ® High-Density Programmable Logic Functional Block Diagram unctional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — High-Speed Global Interconnect — 4000 PLD Gates — 48 I/O Pins, Six Dedicated Inputs — 144 Registers — Wide Input Gating for Fast Counters, State