21JUN2007 Search Results

M95M01-D

Abstract: M95M01-DF marking M95 m01d
Contextual Info: M95M01-DF M95M01-R 1-Mbit serial SPI bus EEPROM Datasheet − production data Features • Compatible with the Serial Peripheral Interface SPI bus ■ Memory array – 1 Mb (128 Kbytes) of EEPROM – Page size: 256 bytes SO8 (MN) 150 mil width ■ Write

Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 20 RELEASED FOR PUBLICATION LOC AL ALL RIGHTS RESERVED. BY - 20 2 3 1 REVISIONS DIST 2 P F1 TYPICAL APPLICATION D G G1 DWN APVD UPDATED PCB LAYOUT 05DEB2009 AV GT UPDATED HV-4 POLARIZATION KEY 21AUG2009 AV GT ADDED COMPONENT PART NUMBERS

20KV

Abstract: AN1015 AN1461 ST72774 st7275
Contextual Info: AN1461 Improved ESD immunity against interrupts lock-up Introduction In a working environment under heavy external interferences like high voltage spikes, the normal behavior of a microcontroller MCU may be corrupted, leading to uncontrolled and unpredictable actions, and even permanent damages if they are not taken care of properly.

M95M01-R

Contextual Info: M95M01-R 1 Mbit serial SPI bus EEPROM with high speed clock Features • Compatible with SPI bus serial interface Positive Clock SPI modes ■ Schmitt trigger inputs for enhanced noise margin ■ Single supply voltage: 1.8 V to 5.5 V ■ High speed – 5 MHz clock rate

TLE2301INE

Abstract: 1N4001 P2820 TLE2301
Contextual Info: TLE2301 EXCALIBUR 3-STATE-OUTPUT WIDE-BANDWIDTH POWER OPERATIONAL AMPLIFIER SLOS131 – DECEMBER 1993 D D D D D D D D NE PACKAGE TOP VIEW High Output Drive Capability . . . 1 A Min 3-State Outputs High Gain-Bandwidth Product 8 MHz Typ Low Total Harmonic Distortion

Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 20 RELEASED FOR PUBLICATION 6 5 4 3 2 20 LOC BY - CAGE ASSEMBLY 1 2 D EMI SPRINGS 00 P DESCRIPTION 4 DATUM AND BASIC DIMENSION ESTABLISHED BY CUSTOMER. DATE DWN APVD B REVISED PER ECO-09-022874 19OCT2009 CR MS C

Contextual Info: 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 6 5 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. 12 SPACES AT 4.0 4.0 D C •0.95 B -12 SPACES AT 4.0 2.0 I P ~Y~ h "Y ~ g “Y~ A f e A d c OE P.O.BOARD- L 24 SPACES AT 2.0 A R E C O M M E N D E D PCB HOLE

TPS73701

Contextual Info: TPS737xx www.ti.com SBVS067E – JANUARY 2006 – REVISED MAY 2007 1A Low-Dropout Regulator with Reverse Current Protection FEATURES • • • • • • • • • • DESCRIPTION Stable with 1.0µF or Larger Ceramic Output Capacitor Input Voltage Range: 2.2V to 5.5V

Contextual Info: 8 THIS DRAWING IS UNPUBLISHED. kPU COPYRIGHT - 6 7 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. 5 3 4 2 - ALL RIGHTS RESERVED. LOC DIST DF AO R E V IS IO N S P LTR A DESCRIPTION DATE DWN CT DE 6-20-07 RELEASED APVD 2,000 + ,010 [50,80 + 0,25]

EEPROM

Abstract: M95M01 M95M01-W M95M01-R
Contextual Info: M95M01-R M95M01-W 1 Mbit serial SPI bus EEPROM with high speed clock Features • Compatible with SPI bus serial interface Positive Clock SPI modes ■ Schmitt trigger inputs for enhanced noise margin ■ Single supply voltage: 1.8 V to 5.5 V ■ High speed

Contextual Info: SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 x 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003 D D D D D D D D D Choice of Memory Organizations

Contextual Info: M95M01-DF M95M01-R 1-Mbit serial SPI bus EEPROM Datasheet − production data Features • Compatible with the Serial Peripheral Interface SPI bus ■ Memory array – 1 Mb (128 Kbytes) of EEPROM – Page size: 256 bytes SO8 (MN) 150 mil width ■ Write

Contextual Info: TLV7256 DUAL COMPARATOR www.ti.com SLCS147A – OCTOBER 2006 – REVISED JANUARY 2007 FEATURES • • • • • DCT OR DDU PACKAGE TOP VIEW Low Supply Current…20 µA Typ Single Power Supply Rail-to-Rail Common-Mode Input Voltage Range Push-Pull Output Circuit

M95M01-R

Contextual Info: M95M01-R 1 Mbit serial SPI bus EEPROM with high speed clock Preliminary Data Features • Compatible with SPI bus serial interface Positive Clock SPI modes ■ Schmitt trigger inputs for enhanced noise margin ■ Single supply voltage: 1.8 V to 5.5 V ■

Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 20 RELEASED FOR PUBLICATION 6 5 4 3 2 20 LOC GP ALL RIGHTS RESERVED. - CAGE ASSEMBLY NEW CAGE ASSEMBLY D 1 MATERIAL: CAGE ASSEMBLY: 0.25mm THICK NICKEL SILVER ALLOY GASKET RETENTION PLATE: STAINLESS STEEL GASKET: PLATED FILLED SILICONE

AGILENT A 1610 OPTICAL MOUSE SENSOR

Abstract: siemens transistor manual COTS high-accuracy clock sources Delay linear sweep generator using 555 timer
Contextual Info: Agilent PNA Series Network Analyzer Printed Version of PNA Help User’s and Programming Guide Supports Firmware A.08.00 March 12, 2008 Warranty Statement THE MATERIAL CONTAINED IN THIS DOCUMENT IS PROVIDED “AS IS,” AND IS SUBJECT TO BEING CHANGED, WITHOUT NOTICE, IN FUTURE EDITIONS. FURTHER, TO THE

M95M01-R

Contextual Info: M95M01-R 1 Mbit serial SPI bus EEPROM with high speed clock Features • Compatible with SPI bus serial interface Positive Clock SPI modes ■ Schmitt trigger inputs for enhanced noise margin ■ Single supply voltage: 1.8 V to 5.5 V ■ High speed – 5 MHz clock rate

Contextual Info: PCM4204 SBAS327A − JUNE 2004 − REVISED SEPTEMBER 2004 HighĆPerformance 24ĆBit, 216kHz Sampling FourĆChannel Audio AnalogĆtoĆDigital Converter FEATURES D Four High-Performance Delta-Sigma D D D D D D D D D Analog-to-Digital Converters − 24-Bit Linear PCM or 1-Bit Direct Stream

BED03

Abstract: AEA10 2A97 BED02 0x43800000 Channel Generator Types G 3490 0000 0x0204 344c digital audio 10Mbits 87A0
Contextual Info: TMS320DM647/TMS320DM648 Digital Media Processor www.ti.com SPRS372A – MAY 2007 – REVISED JUNE 2007 1 TMS320DM647/TMS320DM648 Digital Media Processor • • • High-Performance Digital Media Processor DM647/DM648 – 720, 900-MHz C64x+ Clock Rate

P22NM50

Abstract: VDD400 JESD97 STP22NM50 p22n
Contextual Info: STP22NM50 N-channel 500 V, 0.20 Ω, 20 A, MDmesh Power MOSFET TO-220 Preliminary Data Features Type VDSS RDS on max ID STP22NM50 500V < 0.25Ω 20A • High dv/dt and avalanche capabilities ■ 100% avalanche tested ■ Low input capacitance and gate charge

Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 20 RELEASED FOR PUBLICATION 6 5 4 3 20 LOC GP ALL RIGHTS RESERVED. - 4X 54.8 D ( 14.1 ) TYP 1 REVISIONS DIST 00 P LTR 4X 14 0.1 PORT OPENING 8X ( 1.7 ) ( 15 ) TYP 2 DESCRIPTION DATE DWN APVD C REVISED PER ECO-10-004036

Contextual Info: TLE2301 EXCALIBUR 3-STATE-OUTPUT WIDE-BANDWIDTH POWER OPERATIONAL AMPLIFIER SLOS131 – DECEMBER 1993 D D D D D D D D NE PACKAGE TOP VIEW High Output Drive Capability . . . 1 A Min 3-State Outputs High Gain-Bandwidth Product 8 MHz Typ Low Total Harmonic Distortion

selni nevers

Abstract: soft starter for a 415 volt three phase induction AN1904 dc to ac PURE SINE WAVE inverter assembly code selni nevers tacho L6386D selni motor AN1904 ST selni ahv 2-42 "Velocity Sensor"
Contextual Info: AN1904 Application note ST7MC three-phase AC induction motor control software library Introduction This Application Note describes a 3-phase induction motor control software library developed for the ST7MC. This 8-bit microcontroller contains a peripheral dedicated to 3phase brushless motor control, making it suitable for AC induction motors and permanent

M95M01-D

Abstract: M95M01-DF
Contextual Info: M95M01-DF M95M01-R 1-Mbit serial SPI bus EEPROM Datasheet − production data Features • Compatible with the Serial Peripheral Interface SPI bus ■ Memory array – 1 Mb (128 Kbytes) of EEPROM – Page size: 256 bytes SO8 (MN) 150 mil width ■ Write