2141 RAM Search Results

2141 ram

Abstract: K 2141 2141L-3 2141L-4 2141L-5 2141 intel 2147 intel intel 2141
Contextual Info: intei 2141 4096 X 1 BIT STATIC RAM 2141-2 2141-3 2141-4 2141-5 2141L-3 2141L-4 2141L-5 Max. Access Time ns 120 150 200 250 150 200 250 Max. Active Current (mA) 70 70 55 55 40 40 40 Max. Standby Current (mA) 20 20 12 12 5 5 5 • HMOS Technology ■ Industry Standard 2147 Pinout

Contextual Info: in te i 2141 4096 X 1 BIT STATIC RAM 2141-2 2141-3 2141-4 2141-5 2141L-3 2141L-4 2141L-5 Max. Access Time ns 120 150 200 250 150 200 250 Max. Active Current (mA) 70 70 55 55 40 40 40 Max. Standby Current (mA) 20 20 12 12 5 5 5 ADVANCED HMOS II Technology

29ms

Abstract: safenet ADSP-2141 640Mbps "ESP"
Contextual Info: ADSP-2141 SafeNet DSP SECURITY SYSTEM ON A CHIP High Performance Security System on a Chip KEY FEATURES: OVERVIEW HIGH THROUGHPUT The ADSP-2141 SafeNet® DSP is a • 3-DES at 214 Mbps fully integrated, high-speed Virtual ■ DES at 640 Mbps Private Network VPN security sys-

GKEK

Abstract: free circuit diagram of Crt Monitor with fault ADSP 2141 CGX Programmers Guide ba pass 1st sem date sheet crt monitor circuit diagram first sem engineering ..registration last date block diagram of pentium D Laser power supply abstract types of trees in data structure RFC1321
Contextual Info: IRE Secure Solutions, Inc. ADSP 2141 ‘SafeNet DSP ‘ CGX INTERFACE PROGRAMMER’S GUIDE PART I: OVERVIEW & OBJECTS Revision 2, June 1999 IRE Secure Solutions, Inc. maintains a Web site with up-to-date technical documentation for our customers. It is located at:

caller id

Abstract: GKEK MA-COM rc5 protocol 339B C907 seed key
Contextual Info: IRE Secure Solutions, Inc. ADSP 2141 ‘CryptIC ‘ CGX INTERFACE PROGRAMMER’S GUIDE PART II: COMMAND LISTING Revision 2, December 1998 IRE Secure Solutions, Inc. maintains a Web site with up-to-date technical documentation for our customers. It is located at:

93C66 national semiconductor

Abstract: priority arbiter "shared resource" 2141 ram 1A57 ADSP-2181 applications hust IS 208 working and block diagram of ups 1A00 ADSP-2100
Contextual Info: ANALOG DEVICES IRE Secure Solutions, Inc. ADSP 2141 SafeNet DSP USER’S MANUAL PRELIMINARY DOCUMENT This information pertains to a product under development. Its characteristics and specifications are subject to change without notice. IRE assumes no responsibility for the use of this information.

intel 2167

Abstract: intel 2147 2167L-70 TLZ12
Contextual Info: in te T IPElHyMOGMW 2167 HIGH SPEED 16,384 x 1 BIT STATIC RAM 2167-55 2167L-70 2167-10 55 70 70 100 125 125 90 90 40 40 30 30 Max. Access Time ns Max. Active Current (mA) Max. Standby Current (mA) 2167-70 • 0.8-2.0V Output Timing Reference Levels 2141/2147 Upgrade

th 2167

Abstract: 2167 memory
Contextual Info: inteT 2167 HIGH SPEED 16,384 x 1 BIT STATIC RAM 2167-55 2167-70 2167L-70 2167-10 55 70 70 100 125 125 90 90 40 40 30 30 Max. Access Time ns Max. Active Current (mA) Max. Standby Current (mA) 0.8-2.0V Output Timing Reference Levels 2141/2147 Upgrade Double Poly HMOS II Technology

intel 2167

Abstract: 2167-55 intel 2147 TT 2141 2167L-70 2141 intel ajc3 2167-10
Contextual Info: in t é f IPIRiglLOGHODßOAIOT 2167 HIGH SPEED 16,384 x 1 BIT STATIC RAM 2167-55 2167-70 2167L-70 2167-10 55 70 70 100 125 125 90 90 40 40 30 30 Max. Access Time ns Max. Active Current (mA) Max. Standby Current (mA) 2141/2147 Upgrade • 0.8-2.0V Output Timing Reference

AN2141

Abstract: AN214 AN2331
Contextual Info: AN2141 A N 2141 Video Camera Luminance Signal P ro cessin g Circuit w & m S 7 cOM&iSv'Uhmm t AN214K1, f f m f i r a s & T 'i - o • * m • AN2141 iJ , <k<nmt £ I f L X ^ 4 o A L C 0S& b \=7 ■■/*> r u w m i b i -y-rm ffi • s v m m x -m ^ t, i& m & w .ti

Contextual Info: ADVANCE INFORMATION - SU B J E C T T O C H A N G F W I T H O U T N O T IC E GENERAL DESCRIPTION FEATURES T h e E M M S E M I 2141 is a 4 0 9 6 - b it s ta tic R a n d o m A c c e s s M e m o r y o r g a n iz e d as 4096 w o r d s by 1-b it u s i n g N - M ¡ u ^ ' a

C5VI

Abstract: 2141 ram C5VI ST EMM Semi 2147 RAM in 5844 2141
Contextual Info: A DVANCE IN FO R M A TIO N - SUBJECT TO CHANGE WITHOUT NOTICE SEMI 2141 120NSEC, STATIC, T T L IN/OUT 4096 x 1 N-MOS RAM G E N E R A L D E S C R IP T IO N FE A T U R E S T h e E M M S E M I 21 4 1 is a 4 0 9 6 - b i t s t a t i c R a n d o m A c c e s s M e m o r y o r g a n i z e d as 4 0 9 6 w o r d s b y 1 - b i t u s i n j n - iVKj o ^ a

Contextual Info: SINGLE ROW CRIMP HOUSING 2349 SERIES. 2.54mm 0.100” . With Locking Ramp. Features       Available in 2 through 20 circuits Insulator Material: PBT, UL 94V-0 Polarised with locking ramp Dimensional Information Accepts 2351 series crimp terminal

Contextual Info: BOTTOM ENTRY PCB CONNECTOR 3972 SERIES. 3.96mm 0.156” . Bottom Entry Connector. For PCB Solder. Features        Available in 2 through 15 circuits Insulator Material: Nylon 6/6 UL 94V-2 Standard with tin plated solder tail terminal With locking ramp P.C. Board standoff

2544-B

Abstract: 2544
Contextual Info: POLARISED CRIMP TERMINAL HOUSING 2544-A SERIES 2.54mm 0.100” With Locking Ramp Features Available in 2 through 20 circuits Accepts 2044 series crimp terminal Polarised with locking ramp Mates with 2532, 2534, 2545, 2542, 2549, 2556 and 2567 series Material : Nylon UL 94V-0

MTA-156

Abstract: 644508
Contextual Info: Data downloaded from http://www.anglia.com - the website of Anglia - tel: 01945 474747 Catalogue 1654741 MTA-156 IDC Quad Connectors Revised 1-04 IDC Quad Connectors — Closed End and Feed-Thru Closed End with Locking Ramp A .097 [2.46] .090 [2.29] .280 .230

QADC64

Abstract: MPC555 cnh 949
Contextual Info: LIST OF FIGURES Figure Title Page 1-1 1-2 1-3 MPC555 Block Diagram . 1-2 MPC555 Memory Map . 1-6

information applikation

Abstract: Halbleiterbauelemente DDR U555C information applikation mikroelektronik VEB mikroelektronik "Mikroelektronik" Heft mikroelektronik DDR mikroelektronik Heft mikroelektronik applikation Transistoren DDR
Contextual Info: in n ilk a n í o J B lB t a L J I , L J n Í lH KáD Information Applikation Halbleiter Speicher Teil 1 SRAM [ n n ilk r a ^ e lE s k t s n a r iik Information Applikation HEFT 79- , HALBLEITERSPEiCHER TEIL li > < .1* • • r* - . SRAM * VEB Halbleiterwerk Frankfurt Oder

P2QFP100-GH-1420

Abstract: IR 1838 3v with 3 pins
Contextual Info: S i GEC P L E S S E Y s i; M i c o n i i c; r o DECEMBER 1996 r s DS4375-2.0 CLA90000 SERIES HIGH DENSITY CMOS GATE ARRAYS INTRODUCTION BENEFITS The CLA90000 family of gate arrays from GEC Plessey Semiconductors GPS) consists of 14 fixed-size arrays with

ITT 2222 A

Abstract: itt 2222
Contextual Info: Si GEC P L E S S E Y APRIL 1997 S E M I C O N D U C T O R S CLA90000 SERIES HIGH DENSITY CMOS GATE ARRAYS INTRODUCTION BENEFITS The CLA90000 family of gate arrays from GEC Plessey Semiconductors GPS consists of 14 fixed-size arrays with the option of building optimized arrays with up to 1.1 million

USART 8251 interfacing with 8051 microcontroller

Abstract: full 18*16 barrel shifter design 18*16 barrel shifter design USART 8251 USART 8251 expanded block diagram 8251 UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER P4QFP100-GH-1420 interfacing 8051 with ppi USART 8251 interfacing M8490 scsi
Contextual Info: CLA90000 Series High Density CMOS Gate Arrays DS5500 ISSUE 2.0 INTRODUCTZarlinkION BENEFITS The CLA90000 family of gate arrays from Zarlink Semiconductor consists of 14 fixed-size arrays with the option of building optimized arrays with up to 1.1 million gates. This

microprocessors interface 8086 to 8251

Abstract: USART 8251 interfacing with 8051 microcontroller to design a full 18*16 barrel shifter design USART 8251 18*16 barrel shifter design microprocessors architecture of 8251 USART 8251 expanded block diagram cqfp100 P2QFP100-GH-1420 full 18*16 barrel shifter design
Contextual Info: CLA90000 SERIES HIGH DENSITY CMOS GATE ARRAYS DS4375 - 2.0 April 1997 INTRODUCTION BENEFITS The CLA90000 family of gate arrays from Mitel Semiconductor consists of 14 fixed-size arrays with the option of building optimized arrays with up to 1.1 million gates. This

TL 1838

Abstract: ITT 2222 A Mitel Semiconductor process flow to design a full 18*16 barrel shifter design pic 1840 ATS 16Mhz MITEL CLA full 18*16 barrel shifter design
Contextual Info: CLA90000 SERIES j j j j ivilTEL HIGH DENSITY CMOS GATE ARRAYS s b m Sc o n â î c t o r DS4375 - 2.0 April 1997 INTRODUCTION BENEFITS The CLA90000 family of gate arrays from Mitel Sem icon­ ductor consists of 14 fixed-size arrays with the option of building optimized arrays with up to 1.1 million gates. This

1-640250-0

Abstract: 770849-4 640251-5 640250-1
Contextual Info: Data downloaded from http://www.anglia.com - the website of Anglia - tel: 01945 474747 Catalogue 1654741 SL-156 Housings Revised 1-04 Standard Housings — Wire-to-Board Housings .660 [16.76] A .156 [3.96] Typ. .100 [2.54] .019 [0.48] Material: UL94V-0 rated, nylon, white