1K SRAM Search Results

MCP79410

Abstract: MCP7941X MCP79411 MCP79412 DS22266 CFS206 CM200S EUI-64TM 3 digit counter MCP79410 basic sample programming
Contextual Info: MCP79410/MCP79411/MCP79412 I2C Real-Time Clock/Calendar with EEPROM, SRAM, Unique ID and Battery Switchover Device Selection Table Description: Part Number EEPROM Kbits SRAM (Bytes) MCP79410 1K 64 Blank MCP79411 1K 64 EUI-48™ MCP79412 1K 64 EUI-64™

MCP79410

Abstract: MCP79411 mcp7941x 79410I MCP79410 basic sample programming CM7V-T1A DS22266 PIC32 example code i2c slave
Contextual Info: MCP79410/MCP79411/MCP79412 I2C Real-Time Clock/Calendar with EEPROM, SRAM, Unique ID and Battery Switchover Device Selection Table Description: Part Number EEPROM Kbits SRAM (Bytes) MCP79410 1K 64 Blank MCP79411 1K 64 EUI-48™ MCP79412 1K 64 EUI-64™

52001HR

Abstract: IN3064 1K x 4 static ram ttl
Contextual Info: 52001 H 1K BIT 128 x 8 NVRAM Q 1K Bit Static RAM backed by 1K Bit Electrically Erasable PROM Fully 5V Only Operation Directly TTL Compatible In Circuit EEPROM Changes SRAM Cycle Time less than 300 ns Power-Failure Protection Unlimited Recall Cycles Memory Margining Capability

52212HR

Abstract: IN3064 256X4 ncr 400 256x4 static ram
Contextual Info: C 52212 R 1K BIT 2 5 6 x 4 NVRAM 1K Bit Static RAM backed by 1K Bit Electrically Erasable PROM Fully 5V Only Operation Directly TTL Compatible In Circuit E2PROM Changes SRAM Cycle Time less than 300 ns • • • • Power-Failure Protection Unlimited Recall Cycles

CY7C436X4

Abstract: a935 CY7C43634 CY7C43644 CY7C43664 CY7C43684 B935
Contextual Info: CY7C43634 CY7C43664256/512/1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching 1CY7C43664 CY7C43644 CY7C43664 CY7C43684 1K/4K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching Features • Fully asynchronous and simultaneous read and write

digital clock using logic gates

Abstract: data sheet of preset 10k vhdl code for FFT 32 point pin configuration 1K variable resistor 102-130 vhdl code for carry select adder using ROM circuit diagram of 8-1 multiplexer design logic vhdl for 8 point fft vhdl code for asynchronous fifo 16 bit multiplier VERILOG
Contextual Info: ACEX 1K Programmable Logic Family March 2000, ver. 1 Features. Data Sheet • Preliminary Information ■ ■ Table 1. ACEXTM 1K Device Features EP1K10 EP1K30 EP1K50 Typical gates Feature 10,000 30,000 50,000 100,000 Maximum system gates 56,000 119,000

EP1K10

Abstract: EP1K100 EP1K30 EP1K50 EPC1441 EPC16 JESD-71
Contextual Info: ACEX 1K Programmable Logic Device Family May 2003, ver. 3.4 Features. Data Sheet • ■ ■ ■ Table 1. ACEXTM 1K Device Features Feature EP1K10 EP1K30 EP1K50 EP1K100 Typical gates 10,000 30,000 50,000 100,000 Maximum system gates 56,000 119,000 199,000

24LCS62

Contextual Info: Obsolete Device 24LCS61/24LCS62 1K/2K Software Addressable I2C Serial EEPROM Device Selection Table Package Types Array Size Voltage Range Software Write Protection 24LCS51 1K bits 2.5V-5.5V Entire Array 24LCS62 2K bits 2.5V-5.5V Lower Half Features NC

CY7C43632

Abstract: CY7C43642 CY7C43662 CY7C43682 CY7C436X2
Contextual Info: CY7C43632 CY7C43662256/512/1K/4K/16K x36 x2 Bidirectional Synchronous FIFO 1CY7C43662 CY7C43642 CY7C43662 CY7C43682 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO Features • Fully asynchronous and simultaneous read and write operation permitted • Mailbox bypass register for each FIFO

ACEX

Abstract: ACEX 1K EP1K10 EP1K100 EP1K30 EP1K50 EPC1441 EPC16 JESD-71 EP1K30 PINOUT
Contextual Info: ACEX 1K Programmable Logic Device Family September 2001, ver. 3.3 Features. Data Sheet • ■ ■ Table 1. ACEXTM 1K Device Features Feature EP1K10 EP1K30 EP1K50 EP1K100 Typical gates 10,000 30,000 50,000 100,000 Maximum system gates 56,000 119,000 199,000

EP1K50

Abstract: EPC1441 EPC16 JESD-71 EP1K10 EP1K100 EP1K30 24LE1
Contextual Info: ACEX 1K Programmable Logic Device Family June 2001, ver. 3.1 Features. Data Sheet • ■ ■ Table 1. ACEXTM 1K Device Features Feature EP1K10 EP1K30 EP1K50 EP1K100 Typical gates 10,000 30,000 50,000 100,000 Maximum system gates 56,000 119,000 199,000

EP1K10

Abstract: EP1K100 EP1K30 EP1K50 EPC1441 EPC16 JESD-71
Contextual Info: ACEX 1K Programmable Logic Device Family May 2001, ver. 3.0 Features. Data Sheet • ■ ■ Table 1. ACEXTM 1K Device Features Feature EP1K10 EP1K30 EP1K50 EP1K100 Typical gates 10,000 30,000 50,000 100,000 Maximum system gates 56,000 119,000 199,000

24LCS62

Abstract: 24LCS61
Contextual Info: M 24LCS61/24LCS62 1K/2K Software Addressable I2C Serial EEPROM PRODUCT OFFERING PACKAGE TYPES Voltage Range Software Write Protection 24LCS61 1K bits 2.5V-5.5V Entire Array 24LCS62 2K bits 2.5V-5.5V Lower Half Device PDIP NC 1 NC 2 EDS 3 Vss 4 FEATURES

24LCS62

Abstract: 24AA00 24C00 24LC00 24LCS61
Contextual Info: 24LCS61/24LCS62 1K/2K Software Addressable I2C Serial EEPROM PRODUCT OFFERING PACKAGE TYPES Array Size Voltage Range Software Write Protection 24LCS61 1K bits 2.5V-5.5V Entire Array 24LCS62 2K bits 2.5V-5.5V Lower Half PDIP FEATURES 1 NC 2 EDS 3 Vss 4 8

24LCS62

Contextual Info: M 24LCS61 /24LCS62 ic r o c h ip 1K/2K Software Addressable I2C Serial EEPROM PRODUCT OFFERING PACKAGE TYPES Device Array Size Voltage Range Software W rite Protection 24LCS61 1K bits 2.5V-5.5V Entire Array 24LCS62 2K bits 2.5V-5.5V Lower Half FEATURES

24LCS62

Contextual Info: M 24LCS61 /24LCS62 ic r o c h ip 1K/2K Software Addressable I2C Serial EEPROM PRODUCT OFFERING PACKAGE TYPES Array Size Voltage Range Software Write Protection 24LCS61 1K bits 2.5V-5.5V Entire Array 24LCS62 2K bits 2.5V-5.5V Lower Half Device PDIP FEATURES

Contextual Info: MT52C9010 1K x 9 FIFO ['•'IICRON FIFO 1K x 9 FIFO FEATURES Very high speed: 1 5,20, 25 and 35ns access High-performance, low-power CMOS process Single +5V ±10% supply Low power: 5m W typ. standby ; 350mW typ. (active) TTL compatible inputs and outputs

24LCS62

Contextual Info: 24LCS61 /24LCS62 M ic r o c h ip 1K/2K Software Addressable I2C Serial EEPROM PRODUCT OFFERING Array Size Device Voltage Range PACKAGE TYPES Software W rite Protection 24LCS61 1K bits 2.5V-5.5V Entire Array 24LCS62 2K bits 2.5V-5.5V Lower Half PDIP N |o

24LCS62

Contextual Info: M 24LCS61 /24LCS62 ic r o c h ip 1K/2K Software Addressable I2C Serial EEPROM PACKAGE TYPES PRODUCT OFFERING Array Size Device Voltage Range Software W rite Protection 24LCS61 1K bits 2.5V-5.5V Entire Array 24LCS62 2K bits 2.5V-5.5V Lower Half PDIP FEATURES

Z227

Contextual Info: W CYPRESS PRELIMINARY CY7C43642V CY7C43662V/CY7C43682V 3.3V 1K /4 K /1 6K x36 x2 Bidirectional S yn ch ro no u s FIFO Features 3.3V high-speed, low-power, bidirectional, First-In FirstOut FIFO memories 1K x36 x2 (CY7C43642V) 4K x36 x2 (CY7C43662V) 16K x36 x2 (CY7C43682V)

CY7C43626

Abstract: CY7C43636 CY7C43646 CY7C43666 CY7C43686 CY7C436X6
Contextual Info: CY7C43636 CY7C43666256/512/1K/4K/16K x36/x18x2 Tri Bus FIFO 1 CY7C43646 CY7C43666 CY7C43686 1K/4K/16K x36/x18x2 Tri Bus FIFO Features • Fully asynchronous and simultaneous read and write operation permitted • Mailbox bypass register for each FIFO • Parallel and Serial Programmable Almost Full and

256K x 8 SRAM CY7C128A SRAM

Abstract: 5962-86705 PLD28 5962-89935 pld20ra10 5962-89598 CY7C132 cy7c291 PLD20RA PLDC20G10
Contextual Info: Military Product Selector Guide Static RAMs Size Organization Pins DIP SMD Number Part Number Speed (ns) ICC/ISB/ICCDR (mA @ ns) 883 Availability 1K 256 x 4 22 CY7C122 5962-88594 tAA = 25, 35 90 @ 25 Now 4K 1K x 4—Separate I/O 24S CY7C150 5962-88588 tAA = 25

LDS 4201

Contextual Info: fax id: 5409 CY7C4421 /4201/4211/4221 CY7C4231/4241/4251 C'i- 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Features Functional Description High-speed, low-power, first-in, first-out FIFO memories 64 x 9 (CY7C4421) 256 x 9 (CY7C4201) 512 x 9 (CY7C4211) 1K x 9 (CY7C4221)

CY7C4801

Abstract: CY7C4811 CY7C4821 CY7C4831 CY7C4841 CY7C4851 IDT72801 QA08 IDT728X1
Contextual Info: 4831/4 CY7C4801/4811/4821 CY7C4831/4841/4851 256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs Features • Double high speed, low power, first-in first-out FIFO memories • Double 256 x 9 (CY7C4801) • Double 512 x 9 (CY7C4811) • Double 1K x 9 (CY7C4821)