12 BIT BINARY MULTIPLIER Search Results

DAC102X

Abstract: dac1222 DAC122X DAC1221LCN lm741 low pass filter LM741 dac1222lcn AD7520 AD7521 AD7531
Contextual Info: DAC1020 DAC1021 DAC1022 10-Bit Binary Multiplying D A Converter DAC1220 DAC1222 12-Bit Binary Multiplying D A Converter General Description The DAC1020 and the DAC1220 are respectively 10 and 12-bit binary multiplying digital-to-analog converters A deposited thin film R-2R resistor ladder divides the reference

DAC122X

Abstract: DAC102X LM741 AD7520 AD7521 AD7530 AD7531 AD7533 DAC1020 DAC1021
Contextual Info: DAC1020 DAC1021 DAC1022 10-Bit Binary Multiplying D A Converter DAC1220 DAC1222 12-Bit Binary Multiplying D A Converter General Description The DAC1020 and the DAC1220 are respectively 10 and 12-bit binary multiplying digital-to-analog converters A deposited thin film R-2R resistor ladder divides the reference

DAC102X

Abstract: dac1021 DAC122X
Contextual Info: DAC1020,DAC1021,DAC1022,DAC1220,DAC1222 DAC1020/DAC1021/DAC1022 10-Bit Binary Multiplying D/A Converter DAC1220/DAC1222 12-Bit Binary Multiplying D/A Converter Literature Number: SNAS541 DAC1020 DAC1021 DAC1022 10-Bit Binary Multiplying D A Converter DAC1220 DAC1222

10bit DAC 10V output

Abstract: DAC102X BIT 3713 AD7521 LM741 10bit DAC 15V output DAC1021 DAC1220 Application Notes DAC1222 LF351 OPERATIONAL AMPLIFIER
Contextual Info: S e m i c o n d u c t o r DAC 1020/D AC 1021 /D A C 1022 10-Bit Binary Multiplying D /A Converter DAC 1220/D AC1222 12-Bit Binary Multiplying D /A Converter General Description The DAC1020 and the DAC1220 are, respectively, 10 and 12-bit binary multiplying digital-to-analog converters. A de­

AD8345

Abstract: AD9773 P1B10
Contextual Info: 12-Bit, 160 MSPS, 2x/4×/8× Interpolating Dual TxDAC+ D/A Converter AD9773 FEATURES Versatile input data interface Twos complement/straight binary data coding Dual-port or single-port interleaved input data Single 3.3 V supply operation Power dissipation: typical 1.2 W @ 3.3 V

DAC-HA14BM

Abstract: DAC-HA12BC DAC with BCD input DAC-HA14BC CD4050 DAC with BCD inputs DAC-HA12DC diagram for 4 bits binary multiplier circuit DAC-HA10B DAC-HA12B
Contextual Info: DAC-HA Series Precision, Multiplying CMOS D/A Converters FEATURES • • • • • • 10-, 12-, and 14-Bit binary models 3-digit BCD model 20 MHz Reference bandwidth 2 ppm/°C Gain tempco + 5V dc and + 1 5V dc Supply versions Input protected GENERAL D ESCR IPTIO N

Contextual Info: PDSP16116/A OCTOBER 1996 DS3707 - 4.2 PDSP16116/A 16 BY 16 BIT COMPLEX MULTIPLIER Supersedes version October 1995 verison, DS3707 - 3.0 The PDSP16116A will multiply two complex (16 + 16) bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The

diagram for 4 bits binary multiplier circuit

Abstract: 4 bit barrel shifter circuit diagram 32 bit carry select adder 32 bit carry select adder code XXAB block diagram of 32 bit array multiplier 8001 SI block alu 4 bit barrel shifter barrel shifter
Contextual Info: Computational Units 2.1 2 OVERVIEW This chapter describes the architecture and function of the three computational units: the arithmetic/logic unit, the multiplier/ accumulator and the barrel shifter. Every device in the ADSP-2100 family is a 16-bit, fixed-point machine.

bfp 11A diode

Contextual Info: Si GEC PLESSEY S I M I t O N I L C T O H S P D S P 1 6 1 1 6 /A 16 BY 16 BIT COMPLEX MULTIPLIER Supersedes version October 1995 verison, DS3707 - 3.0) The PQSP16116A will multiply two complex (1 6 + 1 6 ) bit words every 50ns and can be configured to output the

144 pin pga

Abstract: PDSP16116 PDSP16116A PDSP16318 diode b10
Contextual Info: PDSP16116/A/MC PDSP16116/A/MC 16 By 16 Bit Complex Multiplier Supersedes July 1993 version, DS3858 - 1.0 DS3858 - 2.0 October 1998 The PDSP16116A will multiply two complex 16 + 16 bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The

logic diagram to setup adder and subtractor

Abstract: YR10 FFT 1024 point implementing ALU with adder/subtractor PR11 MIL-883 PDSP16116 PDSP16116A PDSP16318 tag l9 230
Contextual Info: PDSP16116/A/MC PDSP16116/A/MC 16 by 16 Bit Complex Multiplier DS3858 The PDSP16116A will multiply two complex 16 + 16 bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The data format is fractional two's complement.

aeg diode Si 11 n

Contextual Info: Si GEC P L E S S E Y S f M I C. O IN D ADVANCE INFORMATION L C T O R S P D S P 1 6 1 1 6 /A 16 BY 16 BIT COMPLEX MULTIPLIER Supersedes version in December 1993 Digital Video & Digital Signal Processing 1C Handbook, HB3923-1) The PDSP16116A will m ultiply tw o complex (16 + 1 6 ) bit

FULL SUBTRACTOR using 41 MUX

Abstract: DS3707 32 bit barrel shifter circuit diagram using multi bfp mark diode YI11 MT52L1G32D4PG-107 WT:B TR
Contextual Info: MITEL PD SP16116 16 X 16 Bit Complex Multiplier SEMICONDUCTOR Supersedes O ctober 1996 version, DS3707 - 4.2 DS3707 - 5.3 O ctober 1997 The PDSP16116 contains four 16x16 array multipliers, two 32-bit adder/subtractors and all the control logic required to sup­

Contextual Info: SN54LS261, SN74LS261 2 BIT BY 4-BIT PARALLEL BINARY MULTIPLIERS MARCH 1974 5N 54LS261 SN74LS261 Fast Multiplication . . . 5-Bit Product in 26 ns Typ Power Dissipation . . . 110 mW Typical . . J OR W P A C K A G E . . D OR N P A C K A G E TO P V IE W Latch Outputs for Synchronous Operation

"multiplier accumulator"

Abstract: CY7C510 7210l45 binary multiplier AM29510 IDT7210 IDT7210L TDC1010J TMC2210 7210L65
Contextual Info: IDT7210L 16 x 16 PARALLEL CMOS MULTIPLIER ACCUMULATOR COMMERCIAL TEMPERATURE RANGE 16-BIT PARALLEL CMOS MULTIPLIER-ACCUMULATOR IDT7210L FEATURES: featuring individual input and output registers with clocked D-type flip-flop, - 16 x 16 parallel multiplier-accumulator with selectable accumulation and a preload capability which enables input data to be preloaded into the output

Z27 TRW

Contextual Info: 1 6 x 1 6 PARALLEL CMOS MULTIPLIER-ACCUMULATOR IDT7210L In teg rated Device T echnology, Inc. FEATURES: DESCRIPTION: • The IDT7210 is a high-speed, low-power 1 6 x 1 6-bit parallel multiplier-accumulator that is ideally suited for real-time digital signal processing applications. Fabricated using CEMOS

half adder ic number

Abstract: ic number of half adder 74s558 of half subtractor ic 4 bit binary half adder IC half adder ic gould 1604 8x8 bit binary multiplier pin configuration for half adder S2316
Contextual Info: 8 x 8 High Speed Schottky M ultipliers Features/Benefits S N 74S 557 S N 5 4 /7 4 S 5 5 8 Ordering Information TEMPERATURE PART NUMBER PACKAGE 54S558 J, 44 , (L) Military 74S557, 74S558 N,J, Commercial • Industry-standard 8 x8 multiplier • Multiplies two 8-bit numbers; gives 16-bit result

half adder ic number

Abstract: 4 bit binary half adder IC half adder ic
Contextual Info: 8 x 8 High Speed Schottky M ultipliers Features/Benefits S N 74S 557 S N 5 4 /7 4 S 5 5 8 Ordering Information PART NUMBER PACKAGE TEMPERATURE 54S558 J, <44 , L) M ilitary 74S557, 74S558 N,J, C om m ercial • Industry-standard 8x8 multiplier • Multiplies two 8-bit numbers; gives 16-blt result

16 bit multiplier VERILOG

Abstract: 8-bit multiplier VERILOG diagram for 4 bits binary multiplier circuit vhdl diagram for 4 bits binary multiplier circuit 5 bit binary multiplier 8 bit multiplier VERILOG 64 bit multiplier VERILOG 4 bit binary multiplier 8046 binary multiplier
Contextual Info: fp_mult Floating-Point Multiplier January 1996, ver. 1 Features Functional Specification 4 • ■ ■ ■ ■ ■ General Description fp_mult reference design implementing a floating-point multiplier Parameterized mantissa and exponent bit widths Optimized for FLEX 10K and FLEX 8000 device families

74S274

Abstract: 74ls275 74S275
Contextual Info: TY PES SN54LS275, SN 54S274. SN54S275. SN74LS275, SN74S274, SN74S275 4-BIT-BY-4-BIT BINARY MULTIPLIER WITH 3-STATE OUTPUTS 7-BIT-SLICE WALLACE TREES WITH 3-STATE OUTPUTS B U L L E T I N N O . D L -S 7 6 1 2 1 2 1 , O C T O B E R 1 9 7 6

242P7

Abstract: IDT7217L MPY016H 7217l20
Contextual Info: IDT7217L 16 x 16 PARALLEL CMOS MULTIPLIERS COMMERCIAL TEMPERATURE RANGE 16-BIT PARALLEL CMOS MULTIPLIERS FEATURES: - IDT7217L modified Booths algorithm and IDT’s high-performance, submicron CMOS technology, has achieved speeds comparable to bipolar 20ns max. , at 1/

binary multiplier gf Vhdl code

Abstract: 8 bit binary numbers multiplication picoblaze galois field theory binary multiplier Vhdl code 4 bit binary multiplier Vhdl code gf multiplier program gf multiplier vhdl program XAPP371 galois xapp373
Contextual Info: Application Note: CoolRunner-II CPLDs R CoolRunner-II CPLD Galois Field GF 2m Multiplier XAPP371 (v1.0) September 26, 2003 Summary This application note outlines three Galois multiplier solutions of increasing bit-length and complexity, stepping through generation and verification processes.

"multiplier accumulator"

Abstract: TDC1010J 7210l45 7210L25 CY7C510 TMC2210 7210l20 "Functional replacement" AM29510 IDT7210
Contextual Info: IDT7210L 16 x 16 PARALLEL CMOS MULTIPLIER-ACCUMULATOR Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 16 x 16 parallel multiplier-accumulator with selectable accumulation and subtraction • High-speed: 20ns multiply-accumulate time • IDT7210 features selectable accumulation, subtraction,

ln393

Abstract: ap 4746 P13C PP3310 228p3
Contextual Info: IDT7210L 1 6 x 1 6 PARALLEL CMOS MULTIPLIER-ACCUMULATOR Integrated Device Technolog» Inc. FEATURES: DESCRIPTION: • The IDT7210 is a high-speed, low-power 1 6 x 1 6-bit parallel m ultiplier-accum ulator that is ideally suited for real-time digital signal processing applications. Fabricated using CMOS