12 BIT BINARY MULTIPLIER Search Results

DAC102X

Abstract: dac1222 DAC122X DAC1221LCN lm741 low pass filter LM741 dac1222lcn AD7520 AD7521 AD7531
Contextual Info: DAC1020 DAC1021 DAC1022 10-Bit Binary Multiplying D A Converter DAC1220 DAC1222 12-Bit Binary Multiplying D A Converter General Description The DAC1020 and the DAC1220 are respectively 10 and 12-bit binary multiplying digital-to-analog converters A deposited thin film R-2R resistor ladder divides the reference

DAC122X

Abstract: DAC102X LM741 AD7520 AD7521 AD7530 AD7531 AD7533 DAC1020 DAC1021
Contextual Info: DAC1020 DAC1021 DAC1022 10-Bit Binary Multiplying D A Converter DAC1220 DAC1222 12-Bit Binary Multiplying D A Converter General Description The DAC1020 and the DAC1220 are respectively 10 and 12-bit binary multiplying digital-to-analog converters A deposited thin film R-2R resistor ladder divides the reference

DAC102X

Abstract: dac1021 DAC122X
Contextual Info: DAC1020,DAC1021,DAC1022,DAC1220,DAC1222 DAC1020/DAC1021/DAC1022 10-Bit Binary Multiplying D/A Converter DAC1220/DAC1222 12-Bit Binary Multiplying D/A Converter Literature Number: SNAS541 DAC1020 DAC1021 DAC1022 10-Bit Binary Multiplying D A Converter DAC1220 DAC1222

DAC1220 Application Notes

Abstract: LM741 DAC102X AC1222
Contextual Info: S e m i c o n d u c t o r DAC1020/DAC1021/DAC1022 10-Bit Binary Multiplying D/A Converter DAC1220/DAC1222 12-Bit Binary Multiplying D/A Converter General Description The DAC1020 and the DAC1220 are, respectively, 10 and 12-bit binary multiplying digital-to-analog converters. A de­

10bit DAC 10V output

Abstract: DAC102X BIT 3713 AD7521 LM741 10bit DAC 15V output DAC1021 DAC1220 Application Notes DAC1222 LF351 OPERATIONAL AMPLIFIER
Contextual Info: S e m i c o n d u c t o r DAC 1020/D AC 1021 /D A C 1022 10-Bit Binary Multiplying D /A Converter DAC 1220/D AC1222 12-Bit Binary Multiplying D /A Converter General Description The DAC1020 and the DAC1220 are, respectively, 10 and 12-bit binary multiplying digital-to-analog converters. A de­

dac1221

Abstract: DAC1220 Application Notes DAC102X DAC122X AC1222
Contextual Info: DAC1020/DAC1021/DAC1022/DAC1220/DAC1221/DAC1222 m National M Semiconductor DAC1020/D AC 1021 /D AC 1022 10-Bit Binary Multiplying D /A Converter DAC1220/D AC 1221 /D AC 1222 12-Bit Binary Multiplying D /A Converter General Description The DAC1020 and the DAC1220 are, respectively, 10 and

wallace tree

Abstract: binary multiplier S275 4 bit binary multiplier 4x4 bit multipliers AN 5274 LS183 types of binary multipliers S274 s283 gr c
Contextual Info: TYPES SN54LS275, SN54S274. SN54S275, SN74LS275, SN74S274, SN74S275 4-BIT-BY-4-BIT BINARY MULTIPLIER WITH 3-STATE OUTPUTS 7-BIT-SLICE WALLACE TREES WITH 3-STATE OUTPUTS TTL LSI B U L L E T IN N O . D L -S 761 2 12 1 , O C T O B E R 1976 'S274 Provides 8-Bit Product in Typically

LM347 14 PIN

Abstract: lm347 DAC1222 LM741 DAC122X DAC1022 AD7520 AD7530 AD7533 DAC1020
Contextual Info: General Description The DAC1020 and the DAC1220 are, respectively, 10 and 12-bit binary multiplying digital-to-analog converters. A de­ posited thin film R-2R resistor ladder divides the reference current and provides the circuit with excellent temperature

AD8345

Abstract: AD9773 P1B10
Contextual Info: 12-Bit, 160 MSPS, 2x/4×/8× Interpolating Dual TxDAC+ D/A Converter AD9773 FEATURES Versatile input data interface Twos complement/straight binary data coding Dual-port or single-port interleaved input data Single 3.3 V supply operation Power dissipation: typical 1.2 W @ 3.3 V

Contextual Info: □Mn DAC-HA Series Precision, Multiplying CMOS D/A Converters FEATURES • • • • • • 10-, 12-, and 14-Bit binary models 3-digit BCD model 20 MHz Reference bandwidth 2 ppm/°C Gain tempco + 5V dc and + 1 5V dc Supply versions Input protected + V DD

AD8345

Abstract: AD9773 P1B10
Contextual Info: 12-Bit, 160 MSPS, 2x/4×/8× Interpolating Dual TxDAC D/A Converter AD9773 FEATURES Versatile input data interface Twos complement/straight binary data coding Dual-port or single-port interleaved input data Single 3.3 V supply operation Power dissipation: typical 1.2 W @ 3.3 V

DAC-HA14BM

Abstract: DAC-HA12BC DAC with BCD input DAC-HA14BC CD4050 DAC with BCD inputs DAC-HA12DC diagram for 4 bits binary multiplier circuit DAC-HA10B DAC-HA12B
Contextual Info: DAC-HA Series Precision, Multiplying CMOS D/A Converters FEATURES • • • • • • 10-, 12-, and 14-Bit binary models 3-digit BCD model 20 MHz Reference bandwidth 2 ppm/°C Gain tempco + 5V dc and + 1 5V dc Supply versions Input protected GENERAL D ESCR IPTIO N

CD4050

Abstract: CD4050 pin diagram DAC-HA12BC CD4050 equivalent DAC with BCD inputs DAC-HA14BC binary bcd conversion logic diagram DAC with BCD input DAC-HA12DC DAC-HA12BC-1
Contextual Info: d a t e lt data conversion as d e s l s i s l i ooooais a f T - £ s \ - c f t - 0 £b DAC-HA Series Precision, Multiplying CMOS D/A Converters FEATURES • • • • • • 10-, 12-, and 14-Bit binary models 3-digit BCD model 20 MHz Reference bandwidth

00103A

Contextual Info: APPLICATION NOTE H8/300H Tiny Series Signed 32-Bit Binary Multiplication MULS Introduction Carries out binary multiplication in this format: multiplicand (signed, 32 bits) x multiplier (signed, 32 bits) = product (signed, 64 bits). Target Device H8/300H Tiny Series

ALU of 4 bit adder and subtractor

Abstract: 4 bit binary full adder and subtractor PDSP16116 4 bit barrel shifter circuit for left shift radix-2 PDSP16116A PDSP16256 PDSP16318A PDSP16350 PDSP16510
Contextual Info: L L iS S S U b J SEM ICO N DU CTO RS P D S P 1 6 1 1 6 / A 16 BY 16 BIT COMPLEX MULTIPLIER SUPERSEDES JAN UAR Y 1990 EDITION The PDSP16116A will multiply two complex (16+16) bit words every 50ns and can be configured to output the com­ plete complex (32+32) bit result within a single cycle. The data

Contextual Info: PDSP16116/A OCTOBER 1996 DS3707 - 4.2 PDSP16116/A 16 BY 16 BIT COMPLEX MULTIPLIER Supersedes version October 1995 verison, DS3707 - 3.0 The PDSP16116A will multiply two complex (16 + 16) bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The

diagram for 4 bits binary multiplier circuit

Abstract: 4 bit barrel shifter circuit diagram 32 bit carry select adder 32 bit carry select adder code XXAB block diagram of 32 bit array multiplier 8001 SI block alu 4 bit barrel shifter barrel shifter
Contextual Info: Computational Units 2.1 2 OVERVIEW This chapter describes the architecture and function of the three computational units: the arithmetic/logic unit, the multiplier/ accumulator and the barrel shifter. Every device in the ADSP-2100 family is a 16-bit, fixed-point machine.

bfp 11A diode

Contextual Info: Si GEC PLESSEY S I M I t O N I L C T O H S P D S P 1 6 1 1 6 /A 16 BY 16 BIT COMPLEX MULTIPLIER Supersedes version October 1995 verison, DS3707 - 3.0) The PQSP16116A will multiply two complex (1 6 + 1 6 ) bit words every 50ns and can be configured to output the

144 pin pga

Abstract: PDSP16116 PDSP16116A PDSP16318 diode b10
Contextual Info: PDSP16116/A/MC PDSP16116/A/MC 16 By 16 Bit Complex Multiplier Supersedes July 1993 version, DS3858 - 1.0 DS3858 - 2.0 October 1998 The PDSP16116A will multiply two complex 16 + 16 bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The

Contextual Info: JANUARY 1990 PILE SSEY S E M IC O N D U C T O R S : P D S P 1 6 1 1 6 / 1 6 1 1 6 A 16 BY 16 BIT COMPLEX MULTIPLIER Supersedes April 1989 Edition The PDSP16116A will multiply two complex (16+16) bit words every 50ns and can be configured to output the com­

Contextual Info: APRIL 1989 Ä PLESSEY W S em ico n d u cto rs. P D S P 16116 16 BY 16 BIT COMPLEX MULTIPLIER SUPERSEDES EDITION IN JULY 1988 DSP 1C HANDBOOK The PDSP16116 will multiply two complex (16+16) bit words every 100ns and can be configured to output the complete complex (32+32) bit result within a single cycle. The

barrel shifter block diagram

Abstract: parallel Multiplier Accumulator based on Radix-2 ALU of 4 bit adder and subtractor CD11N TTL ALU of 4 bit adder and subtractor radix-2 YIO 98 PDSP16116 PDSP16116A PDSP16318
Contextual Info: PDSP16116/A/MC MITEL 16 By 16 Bit Complex Multiplier SEM ICON D UCTOR Supersedes July 1993 version, DS3858 - 1.0 DS3858 - 2.0 O ctober 1998 The PDSP16116A will multiply two complex 16 + 16 bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The

Contextual Info: PDSP16116/A/MC PDSP16116/A/MC 16 by 16 Bit Complex Multiplier DS3858 The PDSP16116A will multiply two complex 16 + 16 bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The data format is fractional two's complement.

logic diagram to setup adder and subtractor

Abstract: YR10 FFT 1024 point implementing ALU with adder/subtractor PR11 MIL-883 PDSP16116 PDSP16116A PDSP16318 tag l9 230
Contextual Info: PDSP16116/A/MC PDSP16116/A/MC 16 by 16 Bit Complex Multiplier DS3858 The PDSP16116A will multiply two complex 16 + 16 bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The data format is fractional two's complement.