10K ECL Search Results

ecl 10K

Abstract: RCD Components E1001 E1004 E1008 E103 E105 SCHEMAT
Contextual Info: PRELIMINARY ECL DIGITAL DELAY LINES -5-41-5 - ECL 10K INTERFACED -5-41-5 - ECL 100K INTERFACED FEATURES TYPE E105 - ECL 10K 5 TAP Tap Delay nS 3 20 4 25 5 30 6 2X Total Delay Pulse Spacing 5X Total Delay -1.0V provided by open emitter ECL 10K gate

3A5 tube

Abstract: SM DELAY LINES 3H-25
Contextual Info: PROGRAMMABLE ECL DELAY LINES EC3A 3 BIT 10K ECL LOGIC EC3H 3 BIT 10KH ECL LOGIC RoHS RESISTORS CAPACITORS COILS DELAY LINES Term.W is RoHS compliant Incremental delays of 0.5nS to 10nS Choice of 16-pin DIP or SM package 10K E C L RC D P/N 10K H E C L RC D P/N

DECL

Abstract: decl_fm FECL-10 FECL-15 FECL-20 FECL-25 FECL-50 MECL-10 MECL-15 MECL-20
Contextual Info: 10K ECL Logic Buffered Delay 16-Pin Modules 5-Tap: DECL • Single: FECL • Triple: MECL Electrical Specifications at 25OC Delay Single Triple ns 10K P/N 10K P/N FECL-3 MECL-3 3 ± 0.5 FECL-4 MECL-4 4 ± 0.5 FECL-5 MECL-5 5 ± 0.5 FECL-6 MECL-6 6 ± 0.75

Contextual Info: 10K ECL Logic Buffered Delay 16-Pin Modules 5-Tap: DECL • Single: FECL • Triple: MECL Electrical Specifications at 25°C Delay Single Triple 10K P/N ns 10K P/N 3 ±0.5 4 ± 0.5 5 ±0.5 6 ± 0.75 7 ±0.75 8 ±0.8 9 ± 1.0 10 ± 1.0 15 ± 1.5 20 ± 1.5

FECL250

Contextual Info: RHOMBUS INDUSTRIES INC M5E D • 772MR20 Ü0Q02S1 Ö ■ RHBT-H'J- i3 10K & 100K ECL BUFFERED DELAY MODULES GENERAL OPERATING SPECIFICATIONS JQK.ECL TEST CONDITIONS 10K ECL: VEESupply V o lta g e .-5.20 ± 0.25 VDC

Contextual Info: ECL Surface-Mount Delay Modules ► 10k ECL logic levels. 10k ECL Programmable Delay Modules Part No. GECLPG301MX GECLPG302MX GECLPG303MX GECLPG304MX GECLPG305MX GEGLPG306MX GECLPG307MX GECLPG308MX GECLPG309MX GECLPG310MX Step Delay ns ± ns Max. Delay ns ± ns

Contextual Info: DP8480 10K ECL-TO-TTL LEVEL TRANSLATOR WITH LATCH SLLS035B - D3058, NOVEMBER 1987 - REVISED FEBRUARY 1993 * ECL Control Inputs * 3-State Outputs N PACKAGE TOP VIEW * 10K ECL Input Compatible v Ee * Direct Replacement for National Semiconductor DP8480 [ 1

eclpw

Abstract: pulse width generator
Contextual Info: 10K / 10KH ECL Logic Pulse Width Control Modules Electrical Specifications at 25OC Electrical Specifications at 25OC 10KH ECL Pulse Width Generator Modules 10K ECL Pulse Width Generator Modules Maximum Freq. MHz 77.0 67.0 59.0 53.0 48.0 43.0 31.0 23.0 19.0

Contextual Info: bel/ defining a degree of excellence DIGITAL DELAY LINE SERIES 0451 ECL 10K PROGRAMMABLE LOGIC DELAY MODULE 3 BIT TECHNICAL INFORMATION TEST CONDITIONS Driving Signal Pulse Width Pulse Period Supply Voltage, Vee Output Terminations ECL 10K Buffer 1.5 x Total Delay

Contextual Info: bel/ defining a degree of excellence DIGITAL DELAY LINE SERIES 0451 ECL 10K PROGRAMMABLE LOGIC DELAY MODULE 3 BIT TECHNICAL INFORMATION TEST CONDITIONS Driving Signal Pulse Width Pulse Period Supply Voltage, Vee Output Terminations ECL 10K Buffer 1.5 x Total Delay

Contextual Info: bel/.defining a degree of excellence DIGITAL DELAY LINE SERIES 0451 ECL 10K PROGRAMMABLE LOGIC DELAY MODULE 3 BIT TECHNICAL INFORMATION TEST CONDITIONS Driving Signal Pulse Width Pulse Period Supply Vbltage, Vee Output Terminations ECL 10K Buffer 1.5 x Total Delay

SM2400

Contextual Info: FULL SIZE D.I.L M package CRYSTAL OSCILLATORS 10K ECL -5.2V M1400, M1444, M2400, M2444, Thru-Hole / Gull Wing M1436, M1445, M2436, M2445 These models which use 10K ECL -5.2V logic are not recommended for new designs. Suggested models are M1600 series that use

DP8480

Abstract: D3058
Contextual Info: DP8480 10K ECL-TO-TTL LEVEL TRANSLATOR WITH LATCH SLLS035B - D3058, N OVEMBER 1987 - REVISED FEBRUARY 1993 ECL Control Inputs 3-State Outputs 10K ECL Input Compatible N PACKAGE fTOP VIEW Ve e [ 1 DO [ 2 Direct Replacement for National Semiconductor DP8480

Contextual Info: NEC ffPB10474E 1,024 X 4-Bit 10K ECL RAM NEC Electronics Inc. PRELIMINARY INFORMATION Description Pin Configuration The /UPB10474E is a very high-speed 10K interface ECL RAM organized as 1,024 words by 4 bits and designed with noninverted, open-emitter outputs and low power

Contextual Info: SEC fiPB10A484 4,096 X 4-Blt 10K ECL RAM NEC Electronics Inc. PRELIMINARY INFORMATION Description Pin Configurations The mPB10A484 is a very high-speed 10K interface ECL RAM organized as 4,096 words by 4 bits with nonlnverted, open-emitter outputs. Two versions with access

Contextual Info: NEC fiPD10504 65,536 x 4-Bit 10K BiCMOS ECL RAM NEC Electronics Inc. PRELIMINARY INFORMATION Description Pin Configuration The /JPD10504 is a very high-speed BiCMOS RAM with a 10K ECL interface. Its unique design uses blended CMOS and bipolar peripheral circuits and N-channel

Contextual Info: NEC ffPB10474E 1,024 X 4-Bit 10K ECL RAM NEC Electronics Inc. PRELIMINARY INFORMATION Description Pin Configuration The ¿JPB10474E is a very high-speed 10K interface ECL RAM organized as 1,024 words by 4 bits and designed with noninverted, open-emitter outputs and low power

Contextual Info: NEC pPB10474E 1024 X 4-Bit 10K ECL RAM NEC Electronics Inc. Description Pin Configurations The /UPB10474E is a very-high-speed 10K interface ECL RAM organized as 1024 words by 4 bits and designed with noninverted, open-emitter outputs and low power consumption.

Contextual Info: 10K ECL Logic Buffered Delay 16-Pin Modules 5-Tap: DECL Single: FECL Triple: MECL * * Electrical Specifications at 25°C_ 10K ECL 5 Tap P/N Tap Delay Tolerances +/- 5% or 1.5ns +/- 0.8ns <10ns Tap 1 Tap 2 Tap 3 Tap 4 Total - Tap 5

Contextual Info: 10K/10KH ECL Logic Pulse Width Control Modules Electrical Specifications at 25°C 10K ECL Pulse Width Generator Modules Part Number > Triggered by the input's rising edge input pulse width 5 ns, min. , a pulse of specified width will be generated at the output

Contextual Info: DP8480A DP8480A 10k ECL to TTL Level Translator with Latch Literature Number: SNOSBN8A DP8480A 10k ECL to TTL Level Translator with Latch General Description Features This circuit translates ECL input levels to TTL output levels and provides a fall-through latch The TRI-STATE outputs

Contextual Info: NEC pPD10500 262,144 x 1-Bit 10K BiCMOS ECL RAM NEC Electronics Inc. PRELIMINARY INFORMATION Description Pin Configuration ThepPD10500 is a very high-speed BiCMOS RAM with a 10K ECL interface. Its unique design uses blended CMOS and bipolar peripheral circuits and N-channel

Contextual Info: NEC /iPB10484A 4,096 X 4-BIT 10K ECL RAM NEC Electronics Inc. PRELIMINARY INFORMATION Description Pin Configurations The /tPB10484A is a very high-speed 10K interface ECL RAM. It is organized as 4,096 words by 4 bits and designed with noninverted, open-emltter outputs and

Contextual Info: 10K ECL Delay Modules 10k ECL Delay Modules Tap Delays ns Part No. T«1 T02 T03 V T05 Output Rise Time ECLDL025 ECLDL050 ECLDL075 ECLDL100 ECLDL125 ECLDL150 ECLDL200 ECLDL250 ECLDL300 ECLDL350 ECLDL400 ECLDL450 ECLDL500 5 10 15 20 25 30 40 50 60 70 80 90