10 D 208 Search Results

TLC1543 Application Note

Abstract: tlc2543
Contextual Info: TLC1542C, TLC1542I, TLC1542M, TLC1542Q, TLC1543C, TLC1543I, TLC1543Q 10ĆBIT ANALOGĆTOĆDIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 ANALOG INPUTS SLAS052F − MARCH 1992 − REVISED − JANUARY 2004 D D D D D D D D D 10-Bit Resolution A/D Converter 11 Analog Input Channels

M06T

Abstract: M10li
Contextual Info: TNETX3110 ThunderSWITCH 8/3 ETHERNET SWITCH WITH EIGHT 10-MBIT/S PORTS AND THREE 10-/100-MBIT/S PORTS SPWS047A – MARCH 1998 – REVISED APRIL 1999 D D D D Port Configurations: Eight 10-Mbit/s Ports – Ports Arranged in One Group of Eight Ports in a Multiplexed Interface

Contextual Info: TNETX3110 ThunderSWITCH 8/3 ETHERNET SWITCH WITH EIGHT 10-MBIT/S PORTS AND THREE 10-/100-MBIT/S PORTS SPWS047A – MARCH 1998 – REVISED APRIL 1999 D D D D Port Configurations: Eight 10-Mbit/s Ports – Ports Arranged in One Group of Eight Ports in a Multiplexed Interface

LSHA

Abstract: THX 201 DD24 DD25 TNETE2008 TNETE2101 TNETX3151 DD22 802.1d M07C
Contextual Info: TNETX3151 ThunderSWITCH 12/3 ETHERNET SWITCH WITH 12 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS SPWS048A – MARCH 1998 – REVISED APRIL 1999 D D D D Port Configurations: Twelve 10-Mbit/s Ports – Ports Arranged in One Group of Eight Ports and One Group of Four Ports in a

Contextual Info: TNETX3151 ThunderSWITCH 12/3 ETHERNET SWITCH WITH 12 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS SPWS048A – MARCH 1998 – REVISED APRIL 1999 D D D D Port Configurations: Twelve 10-Mbit/s Ports – Ports Arranged in One Group of Eight Ports and One Group of Four Ports in a

Contextual Info: VN10KC New Product Vishay Siliconix N-Channel Enhancement-Mode MOSFET Transistor PRODUCT SUMMARY V BR DSS Min (V) rDS(on) Max (W) VGS(th) (V) ID (A) 60 5 @ VGS = 10 V 0.8 to 2.5 0.31 FEATURES BENEFITS APPLICATIONS D D D D D D D D D D D Drivers: Relays, Solenoids, Lamps, Hammers, Displays,

2SJ588

Abstract: diode sg 45 2SJ575 Hitachi 2SJ DSA003644
Contextual Info: 2SJ588 Silicon P Channel MOS FET High Speed Switching ADE-208-802 Z 1st.Edition. June 1999 Features • Low on-resistance R DS =2.8 typ. (V GS = -10 V , I D = -50 mA) R DS =5.7 typ. (V GS = -4 V , I D = -50 mA) • 4 V gate drive device. Outline SPAK D 3

Contextual Info: HIGH RELIABILITY TEST CONDITIONS NO. T E S T C O N D IT IO N T E S T ITE M D U R A T IO N "" ® REFERNCE DOCUMENT ilfi S O L D E R A B IL IT Y 230 ± 5 °C 5 SEC M IL-S T D -202 M E T H O D 208 iiisi LE A D P U LL 2 KG IN A X IA L LEA D D IR E C T IO N 10 SEC

SO20 Package

Abstract: SO20-7 ic 6116
Contextual Info: 1 IDT54/74FCT2244T/AT/CT FAST CMOS OCTAL BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES OA0 D A1 4 17 D B0 OB1 5 16 OA1 D A2 6 OB2 7 D A3 OB3 GND P20-1 D 20-1 SO20-2 SO20-7 SO20-8 E20-1 15 D B1 14 OA2 8 13 D B2 9 12 OA3 10 11 D B3 D A1 4 OB 1

4AK16

Abstract: SP-10 DSA003638
Contextual Info: 4AK16 Silicon N-Channel Power MOS FET Array ADE-208-1201 Z 1st. Edition Mar. 2001 Application High speed power switching Features • Low on-resistance R DS(on) ≤ 0.18 , VGS = 10 V, I D = 5 A R DS(on) ≤ 0.25 , VGS = 4 V, I D = 5 A • Capable of 4 V gate drive

XF160

Contextual Info: 2 . Sch em atic: 1. M echanical D im ensions: I o o CN E lectrical Sp ecification s: 1.40 TOP VIEW OCL: 10 u H ± 20 % @ 100KHz 0.1V BOTTOM VIEW DCR: 0 .3 0 O hm s Max Isat: 1.78 1Adc B ased on 10% Typ d ro p in OCL Irm s: 0 .9 0 A (B ased on 40"C Typ Tem p Rise)

208H

Contextual Info: 2 . Schem atic: 1. M e c h a n ic a l D im e n s i o n s : 3. E l e c t r i c a l OCL: D — Q: -H 7 .0 0 I5-0 1— S p e c ific a tio n s:@ 2 5 “C 1Q 0uH ±20 % @1KHz 0.1V 10 Min @ 100KHz 0.1V DCR: 100 m O hm s Max Isat: 2 ADC Max 10% Typ d ro p In OCL

AGC230

Abstract: SD050 AN298 AN298 silicon labs diseqc* LNB POWER Si2110 schematic diagram pulse with modulator DEV30 SD0705 SI2109
Contextual Info: S i 2 1 0 7 / 0 8 / 0 9/10 S A T E L L I T E R E C E I V E R F O R D V B -S /D S S W I T H QUICKLOCK AND QUICKSCAN Features Automatic acquisition and fade recovery Automatic gain control On-chip blind scan accelerator with QuickScan Si2109/10 only DiSEqC 2.2 support

Contextual Info: PRELIMINARY AM D H Am79C875 NetPHY -4LP Low Power Quad 10/100-TX/FX Ethernet Transceiver DISTINCTIVE CHARACTERISTICS • Four 10/1OOBASE-TX Ethernet PHY transceivers ■ Next Page register support ■ Supports RMII Reduced Mil interface and Shared Mil interface for 100 Mbps repeater

Contextual Info: □ □ □ ILC DATA DEVICE CORPORATION_ _ _ HSDC-8915 MONOBRID SERIES 14 BIT MONOLITHIC HYBRID S/D AND R/D TRACKING CONVERTERS FEATURES • 10, RPS TRACKING D ESC RIPTIO N The HSDC-8915 M onobrid® Series is the first complete 14-bit synchro-todigital or resolver-to-digital converter

306HC

Contextual Info: PM7344 S/UNI-MPH DATA SHEET MULTI-PHY USER NETWORK INTERFACE AM ISSUE 7 03 :4 9: 10 PMC-950449 TM m be S/ UNI r, 20 10 PM7344 ay, 10 De ce MPH fI HS IN C on Fr id S/UNI MPH DATA SHEET ISSUE 7: DECEMBER 2005 Do wn lo ad ed [c on tro lle d] by IH S Pa rts Ma

Contextual Info: 2SJ225 2087 i L D L o w D riv e S e r ie s V D5S= 3 0 V P Channel Power M OSFET E 38 10 F e a tu re s •Small ON resistance. ■Very high-speed switching. ■Low-voltage drive. • Meets radial taping. A bsolute M axim um R atings a tT a = 25°C Drain to Source Voltage

ip475

Abstract: CBV4755 D10A SPT7852
Contextual Info: S P SPT7 8 S 2 T SIGNAL PROCESSIN G TECHNOLOGIES DUAL 10-BIT, 20 MSPS, 160 mW A/D CONVERTER 2 FEATURES APPLICATIONS • • • • • • Dual 10-Bit/20 MSPS Analog-to-Digital Converter Monolithic CMOS Internal Track-and-Hold Low Power Dissipation: 160 mW

Surface Mount

Abstract: marking smd NU SMD MARKING CODE 336 SMD MARKING CODE 515 marking 122k smd smd 473K smd marking code nu
Contextual Info: API_newlayouts_single:APIcatalog_newlayouts 8/30/10 10:43 AM Page 67 er w Po NU Physical Parameters Inches Millimeters A 0.166 to 0.190 4.22 to 4.83 B 0.118 to 0.134 3.00 to 3.40 C 0.118 to 0.134 3.00 to 3.40 D 0.015 Min. 0.38 Min. E 0.054 to 0.078 1.37 to 1.98

208H

Contextual Info: 1. M echanical D im ensions: 2 . Sch em atic: 3. E lectrical Sp ecification s: OCL: 1.5uH±20% @100KHz 0.1V Q: 10 Min @100KHz 0.1V DCR: 0.05 Ohms Max SRF: 115MHz Typ Irms: 2.80A Based on 15‘ C Temp Rise Isat: 2.60Adc (Based on 10% drop Typ in OCL) a 0.055

208H

Contextual Info: 2 . Sch em atic: 1. D im ensions: 3. E lectrical Specs: OCL: 4 7 u H ± 2 0 % @ 100KH z, 0.1V DC Res.: 0.60 O hm s Max Isat: TOP VIEW BOTTOM VIEW 0.75Adc B ase d on 10% OCL Drop Irms: 0.60A (B ase d on 40"C Tem p Rise) SRF: 14MHz Min Q: 20 Typ @2.52MHz, 0.1V

THMY6440A1AEG10

Abstract: M8A010 D036
Contextual Info: T O S H IB A TH M Y 6440A 1A EG -10,-12A,-12 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 4,194,304 W O R D S x 64 BITS SY N CH RO N O U S D R A M M O D U LE DESCRIPTION The THMY6440A1AEG is a 4,194,304 words by 64 bits Synchronous DRAM module which assembled

Contextual Info: 10 CKT DIM A .100/2.54 4 F 5 D .200/5.08 .300/7.62 .300/7.62 .400/10.16 .400/10.16 .500/12.70 .600/15.24 7 .600/15.24 .700/17.78 8 .700/17.78 .800/20.32 JLL .800/20.32 10 .900/22.86 .900/22.86 1.000/25.40 11 1.000/25.40 1,100/27.94 12 1.100/27.94 1 2 0 0 /3 0 48

472M

Contextual Info: 2. Sch em atic: 1. M echanical D im ensions: c 0.100 0 .0 4 3 Max 1.10 2 .5 0 3. E lectrical Specification : in oo I 0 .1 5 0 3 .8 0 C\l CD OCL: DCR: d<° SRF: 8 0 MHz TYP. Irm s: Isat: 1.70Adc based on 40% Tem p Rise 1.10Adc (based on 10% d ro p in OCL)