1-BIT D LATCH Search Results

A115-A

Abstract: C101 SN74SSTU32864 SN74SSTU32864GKER D14-D25
Contextual Info: SN74SSTU32864 25-BIT CONFIGURABLE REGISTERED BUFFER WITH SSTL_18 INPUTS AND OUTPUTS SCES434 – MARCH 2003 D D D D D D D Member of the Texas Instruments Widebus+ Family Pinout Optimizes DDR-II DIMM PCB Layout Configurable as 25-Bit 1:1 or 14-Bit 1:2 Registered Buffer

Contextual Info: ADS1204 SBAS301A − OCTOBER 2003 − REVISED JUNE 2004 Four 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulators FEATURES D 16-Bit Resolution D 14-Bit Linearity D Resolution/Speed Trade-Off: D D D D D D D D D 10-Bit Effective Resolution with 10µs Signal Delay 12-Bit with 19µs

SMJ4C1024

Abstract: 4c1024 SMJ44C256 4C1024-15 4c10248
Contextual Info: SMJ4C1024 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY SGMS023E – DECEMBER 1988 – REVISED MARCH 1996 D D D D D D D D D D D D D Organization . . . 1 048 576 x 1-Bit Processed to MIL-STD-883, Class B Single 5-V Supply 10% Tolerance Performance Ranges:

Contextual Info: D S 0 4 -1 3 2 0 1 -3 a E : DATASHEET : LINEAR 1C CMOS 8 BIT 4-CHANNEL MB86022 D/A CONVERTER CMOS 8-BIT 4-CHANNEL D/A CONVERTER The Fujitsu MB86022 is a 8-bit 4-channel Digital to Analog Converter which is fabricated with Fujitsu CMOS Technology. The data latch and output buffer circuitry

Contextual Info: HEADER LINE 1 FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS095C – MARCH 1999 – REVISED DECEMBER 1999 D D D D D D D D D D D D D Separate 16-Bit Data Memory Buses and One Program Memory Bus 40-Bit Arithmetic Logic Unit ALU Including a 40-Bit Barrel Shifter and Two

Contextual Info: ADS1203 A D S1 203 ADS 1 2 03 SBAS318A − JUNE 2004 − REVISED MARCH 2005 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply D 1% Internal Reference Voltage

848 diode

Contextual Info: ADS1203 A D S1 203 ADS 1 2 03 SBAS318A − JUNE 2004 − REVISED MARCH 2005 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply D 1% Internal Reference Voltage

Contextual Info: ADS1203 A D S1 203 ADS 1 2 03 SBAS318A − JUNE 2004 − REVISED MARCH 2005 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply D 1% Internal Reference Voltage

Contextual Info: ADS1203 A D S1 203 ADS 1 2 03 SBAS318A − JUNE 2004 − REVISED MARCH 2005 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply D 1% Internal Reference Voltage

Contextual Info: ADS1203 A D S1 203 ADS 1 2 03 SBAS318A − JUNE 2004 − REVISED MARCH 2005 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply D 1% Internal Reference Voltage

ADS1202

Abstract: ADS1203 ADS1203IPWR ADS1203IPWT ADS1203IRGTR ADS1203IRGTT QFN-16
Contextual Info: ADS1203 A D S1 203 ADS 1 2 03 SBAS318A − JUNE 2004 − REVISED MARCH 2005 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply D 1% Internal Reference Voltage

Contextual Info: ADS1203 A D S1 203 ADS 1 2 03 SBAS318A − JUNE 2004 − REVISED MARCH 2005 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply D 1% Internal Reference Voltage

XR88C681

Abstract: explain the 8288 bus controller 8085 microprocessor opcode sheet 8085 opcode sheet free Pentium Processors 80586 8080 cpu module 80586 SCHEMATIC DIAGRAM OF intel 8086 68C681CJ 8086 opcode sheet free
Contextual Info: XR88C681 CMOS Dual Channel UART DUART June 2006 FEATURES D Two Full Duplex, Independent Channels D Asynchronous Receiver and Transmitter D Quadruple-Buffered Receivers and Dual Buffered Transmitters D Programmable Stop Bits in 1/16 Bit Increments D Internal Bit Rate Generators with More than 23 Bit

DACD

Abstract: TLC5620 TLV5621 TLV5621I TLV5621ID
Contextual Info: TLV5621I LOW-POWER QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTER SLAS138B – APRIL 1996 – REVISED FEBRUARY 1997 D D D D D D D D D D 2.7-V to 5.5-V Single-Supply Operation Three 8-Bit Voltage Output DACs One-Half Power 8-Bit Voltage Output DAC Fast Serial Interface . . . 1 MHz Max

C03025-0-2

Abstract: AD157 8002 op amp AD15700 AD15700BCA
Contextual Info: 1 MSPS 16-/14-Bit Analog I/O Port AD15700 FEATURES 16-Bit A/D Converter 1 MSPS S/ N + D : 90 dB Typ @ 250 kHz No Pipeline Delay 14-Bit D/A Converter Settling Time: 1 ␮s S/N: 92 dB Typ 2 80 MHz Amplifiers 30 V/␮s Slew Rate Rail-to-Rail Input and Output

Contextual Info: TLC5540 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS105C – JANUARY 1995 – REVISED MAY 1999 features D D D D D D D D D PW OR NS PACKAGE TOP VIEW 8-Bit Resolution Differential Linearity Error – ± 0.3 LSB Typ, ± 1 LSB Max (25°C) – ± 1 LSB Max

TLC5540 sop

Abstract: 74AC04 74ACT04 TLC5540 TLC5540CNSLE TLC5540CPW TLC5540INSLE TLC5540IPW
Contextual Info: TLC5540 8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER SLAS105C – JANUARY 1995 – REVISED MAY 1999 features D D D D D D D D D PW OR NS PACKAGE TOP VIEW 8-Bit Resolution Differential Linearity Error – ± 0.3 LSB Typ, ± 1 LSB Max (25°C) – ± 1 LSB Max

Contextual Info: 74LVC16373A-Q100; 74LVCH16373A-Q100 16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Rev. 1 — 24 June 2014 Product data sheet 1. General description The 74LVC16373A-Q100 and 74LVCH16373A-Q100 are 16-bit D-type transparent latches featuring separate D-type inputs with bus hold 74LVCH16373A-Q100 only for

Contextual Info: A D S1 203 ADS ADS1203 1 2 03 www.ti.com SBAS318C − JUNE 2004 − REVISED JANUARY 2008 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply

sinc3 TI

Contextual Info: A D S1 203 ADS ADS1203 1 2 03 www.ti.com SBAS318C − JUNE 2004 − REVISED JANUARY 2008 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply

Contextual Info: A D S1 203 ADS ADS1203 1 2 03 www.ti.com SBAS318C − JUNE 2004 − REVISED JANUARY 2008 Motor Control, Current Measurement 1ĆBit, 10MHz, 2ndĆOrder, DeltaĆSigma Modulator FEATURES D 16-Bit Resolution D 14-Bit Linearity D ±250mV Input Range with Single +5V Supply

Contextual Info: M N 5 7 1 0 /1 1 High-Temperature 16-Bit A/D Converters networks FEATURES DESCRIPTION • 16-Bit Resolution • Self-Calibrating A/D Provides 16-Bit Performance • High-Temperature Range Operation: MN5710: 0°C to +140°C MN5711: 0°C to +165°C • 50kHz Sampling Rate

HI1106

Contextual Info: 2 m a r !? H I 1 1 0 6 , C X A 1 1 0 6 8-Bit 35 MSPS June1996 High-Speed D/A Converter TTL Input) Features Description • R eso lu tio n . 8-Bit The HI1106, C X A 1 106 is an 8-bit 35 M S P S high-speed D/A

psri

Abstract: a110 IMSA110 IMSA110-G20S PGA100 A11007
Contextual Info: IMSA110 IMAGE AND SIGNAL PROCESSING SUB–SYSTEM 1-D/2-D SOFTWARE CONFIGURABLE CONVOLVER/FILTER ON-CHIP PROGRAMMABLE LINE DELAYS 0 — 1120 STAGES 8-BIT DATA AND 8.5-BIT COEFFICIENT SLICE 21 MULTIPLY-AND-ACCUMULATE STAGES 1-D (21) OR 2-D (3 x 7) CONVOLUTION WINDOW