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usb design

Contextual Info: intel 8x931 AA, 8x931 HA USB PERIPHERAL CONTROLLER 4.0 SIGNALS Table 8. Signal Description Sheet 1 of 3 Type Alternate Function Description O Address Lines. Upper byte of external memory address. P2.7:0/KS08:15 AD7:0 I/O Address/Data Lines. Lower byte of external memory address

P8085AH

Abstract: TMP8085AP TMP8085AP-2 TMP8085 TMP8156P MPU85-9
Contextual Info: TO SHIBA TMP8085A TMP8085AP-2/TMP8085AHP-2 8-BIT MICROPROCESSOR 1. GENERAL DESCRIPTION The TMP8085AP-2/TMP8085AHP-2, hereafter on referred to as TMP8085A, is a 8 bit micro processing unit MPU . TMP8085A uses a multiplexed data bus. The address is split between the 8 bit address bus and the 8 bit data bus. The on-chip address latches of

P8085AH

Abstract: intel p8085ah TMP8085AP-2 TMP8085AP P8085AH INTEL TMP8155P TMP8085AHP-2 8085A hex code TMP8085 J1229
Contextual Info: T O S H IB A TMP8085A TMP8085AP-2/TMP8085AHP-2 8-BIT MICROPROCESSOR 1. GEN ERA L DESCRIPTION The TMP8085AP-2/TMP8085AI1P-2, hereafter on referred to as TMP8085A, is a 8 bit micro processing unit MPU . TMP8085A uses a multiplexed data bus. The address is split between the 8 bit address bus and the 8 bit data bus. The on-chip address latches of

Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

pd548a

Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

PD548A

Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

pd548a

Abstract: scx 3405 A115-A C101 PCA9548A PCA9548ADBR PCA9548ARGER SC7S sc413
Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

pd548a

Abstract: SC7S
Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143B – OCTOBER 2006 – REVISED MARCH 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

sc413

Abstract: A115-A C101 PCA9548A PCA9548ADBR PCA9548ARGER sc516
Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

pd548a

Abstract: A115-A C101 PCA9548A PCA9548ADBR PCA9548ARGER SC413
Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

Contextual Info: PCA9548A 8-CHANNEL SWITCH WITH RESET I2C www.ti.com SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

PCA9548

Contextual Info: Not Recommended For New Designs www.ti.com PCA9548A 8-CHANNEL SWITCH WITH RESET I2C SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

pd548a

Contextual Info: Not Recommended For New Designs www.ti.com PCA9548A 8-CHANNEL SWITCH WITH RESET I2C SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

pd548a

Contextual Info: Not Recommended For New Designs www.ti.com PCA9548A 8-CHANNEL SWITCH WITH RESET I2C SCPS143C – OCTOBER 2006 – REVISED JUNE 2007 FEATURES • • • • 1-of-8 Bidirectional Translating Switches I2C Bus and SMBus Compatible Active-Low Reset Input Address by Three Hardware Address Pins for

Hitachi DSA00279

Contextual Info: HD74HC356 8-to-1-line Data Selectors/Multiplexer/Register with 3-state outputs Description This data selectors/multiplexers contain full on-chip binary decoding to select one of eight data sources. The data select address is stored in transparent latches that are enabled by a low level address

D5N diode

Abstract: Hitachi DSA002789
Contextual Info: HD74HC354 8-to-1-line Data Selectors/Multiplexer Register with 3-state outputs Description This data selectors/multiplexers contains full on-chip binary decoding to select one of eight data sources. The data select address is stored in transparent latches that are enabled by a low level address

CI23

Abstract: encoder ss55 AR10 AR11 AR12 KE5B256B1 KE5B256B1CFP QFP144 SHI20
Contextual Info: ADDRESS PROCESSOR KE5B256B1 64k-bit • 3-port type Ver. 1.2.1 Table of Contents Address Processor KE5B256B1 1. Features 8. CPU Port 1.1 1.2 1.3 Introduction Functional Overview Specifications 1.4 Register Names 2. Block Diagram 8.1 8.2 8.3 8.4 8.5 8.6 8.7

HD74HC354

Abstract: Hitachi DSA003771
Contextual Info: HD74HC354 8-to-1-line Data Selectors/Multiplexer Register with 3-state outputs Description This data selectors/multiplexers contains full on-chip binary decoding to select one of eight data sources. The data select address is stored in transparent latches that are enabled by a low level address on pin 11,

HD74HC356

Abstract: Hitachi DSA00395
Contextual Info: HD74HC356 8-to-1-line Data Selectors/Multiplexer/Register with 3-state outputs Description This data selectors/multiplexers contain full on-chip binary decoding to select one of eight data sources. The data select address is stored in transparent latches that are enabled by a low level address on pin 11,

NS 6 W 183 T

Contextual Info: LVQ138 National Semiconductor 74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer General Description Features The LVQ138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables

74LVQ138

Abstract: 74LVQ138SC 74LVQ138SJ LVQ138 M16A M16D
Contextual Info: Revised June 2001 74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer General Description Features The LVQ138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables