0Q0000 Search Results

Contextual Info: DESCRIPTION: 2MM DULA ROW RECEPTACLE SMT "L" = NO. DF CONTACTS MATERIAL: HOUSING: NYLDN 6T <UL 9 4 V -D BLACK CONTACT: PHDSPHDR BRONZE PLATING: GOLD FLASH ENTIRE CDNTACT RoHS COMPLIANT PER RDW X ,079 ±,005 //// n n n n n n n O00QOEIO 0 0Q0000 ELECTRICAL:

D2B1

Abstract: u706
Contextual Info: Î CMOS ASYNCHRONOUS FIFO 2 5 6 x 9 , 5 1 2 x 9 , 1KX 9 dt) IDT7200L IDT7201LA IDT7202LA In te g rate d D<ïv ic e Technology, Inc. FEATURES: • • • • • • • • • • • • • • Full and Empty flags to prevent data overflow and underflow

Contextual Info: bôE J> m 4Û25771 GG13bai B34 « I D T CMOS PARALLEL 64 x 5-BIT FIFO WITH FLAGS IDT72413 INTEGRATED DEVICE FEATURES: DESCRIPTION: • • • The IDT72413 is a 64 x 5, high-speed First-In/First-Out FIFO that loads and empties data on a first-in-first-out basis.

Intel 8008

Abstract: design fire alarm 8088 microprocessor STR IC parallel bus arbitration RADIO SHACK PARTS CROSS REF intel 8218 76381 intel 8274 heurikon intel 8080 microprocessor
Contextual Info: The Multibus Design Guidebook W r it t e n f o r p r o fe s s io n a ls a n d s t u d e n t s a lik e , t h is v o lu m e c o n t a in s all th e in fo r m a t io n n e c e s sa ry t o e ffe c tiv e ly e v a lu a t e th e M u lt ib u s fa m ily : C o m p le te specifications fo r the M u ltib u s fam ily

Contextual Info: t— « CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Integrated Device Technology, Inc. IDT72401 IDT72402 IDT72403 IDT72404 Ol ru ru FEATURES: O utput E nable OE pin. T h e FIFO s a cce p t 4-b it or 5-bit data at th e data input (D o- d 3, 4). T h e stored data s ta ck up on a f irstin/first-ou t basis.

0x003FFFF

Contextual Info: ADSP-21061 SHARC Preliminary Data Sheet October 1996 For current information contact Anaiog Devices at 617 461-3881 SUMMARY • • • • • High-Performance Signal Computer for Speech, Sound, Graphics, and Imaging Applications Super Harvard ARchitechire Computer (SHARC) Four Independent Buses for Dual Data, Instructions, and I/O

Contextual Info: 10 31.75 PRODUCT OUT LINE 115.875 e-oo-e-o-e o-e-e o-o e-e-o o-o-e-o o-e oo-oo-e-o-e -ooooooooo ooooo OOOOOOOOOO o o o o o o o o o 00000 0000000000 o o o o o o o o o o o|o o o O O O O O O O O O O ooooooooo 00000000 o oo o oooo 90 0-0 0 0 0-0 0-0 0 NOTES: 0000

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT /¿PD42S16165L, 4216165L 3.3 V OPERATION 16M -B IT DYNAMIC RAM 1 M-WORD BY 16-BIT, EDO, BYTE READ/WRITE MODE, Description The ¿¡PD42S16165L, 4216165L are 1,048,576 w ords by 16 bits CMOS dynam ic RAMs with optional EDO.

ICS2116

Abstract: 3FC17 g179 ICS2116Y ICS2115 MIDI mpu-401 3FC18 MIDI WAVETABLE DSP
Contextual Info: ICS2116 Integrated Circuit Systems, Inc. WaveFront Interface General Description Features The ICS2116 is the interface component of the WaveFront wavetable synthesis chip set. The interface chip monitors and controls the activities of the 68ECOOO processor and 256K x 4