08056D226MAT2A Search Results

2N2007E

Abstract: 2N2007 CAP 10nF 50V 0603 18126D107MAT 597D108X06
Contextual Info: MIC5162 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination General Description Features The MIC5162 is a dual regulator controller designed for highspeed bus termination. It offers a simple, low-cost JEDEC compliant solution for terminating high-speed, lowvoltage digital buses i.e. DDR, DD2, DDR3, SCSI, GTL,

Contextual Info: LM10502 www.ti.com SNVS884B – AUGUST 2012 – REVISED MAY 2013 LM10502 Dual Buck + LDO Power Management Unit Check for Samples: LM10502 FEATURES DESCRIPTION • The LM10502 are advanced PMUs each containing two configurable, high-efficiency buck regulators for

DDR3 pcb layout guidelines

Abstract: MIC5162YMM DDR3 pcb layout CRCW06031K00FKTA C1608X5R0J106M C2012X5R0J226M GRM188R60J106ME47D GRM21BR60J226ME39L MIC5162 MSOP-10
Contextual Info: MIC5162 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination General Description Features The MIC5162 is a dual regulator controller designed for • Input voltage range: 1.35V to 6V high speed bus termination. It offers a simple, low-cost

Contextual Info: LM10504 Triple Buck + LDO Power Management Unit 1.0 General Description 4.0 Features The LM10504 is an advanced PMU containing three configurable, high-efficiency buck regulators for supplying variable voltages. The device is ideal for supporting ASIC and SOC

DDR3 pcb layout guidelines

Abstract: DDR3 pcb layout ddr3 termination 10x10.2 C1608X5R0J106M C2012X5R0J226M GRM188R60J106ME47D GRM21BR60J226ME39L MSOP-10 ddr3 layout
Contextual Info: MIC5165 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory Termination General Description Features The MIC5165 is a dual regulator controller designed • Input voltage range: 0.75V to 6V specifically for low-voltage memory termination • Up to 7A VTT Current

TCJB107M006R0070

Abstract: C1608X5R0J106M C2012X5R0J226M GRM188R60J106ME47D GRM21BR60J226ME39L MSOP-10 Mosfet selection 08056D226
Contextual Info: MIC5164 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination General Description Features The MIC5164 is a dual regulator controller designed for high speed bus termination. It offers a simple, low-cost JEDEC-compliant solution for terminating high-speed, lowvoltage digital buses i.e. DDR, DDR2, DDR3, SCSI, GTL,

Dale Resistor

Abstract: ceramic capacitor 1nF GRM188R60J106ME47D 06035A121JAT2A CRCW06031101FRT1 GRM21BR60J226ME39L MIC22950YML 10uF electrolitic 0603 capacitor MOSFET-SOT-236
Contextual Info: MIC22950YML Evaluation Board Integrated 10A Synchronous Buck Regulator General Description The Micrel MIC22950 is a high-efficiency, 10A integrated synchronous buck step-down regulator. The MIC22950 is optimized for highest power density and achieves over

Contextual Info: LM10506 www.ti.com SNVS729E – SEPTEMBER 2011 – REVISED MARCH 2013 LM10506 Triple Buck + LDO Power Management Unit Check for Samples: LM10506 FEATURES DESCRIPTION • The LM10506 is an advanced PMU containing three configurable, high-efficiency buck regulators for

Contextual Info: LM10504 www.ti.com SNVS739E – DECEMBER 2011 – REVISED MARCH 2013 LM10504 Triple Buck + LDO Power Management Unit Check for Samples: LM10504 FEATURES DESCRIPTION • The LM10504 is an advanced PMU containing three configurable, high-efficiency buck regulators for

GRM188R71H104KA930

Contextual Info: MIC23303 Evaluation Board 4MHz PWM 3A Buck Regulator with Hyper Light Load and Power Good General Description Getting Started This board allows the customer to evaluate the MIC23303, a fully integrated 3A, 4MHz switching regulator that features Hyper Light Load® mode, a Power

Contextual Info: LM10502, LM10602, LM10604 www.ti.com SNVS884 – AUGUST 2012 LM10502, LM10602, LM10604 Dual Buck + LDO Power Management Unit FEATURES KEY SPECIFICATIONS • • 1 2 • • Three Highly Efficient Programmable Buck Regulators – Integrated FETs with Low RDSON

Contextual Info: MIC5165 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory Termination General Description Features The MIC5165 is a dual regulator controller designed • Input voltage range: 0.75V to 6V specifically for low-voltage memory termination • Up to 7A VTT Current

Contextual Info: MIC5163 Dual Regulator Controller for DDR3 GDDR3/4/5 Memory Termination General Description Features The MIC5163 is a dual regulator controller designed • 0.75V to 6V input supply voltage specifically for low voltage memory termination • Memory termination for: DDR3, GDDR3/4/5

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

Contextual Info: LM10503 www.ti.com SNVS644A – DECEMBER 2011 – REVISED MARCH 2013 LM10503 Triple Buck Converter Energy Management Unit EMU with PowerWise 2.0 Adaptive Voltage Scaling (AVS) and ADC Check for Samples: LM10503 FEATURES DESCRIPTION • LM10503 is an advanced EMU containing three

Contextual Info: MIC5164YMM Evaluation Board Dual Regulator Controller for DDR3, GDDR3/4/5 Memory Termination Power Good Signal General Description The MIC5164 is a dual regulator controller for high speed bus termination that offers a simple, low-cost JEDECcompliant solution for terminating high-speed, low-voltage

Contextual Info: LM10504 www.ti.com SNVS739E – DECEMBER 2011 – REVISED MARCH 2013 LM10504 Triple Buck + LDO Power Management Unit Check for Samples: LM10504 FEATURES DESCRIPTION • The LM10504 is an advanced PMU containing three configurable, high-efficiency buck regulators for

Contextual Info: LM10502, LM10602, LM10604 www.ti.com SNVS884A – AUGUST 2012 – REVISED MARCH 2013 LM10502, LM10602, LM10604 Dual Buck + LDO Power Management Unit Check for Samples: LM10502, LM10602, LM10604 FEATURES DESCRIPTION • The LM10502, LM10602, LM10604 are advanced

CRCW080500R0F

Abstract: C06035C104KAT2A MIC61150YMME C06035
Contextual Info: MIC61150 Low Input Voltage, Single-Supply High-Current LDO General Description Features The Micrel MIC61150 is a 1.5A output, low input voltage, single-supply regulator. This regulator operates over a single input voltage range of 1.1V to 3.6V and offers an

0A10A

Contextual Info: LM10503 LM10503 Triple Buck Converter Energy Management Unit EMU with PowerWise 2.0 Adaptive Voltage Scaling (AVS) and ADC Literature Number: SNVS644 LM10503 Triple Buck Converter Energy Management Unit (EMU) with PowerWise® 2.0 Adaptive Voltage Scaling (AVS) and ADC

Contextual Info: Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LM10507 SNVS999 – MAY 2014 LM10507 Triple Buck + LDO Power Management Unit 1 Features • 1 • • • • • Three Highly Efficient Programmable Buck Regulators – Integrated FETs with Low RDS-ON

ZF15

Abstract: C2012X5R1C106M C06035 MIC61150YMME Linear Thermometer ic MSOP-10L MIC61150YML
Contextual Info: MIC61150 Low Input Voltage, Single-Supply High-Current LDO General Description Features The Micrel MIC61150 is a 1.5A output, low input voltage, single-supply regulator. This regulator operates over a single input voltage range of 1.1V to 3.6V and offers an

LM10506A

Abstract: tdk capacitors simple model
Contextual Info: LM10506 Triple Buck + LDO Power Management Unit 1.0 General Description 3.0 Features The LM10506 is an advanced PMU containing three configurable, high-efficiency buck regulators for supplying variable voltages. The device is ideal for supporting ASIC and SOC

devslp

Contextual Info: LM10504 www.ti.com SNVS739D – DECEMBER 2011 – REVISED NOVEMBER 2012 LM10504 Triple Buck + LDO Power Management Unit Check for Samples: LM10504 FEATURES 1 • 2 • • • • • Three Highly Efficient Programmable Buck Regulators – Integrated FETs with Low RDSON