00272B3 Search Results

Contextual Info: Bulletin 125175/B International S Rectifier ST223S SERIES Stud Version INVERTER GRADE THYRISTORS Features • All diffused design ■ Center amplifying gate ■ Guaranteed high dv/dt ■ Guaranteed high di/dt ■ High surge current capability ■ Low thermal impedance

RBS 2202

Abstract: BBS 2202 intel 80188 Lucent SLC 96 CI 4048 counter ami c21 SESCO MOTOROLA LSC SR12 SR14
Contextual Info: Preliminary Data Sheet June 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7230A Primary Access Framer/Controller Features • Framing formats — DS1 extended superframe ESF — DS1 superframe (SF): D4; SLC^-96; T1DM DDS; T 1DM DDS with FDL access

FA3903

Abstract: ESA/SCC 3901 A3901-2-1-22-HG draka fileca A3901-2-2-26-G A3901 DRAKA A3901-2-2-18-G A3901-1-1-28 A3901-1-3-16-HG
Contextual Info: Fiches série 4 14/12/00 17:00 Page 5 Wires and cables for space and sattelites 4 Insulated space wires for wrapped connections according to SCC 3903 FA3903 series Draka - Fileca is the only firm in the world qualified by the CNES French National Space Agency and ESA (European Space Agency) for the

ESA/SCC 3901

Abstract: FA3901 A3901-2-1-26HG-B1 draka b1 DRAKA 3901/002/56B A3901-2-1-22-HG 3901-002 fileca
Contextual Info: Fichessérie429/12/0010:45Page3 Wires and cables for space and sattelites 4 Light weight space wires and cables according to SCC 3901-002 norm FA3901 series Single core 1 2 3 Multi cores jacketed 1 2 3 5 1 2 3 4 5 6 1 2 3 4 5 7 Single core shielded jacketed

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Contextual Info: CMOS SUPERSYNC FIFO 16,384 x 9, 32,768 x 9 IDT72261 IDT72271 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • • • The IDT72261/72271 are monolithic, CMOS, high capac­ ity, high speed, low power first-in, first-out FIFO memories

Contextual Info: S i GEC PLESSEY S I M I O >N I li ( I O It S SP5026 1.0 GHz 3-WIRE BUS CONTROLLED SYNTHESISER (Supersedes September 1992 edition) The SP5026 is a programming variant of the SP5510, allowing the design of one tuner with either l2C bus or 3-wlre bus format depending on which device is inserted. The