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EPM7160

Abstract: EPM7160 PLCC CN-TC01 H6062
Contextual Info: ALTERA CORP bfiE D • 05^5375 G003253 013 H A L T EPM7160 EPLD Features ^ □ □ □ □ □ High-density, erasable CMOS EPLD based on second-generation MAX architecture 3,200 usable gates Combinatorial speeds with tPD = 12 ns Counter frequencies up to 90.9 MHz