0 - 9 COUNTER Search Results

MO-211

Contextual Info: R E V LTR c y i\ 0 • 1 7 00.15 NOTE 3 (1 TYP 1 S 1O N S DESCRIPTION A RELEASE B UPDATE BUMPS TO DOCUMENT CONTROL L O C A T I ON . E.C.N. DATE 12360 1 1 / 2 9 / 1 9 9 9 MS/NK BY/APP'D 12447 0 4 / 0 3 / 2 0 0 0 MS/NK S Y MM Ç. - 9 - LAND PATTERN RECOMENDATION

dual decade counter SN74490

Abstract: counter 74490 74490 counter SN 74490 sn5449 SN74LS90 Decade Counter texas instruments LS490 SN5490A SN7490 SN54LS90
Contextual Info: TYPES SN54490, SN54LS490, SN74490, SN74LS490 DUAL 4 -BIT DECADE COUNTERS OCTOBER 1 9 7 6 —R E V IS E D D E C E M B E R 1983 S N 5 4 4 9 0 ,S N 6 4 t S 4 9 0 I OR W PACKAGE S N 7 4 4 3 0 . . . J OR N PACKAGE S N 7 4 L S 4 9 0 . . . D . J OR N PACKAGE Dual Versions o f Popular SN5490A, SN54LS90,

Contextual Info: 1,048,576 W 0 R D S X 9 BIT DYNAM IC RAM PRELIMINARY MODULE DESCRIPTION The T H M 9 1 0 0 0 B S /B S G /B L is a 1,048,576 words by 9 bits dynam ic RAM m odule which assem bled 9 pcs of TC 511000B J on the printed circuit board. The THM 91000BS / BSG / BL is optim ized for

GM71C4100BJ

Contextual Info: Rev. 0. GMM784000BS-60/70/80 GoldStar 4 .1 9 4 .3 0 4 W O R D S x 8 BIT GMM794000BS-60/70/80 GOLDSTAR ELECTRON CO., LTD. 4 .1 9 4 .3 0 4 W O R D S x 9 BIT CMOS DYNAMIC RAM MODULE Description Features T h e G M M 78 9|4000B S is 4M x 8(9 D y n a m ic RAM M O D U L E o rg a n iz e d a s 4 ,1 9 4 ,3 0 4 x 8 (9 ) b its a n d

tms34061fnl

Abstract: TMS34070NL TMS34061FN TMS34061 TMS4464 TMS34010 SPVU001 Texas Instruments 34010 TMS34070 TMS4461
Contextual Info: TMS34010 GRAPHICS SYSTEM PROCESSOR o I^ o 004773 JA N U A R Y 1 9 8 6 - REVISED JULY 1 9 8 7 FN PACKAGE Instruction Cycle Time: - 16 0 ns . . . T M S 34 01 0-50 - 2 0 0 ns . . . (T M S 3 4 01 0-40) (TOP VIEW ) I il i l 9 Pixel Processing, XY Addressing, and

0316169CT3D

Abstract: 0316809CT3D cb 10 b 60 kd
Contextual Info: I = = = = = = — = *= IB M 0 3 1 6 4 0 9 C P r e l i m i n a r y 1 M x 1 6 , -80; - 3 6 0 IB M 0 3 1 6 8 0 9 C IB M 0 3 1 6 1 6 9 C IB M 0 3 1 6 4 B 9 C 16M b S y n c h r o n o u s D R A M -D ie Revision D Features • Multiple Burst Read with Single Write Option

CA339

Abstract: CA139 CA139A CA239 CA239A CA339A DD321 LM339 LM339A industrial pulse generators schematic
Contextual Info: HARRIS SEMICOND SECTOR MGE J> 4 3 0 2 2 7 1 0 0 3 2 1 0 5 S O H A S C A f 3 9 , C A 13 9A , C A 23 9, C A 239A , C A 3 3 9 , C A 339A , L M 3 3 9 *, L M 3 3 9 A * HARRIS 1" - 7 3 - S 3 Features D escription • Operation from Single or Dual Supplies The CA139, CA239, CA339, CA139A, CA239A, and

Contextual Info: SN54290, SNS4293, SN54LS290, SN54LS293, SN74290, SN74293, SN74LS290, SN74LS293 DECADE AND 4-BIT BINARY COUNTERS _ '2 9 0 , 'L S 2 9 0 . . . D E C A D E C O U N T E R S '2 9 3 , 'L S 2 9 3 . . . 4 -B IT B IN A R Y C O U N T E R S MARCH 1974 - REVISED MARCH 198B

CHN 920

Abstract: chn 924 chn 923 CHN 936 CHN 943 CHN 950 CHN 932 chn 947 sport syscon
Contextual Info:  6 5,$/32576 Figure 9-0. Table 9-0. Listing 9-0. The processor has two independent, synchronous serial ports, SPORT0 and SPORT1, that provide an I/O interface to peripheral devices. Each serial port has a set of control registers and data buffers. With a range

kyx 28

Abstract: 74148 9900A 9900 Panel SBP9900A-1 DEC memory catalogue IC2 Bus Addresses 007C ic 74148 INJECTOR
Contextual Info: SBP 9900A-1 1. INTRODUCTION 1.1 D E S C R IP T IO N Th e SBP 9 9 0 0 A microprocessor is a ruggedized m ono lith ic C entral Processing U n it <CPU fabricated w ith Integrated In jection Logic |2|_ ) technology. Th e SBP 9 9 0 0 A combines th e properties o f l 2 L technology w ith a 16-b it word

SN74ACT2155

Abstract: 525VS
Contextual Info: SN74ACT2156 16K x 4 BURST CACHE ADDRESS COMPARATOR/DATA RAM 3 4 1 2 .A P R I L 1 9 9 0 - R E V I S E D J U N E 1 9 9 0 * * Vcc Vcc Dirty Bit Storage Capability for Use in Copy-Back Caches

Contextual Info: SN54LS490, SN74LS490 DUAL 4-BIT DECADE COUNTERS OCTOBER 1 9 7 6 - REVISED M AR C H 1 9 8 8 S N 5 4 L S 4 9 0 . . . J OR W P AC K A G E S N 7 4 L S 4 9 0 . . . D . J O R N PAC KA G E Dual Versions of Popular SN54LS90 and SN74LS90 Counters TO P V IE W Dual Counters Can Significantly Improve

27l2c

Abstract: 27L2AC 27L2I 27L2AI 27L2BC 27l2bi 27L7C 27L2A TLC 1050 27L2B
Contextual Info: TLC27L2, TLC27L2A, TLC27L2B, TLC27L7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS D 3 1 3 9 , O C T O B E R 1 9 8 7 - R E V IS E D O C T O B E R 1 9 9 0 D. JG , OR P PACKAGE Trimmed O ffset Voltage: T L C 27L 7 . . . 5 0 0 aiV M ax at 2 5 °C , V DD -

Contextual Info: CATALOG a Honeywe II FED. MFG. CODE SWITCH-ENCLOSED Division L I S T I NG BFL1-AW1 91929 1 / 2 - 1 4 NPT THREAD LL ÛQ G AS K E T TYPE S EA L BETWEEf COVER AND HOUSI NG 2 . 5 9 5± . 0 I 0 2X 0 . 1 8 2 THRU WI T H 0 . 2 9 X . 3 0 DEEP COUNTERBORE BOTH S I D E S

74ALS223

Abstract: 74ALS22
Contextual Info: S N 74 A LS 2 2 3 3 64 x 9 AS Y N C H R O N O U S FIRST-IN FIRST-O UT M EM O R Y D 3 0 9 2 . FEBRUARY 1 9 8 8 - R E V IS E D APRIL 1 9 8 8 • Independent Asynchronous Inputs and Outputs • 6 4 Words by 9 Bits • Data Rates from 0 to 4 0 MHz DO C 2 27 II q o

Contextual Info: 23 22 21 20 19 18 17 16 15 14 13 12 I 8 7 3 DRAWING NUMBER 2 H5 9 0 I 3 1 REVI SI ON H2 SHEET APPROVAL LEV EL l / l DRAWING TERM I N A L - F E M A L E PER F CI C l 5 0 0 4 - C U S T CHRYSLER 0 4 6 8 7 8 1 9 I NSULATOR-FEMALE F CI 5 4 2 0 0 4 4 5 (CHRYSLER 0 4 6 8 7 8 0 9 )

M50957-XXXSPs

Abstract: 50958-XXXSP
Contextual Info: M IT S U B IS H I M ICRO CO M PUTERS M 5 0 9 5 7 -X X X S P /F P ,M 5 0 9 5 8 -X X X S P /F P preliminary :"»««-*^ M 5 0 9 5 9 -X X X S P /F P mm N otice These are noi a final specification. Some param etric lim its art? subject to change. DESCRIPTION

7400A

Abstract: S889A
Contextual Info: TMS416400A, TMS417400A T M S 4 2 6 4 0 0 A , TMS 4 26 4 00 A P, T M S 4 2 7 4 0 0 A , T M S 4 2 7 4 0 0 A P 4 1 9 4 3 Q 4- W O RD BY 4-BI T H I G H - S P E E D D R A M S SMKS889A-AUGUST 1 9 9 6 -REVISED FEBRUARY 1997 This data sheet is applicable to all TMS41x400As

PEEL22CV10P

Abstract: ict PEEL22cv10p
Contextual Info: INTERNATIONAL C M O S 9: 3 7E 4 0 * 4 0 70 7 D 0Q003bb Product Previev; INTERNATIONAL CMOS TECHNOLOGY, INC. T ^ 6 - Í 9 0 / PEELLm 22CV1 0-12/PEE1T22CV10=15 CMOS Programmable Electrically Erasabi Logic Device Features Architectural Flexibility — 132 product term x 44 input AND array

NS16C450N

Contextual Info: TL16C450 ASYNCHRONOUS COMMUNICATIONS ELEM ENT 0 3 0 9 6 , M A R C H 1 9 8 8 - R E V IS E O A P R IL 1 9 8 9 N DUAL-IN-LINE PACKAGE • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to 216 - 1 and Generates an Internal 16 X

Alla

Abstract: 74AC11191
Contextual Info: 54AC11191, 74AC11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS T I0 1 5 1 — 0 3 4 2 6 , M A R C H 1 9 9 0 54AC11191 . . . J PACKAGE 74AC11191 . . . DW OR N PACKAGE • Single Down/Up Count Control Line • Look-Ahead Circuitry Enhances Speed of Cascaded Counters

THM92500AS80

Abstract: TC514256Aj THM92500AS
Contextual Info: T H M 9 2 5 0 0 A S - 7 0 , 80, 262,144 WORDS x 9 BIT DYNAMIC RAH MODULE ' d e s c r ip t io n The 7KM92500AS is a 262,144 words by 9 bits dynamic RAM module which assembled 2 pcs of TC514256AJ and 1 pcs of TMM51256T on the printed circuit board. The THM92500AS is optimized for application to the systems which are required high

am7969-125dc

Contextual Info: , 21 n o 'i * 2 Preliminary a A m 7 9 h 1 0 6 8 /A m 7 9 h 1 0 6 9 -1 2 5 FOXIchip Set Fiber Optic Xmitter - Receiver interface with TAXI™ Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Complete ‘Byte-to-Light™’ solution for fiber optic links

LG color tv Circuit Diagram schematics

Abstract: sangamo capacitor beckman helipot potentiometer 2N3055 RCA BECKMAN helipot rca transistor 2n3773 rca allen bradley potentiometer type j TL SL 100B npn transistor MC14001CP
Contextual Info: INSTRUCTION MANUAL FOR ATR POWER SUPPLY MODEL SERIAL NO. 201 9 2 2 -9 3 0 0 ELECTRONIC MEASUREMENTS INC 4 0 5 ESSEX ROAD, NEPTUNE, N.J. 07753 /? * ELECTRONIC I I I 1MEASU REMENTS ^-^INC. MANUFACTURER’S PRODUCT DECLARATION INTENDED P U R P O S E (I I.^ F i