"27 MHZ" DRIVER Search Results

CY2SSTV857ZI-27

Abstract: DDR 333 CDC857-2 CY2SSTV857-27 CY2SSTV857ZC-27 CY2SSTV857ZC-27T CY2SSTV857ZI-27T Y5346
Contextual Info: CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant Features Description • Operating frequency: 60 MHz to 200 MHz The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27

CY2SSTV857ZI-27

Abstract: CDC857-2 CY2SSTV857-27 CY2SSTV857ZC-27 CY2SSTV857ZC-27T CY2SSTV857ZI-27T
Contextual Info: CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant Features Description • Operating frequency: 60 MHz to 200 MHz The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27

CY2SSTV857ZI-27

Contextual Info: CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant Features Description • Operating frequency: 60 MHz to 200 MHz The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27

CY2SSTV857ZI-27

Contextual Info: CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant Features Description • Operating frequency: 60 MHz to 200 MHz The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27

PC2700-Compliant

Abstract: CDC857-2 CY2SSTV857 CY2SSTV857-27 CY2SSTV857ZC-27 CY2SSTV857ZC-27T CY2SSTV857ZI-27 CY2SSTV857ZI-27T DDR333 production drawing Y5346
Contextual Info: CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant Features Description • Operating frequency: 60 MHz to 200 MHz The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27

CDC857-2

Abstract: CY2SSTV857-27 CY2SSTV857ZC-27 CY2SSTV857ZC-27T CY2SSTV857ZI-27 CY2SSTV857ZI-27T CY2SSTV857ZXC-27
Contextual Info: CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant Features Description • Operating frequency: 60 MHz to 200 MHz The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27

CDC857-2

Abstract: CY2SSTV857-27 CY2SSTV857ZC-27 CY2SSTV857ZC-27T CY2SSTV857ZI-27 CY2SSTV857ZI-27T
Contextual Info: CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC2700-Compliant Features Description • Operating frequency: 60 MHz to 200 MHz The CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in high-speed applications. The CY2SSTV857-27

MEMS varactor diode

Abstract: TH7122 LQFP32 block diagram of RFID Garage Door Openers fsk demodulator khz TPMS transceiver
Contextual Info: Automotive ICs TH7122 27 to 930MHz Transceiver IR Temperature 315 MHz, 433 MHz, 868 MHz or 915 MHz fixed settings in stand-alone mode Extended frequency range with external VCO varactor diode: 27 MHz to 930 MHz Frequency range: 300 MHz to 930 MHz in programmable user mode

Contextual Info: LMH2190 LMH2190 Quad Channel 27 MHz Clock Tree Driver with I 2 C Interface Literature Number: SNAS473G LMH2190 Quad Channel 27 MHz Clock Tree Driver with I2C Interface General Description Features The LMH2190 is a quad channel configurable clock tree driver

marking 3 pin A1p

Contextual Info: SN65LVDS822 www.ti.com SLLSEE8 – SEPTEMBER 2013 FLATLINK LVDS RECEIVER Check for Samples: SN65LVDS822 FEATURES 1 • • • • • 4:27 LVDS-to-CMOS Deserializer Pixel Clock Range of 4 MHz to 54 MHz, for Resolutions of 160x120 to 1024x600 Special 2:27 Mode With 14x Sampling Allows

Contextual Info: SN65LVDS822 www.ti.com SLLSEE8 – SEPTEMBER 2013 FLATLINK LVDS RECEIVER Check for Samples: SN65LVDS822 FEATURES 1 • • • • • 4:27 LVDS-to-CMOS Deserializer Pixel Clock Range of 4 MHz to 54 MHz, for Resolutions of 160x120 to 1024x600 Special 2:27 Mode With 14x Sampling Allows

Contextual Info: DIP Type Common Mode for Telephone Sets Noise Filters for Telephone Sets LFT, HFT, SZ-03 [RoHS [RoHS Compliant] Compliant] Impedance or Rated voltage Rated current attenuation DC V (mA) (k⏲) min. 27 (15 dB) (at 0.5 MHz) 50 100 27 (at 0.5 MHz) 50 100 2.6 (15 dB) (at 7MHz)

SZ-03

Contextual Info: DIP Type Common Mode For telephone sets EMI/EMC Filters for Telephone Sets LFT, HFT, SZ-03 Impedance or Rated voltage Rated current attenuation DC (V) (mA) (k⏲) min. 27 (15 dB) (at 0.5 MHz) 50 100 27 (at 0.5 MHz) 50 100 2.6 (15 dB) (at 7MHz) 50 100 Frequency range

Contextual Info: DIP Type Common Mode for Telephone Sets Noise Filters for Telephone Sets LFT, HFT, SZ-03 [RoHS [RoHS Compliant] Compliant] Impedance or Rated voltage Rated current attenuation DC V (mA) (k⏲) min. 27 (15 dB) (at 0.5 MHz) 50 100 27 (at 0.5 MHz) 50 100 2.6 (15 dB) (at 7MHz)

SKY65112-84LF

Contextual Info: PRELIMINARY DATA SHEET SKY65112-84LF: Linear Power Amplifier Driver, 0.5 W 400–2300 MHz Features ● ● ● ● ● Functional Block Diagram Wideband: 400–2300 MHz High linearity: OIP3 > 39 dBm; P1 dB > 27 dBm @ 940 MHz High gain > 18 dB Single DC supply: 5 V

Contextual Info: CY2SSTV857-27 Differential Clock Buffer/Driver DDR333/PC27000-Compliant Features Description • Operating frequency: 60 MHz to 200 MHz The CY2SSTV857 is a high-performance, low-skew, low-jitter zero-delay buffer designed to distribute differential clocks in

Contextual Info: Wideband Quadrature Modulator with Integrated Fractional-N PLL and VCOs ADRF6720-27 Data Sheet FEATURES GENERAL DESCRIPTION I/Q modulator with integrated fractional-N PLL RF output frequency range: 400 MHz to 3000 MHz Internal LO frequency range: 356.25 MHz to 2855 MHz

Contextual Info: Wideband Quadrature Modulator with Integrated Fractional-N PLL and VCOs ADRF6720-27 Data Sheet FEATURES GENERAL DESCRIPTION I/Q modulator with integrated fractional-N PLL RF output frequency range: 400 MHz to 3000 MHz Internal LO frequency range: 356.25 MHz to 2855 MHz

Contextual Info: ICS9112-27 Low Skew PCI / PCI-X Buffer General Description Features The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at speeds from 0 to 140 MHz.

Contextual Info: ICS9112-27 Low Skew PCI / PCI-X Buffer General Description Features The ICS9112-27 is a high performance, low skew, low jitter PCI / PCI-X clock driver. It is designed to distribute high speed signals in PCI / PCI-X applications operating at speeds from 0 to 140 MHz.

27m21

Abstract: CY28517 VSS100 DB-25M RoHS VSS-100
Contextual Info: CY28517 PCI Express Clock Generator Features • Four 100 MHz differential clocks ■ 48 MHz clock ■ Two 25 MHz clocks ■ 27 MHz Reference Clock ■ OE control per clock output ■ ■ Selectable, Triangle, and Lexmark profiles ■ SMbus support with readback capabilities

BT135

Abstract: 74*175 244M 267M GS4900B GS4901B smpte 274m
Contextual Info: GS4901B/GS4900B SD Clock and Timing Generator with GENLOCK Key Features Description Video Clock Synthesis • • • • • Pre-programmed for 4 video clock periods 14.32 MHz, 27 MHz, 36 MHz, and 54 MHz Accuracy of free-running clock frequency limited only by

CAMD6254

Abstract: "30 mhz" driver Amplifier
Contextual Info: MODEL NUMBER CAMD6254 30 MHz RF Driver Amplifier FEATURES • 27-33 MHz • SMA Connectors • 41 dB Gain • +34 dBm PldB • 3 dB Typical Noise Figure AMP DAICO 22 Industries 310.507.3242 • FAX 310.507.5701 • www.daico.com

Contextual Info: GS4901B/GS4900B SD Clock and Timing Generator with GENLOCK GS4901B/GS4900B Data Sheet Key Features Video Clock Synthesis • • • • • Pre-programmed for 4 video clock periods 14.32 MHz, 27 MHz, 36 MHz, and 54 MHz Accuracy of free-running clock frequency limited only by