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S3C49C9

Abstract: ARM7TM samsung ISO 7816 Programmable Interval Timer program for random number generator
Text: (conforms to ISO standard 7816) S3C49C9 Block Diagram Memory Protection Unit RAM 4K- Byte EEPROM 32K- Byte ARM7TM 32-bit RISC CPU ROM 96K-Byte AMBA Bus 16-Bit Watchdog Timer 2 I/O


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PDF S3C49C9) S3C49C9 32-bit 16/32-bit 16-Bit 200uA ARM7TM samsung ISO 7816 Programmable Interval Timer program for random number generator
2004 - Not Available

Abstract: No abstract text available
Text: SPC10096B One Channel Sound Controller with 96K-byte ROM Preliminary MAY. 27, 2004 Version , Preliminary Version: 0.1 Preliminary SPC10096B ONE CHANNEL SOUND CONTROLLER WITH 96K-BYTE ROM 1 , -bit microprocessor synthesizer, equips an 8-bit CMOS microprocessor, and 96K-byte 96K bytes ROM Working ROM, 64- byte working SRAM. 64- byte working SRAM Other primary features include two 8-bit Timer , ER s N lu I p M n T u R S A P r o F The SPC10096B provides a 96K-byte ROM that can be


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PDF SPC10096B 96K-byte
Not Available

Abstract: No abstract text available
Text: onchip caches: - 8K- byte , direct-mapped, LI instruction cache - 8K- byte , dual-ported, direct-mapped, w rite -th ro ug h LI d a t a cache - 96K-byte , 3-way, set-associative, write-back L2 d a ta and instruction cache · Supports optional board-level L3 cache ra n g ing from 1M byte to 64M bytes The 21164 , and supports longword (32-bit) and quadword (64-bit) integers. Provides byte (8-bit) and word (16


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PDF 64-bit 266-MHz 300-MHz 128-bit) 50-/wm 96K-byte, 32-bit) 64-bit)
Not Available

Abstract: No abstract text available
Text: instruction cache - 8K- byte , dual-ported, dire t-mapped, write-through LI data cache - 96K-byte , 3 , byte to 64M bytes The 21164 microprocessor implements IEEE S floating and T_floating, and VAX FJloating and G_floating data types and supports longword (32-bit) and quadword (64-bit) integers. Provides byte


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PDF 64-bit 266-MHz 300-MHz 128-bit) 50-/im 96K-byte, 32-bit) 64-bit)
1995 - 28f400 BYTE PROGRAM

Abstract: 28F800T intel 28f800 intel 28F400 1024Kx8 intel DOC AB-60 28F800 28F400 28F008SA
Text: 12 A 13 A 14 A 15 A 16 RP# WE# A8 A9 A 10 A 11 A 12 A 13 A 14 A 15 A 16 BYTE # GND DQ 15 /A -1 DQ 7 DQ 14 DQ 6 DQ 13 DQ 5 DQ 12 DQ 4 V CC BYTE # GND DQ 15 /A -1 DQ 7 DQ 14 DQ 6 DQ 13 DQ 5 DQ 12 DQ 4 V CC BYTE # GND DQ 15 /A -1 DQ 7 DQ 14 DQ 6 DQ 13 DQ , 28F200 Boot Block 48-Lead TSOP 12 mm x 20 mm TOP VIEW 28F800 A16 A16 A16 BYTE # GND DQ15 /A -1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ 4 BYTE # GND DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5


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PDF AB-60 28F800 28F008, 28f400 BYTE PROGRAM 28F800T intel 28f800 intel 28F400 1024Kx8 intel DOC AB-60 28F400 28F008SA
1999 - LT1001

Abstract: LTC1599 LT1236A_10
Text: WR 12 MLBYTE 13 MSB ENABLE BYTE ENABLE LOGIC EN D15 (MSB) D14 D13 D12 D11 ··· DAC REGISTER INPUT REGISTER MSB BYTE EN D0 (LSB) RST INPUT REGISTER LSB BYTE


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PDF LTC1599 LTC1599 LT1001 16-BIT ERA82 sn1590 LT1001 LT1236A_10
2004 - Not Available

Abstract: No abstract text available
Text: SPC11096A One Channel Sound Controller with 96K-byte ROM Preliminary MAY. 24, 2004 Version , Preliminary Version: 0.2 Preliminary SPC11096A ONE CHANNEL SOUND CONTROLLER WITH 96K-BYTE ROM 1 , -bit microprocessor synthesizer, equips an 8-bit CMOS microprocessor, and 96K-byte 96K bytes ROM Working ROM, 128- byte working SRAM. 128- byte working SRAM Other primary features include two 8-bit Timer , u R S A P r o F User's Program & Data Area The SPC11096A provides a 96K-byte ROM that can


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PDF SPC11096A 96K-byte
GPC11096A

Abstract: 00FF GPC11096
Text: GPC11096A Sound Controller with 96K-byte ROM May 19, 2008 Version 1.3 GENERALPLUS , GPC11096A SOUND CONTROLLER WITH 96K-BYTE ROM 1. GENERAL DESCRIPTION 3. FEATURES The GPC11096A, a speech/wavetable synthesizer, equips an 8-bit 8-bit microprocessor CMOS microprocessor, and 96K-byte Working ROM, 128- byte 96K bytes ROM working SRAM. 128- byte working SRAM Other primary features , The GPC11096A provides a 96K-byte ROM that can be defined as the program area, audio data area, or


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PDF GPC11096A 96K-byte GPC11096A SPC11096A 00FF GPC11096
2004 - Not Available

Abstract: No abstract text available
Text: SPC10096A One Channel Sound Controller with 96K-byte ROM Preliminary MAY. 29, 2004 Version , Preliminary Version: 0.1 Preliminary SPC10096A ONE CHANNEL SOUND CONTROLLER WITH 96K-BYTE ROM 1 , -bit microprocessor synthesizer, equips an 8-bit CMOS microprocessor, and 96K-byte 96K bytes ROM Working ROM, 128- byte working SRAM. 128- byte working SRAM Other primary features include two 8-bit Timer , User's Program & Data Area The SPC10096A provides a 96K-byte ROM that can be defined as the program


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PDF SPC10096A 96K-byte
2008 - S1C17

Abstract: epson superflash 2008 Epson SuperFlash TQFP15-128
Text: operation) 128K/ 96K-Byte Flash ROM and 4K + 2K- Byte RAM (2K- byte RAM is operable with separated power , consists of a S1C17 16-bit compact RISC CPU Core, a 128K- or 96K-byte Flash EEPROM, a 4K- byte RAM, a 2K- byte , TQFP14-100pin S1C17501F02 128K bytes 4K + 2K* bytes TQFP15-128pin The 2K- byte RAM is configurable as , data bus, and four chip enable signals to support a maximum of 15M- byte external memory space , ) mode. Supports auto negotiation function. Scratch and variable bulk end point size Embedded 1K- byte


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PDF S1C17501 16-bit S1C17 128K/96K-Byte 10-bit S1C17501 S1C17 epson superflash 2008 Epson SuperFlash TQFP15-128
fc4k

Abstract: CI 4016 refresh logic u107 16-Bit Microcomputers AP-28A CD 4016 PIN DIAGRAM Z8000 AD17 AD10
Text: or 128K- byte configuration, no jumper-straps are necessary. When the 96K-byte configuration is , .3-5 Inhibit Signal.3-6 Byte Parity.3-6 Clock Source.3-6 4 , 1.4-13 TABLES 1-1. Am96/1000 Series RAM Model s.1-1 1-2. RAM Data Used for Byte , storage, the Am96/1000 Series provides dual-port memory accessing, optional byte parity, and an interrupt , bytes 128K bytes On-board jumpers enable placement on any 4K- byte address boundary within the 1


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PDF Am96/1000 MK/12Ã AMC-722 fc4k CI 4016 refresh logic u107 16-Bit Microcomputers AP-28A CD 4016 PIN DIAGRAM Z8000 AD17 AD10
Not Available

Abstract: No abstract text available
Text: BYTE # GND « V A ., DQ 7 DQU dq6 DQ 1 3 DQ s DQ iz DQ4 Vcc 2154-03 A7 Ae *5 A* A 3 a 2 A, A0 , 1.110" TOP VIEW Z3 A , 3 A >! a a ,3 3 * ,* 3 A, 5 3 A ,9 3 BYTE # 3 GND D O Q s /A, 3DQ7 3DQ1 4 = )DQe 3 DQ ,3 3DQ5 3 D Q ,j Z3DQ 4 Vcc RP# WE# Ag Ag A 10 A 11 A 12 A1 3 A 14 A is A1 S BYTE , # RP# Vpp WP# NC NC NC 1 28F400 -L- - r "'~" L "' _ c_ 1 28F800 a 16 BYTE # GND DQl5/A , Block 48-Lead TSOP 12 mm x 20 mm TOP VIEW ? 48 -3. A 1 6 1 BYTE # 47 3 1 GND 46 3 t 45 3DQl5


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PDF AB-60 AB-60 48-Lead 28F800 28F008
1996 - 28f800b5

Abstract: 28F002BC 28F008 28F200B5 28F800 AB-60 ab-65 28f400
Text: A 16 BYTE # GND DQ 15 /A -1 DQ 7 DQ 14 DQ 6 DQ 13 DQ 5 DQ 12 DQ 4 V CC BYTE # GND DQ 15 /A -1 DQ 7 DQ 14 DQ 6 DQ 13 DQ 5 DQ 12 DQ 4 V CC BYTE # GND DQ 15 /A -1 DQ 7 DQ 14 , 48-Lead TSOP 12 mm x 20 mm TOP VIEW 28F800 A 16 A 16 A 16 BYTE # GND DQ15 /A -1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 BYTE # GND DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ 4 BYTE # GND DQ15 /A -1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 OE# GND CE# OE# GND CE# OE


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PDF AB-60 AP-611 AB-65 28f800b5 28F002BC 28F008 28F200B5 28F800 AB-60 28f400
Not Available

Abstract: No abstract text available
Text: Architecture - Two 8K- Byte Parameter Blocks - One 96K-Byte Main Block - Seven 128K- Byte Main Blocks - One 16K- Byte , Two 8K- byte parameter blocks One 96K-byte main block Seven 128K- byte main blocks The device can be , 20000h IFFFFh OOOOOh 16K- Byte Boot Stock 8K- Byte Parameter Block 8K- Byte Parameter Block 96K-Byte Main , 96K-Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 126K- Byte Main , Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 96K-Byte Main


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PDF TMS28F008Axy TMS28F800Axy 8-B1T/524 16-BIT SMJS851 96K-Byte 128K-Byte 16K-Byte 28F008Axy70 28F008Axy80
Not Available

Abstract: No abstract text available
Text: Two 8K- Byte Parameter Blocks - One 96K-Byte Main Block - Seven 128K- Byte Main Blocks - One 16K- Byte , blocks, one 96K-byte main block, and seven 128K- byte main blocks. The device can be ordered in two , Block 96K-Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main , 16K- Byte Boot Block 8K- Byte Parameter Block 8K- Byte Parameter Block 96K-Byte Main Block 128K- Byte Main , Block 96K-Byte Main Block 8K- Byte Parameter Block 8K- Byte Parameter Block 16K- Byte Boot Block r i i I


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PDF TMS28F008Axy TMS28F800Axy SMJS851 96K-Byte 128K-Byte 16K-Byte 44-Pin 40-Pin 48-Pin 48-Ball
2003 - Not Available

Abstract: No abstract text available
Text: M30291FAHP M30291FCHP M30290M6-XXXHP M30290M8-XXXHP M30290MA-XXXHP M30291M6-XXXHP ROM capacity 64K + 4K byte 96K + 4K byte 128K + 4K byte 64K + 4K byte 96K + 4K byte 128K + 4K byte 48K byte 64K byte 96K byte 48K byte 64K byte 96K byte RAM capacity 4K byte 8K byte 12K byte 4K byte 8K byte 12K byte 4K byte 4K byte 8K byte 4K byte 4K byte 8K byte As of October 2003 Package type Remarks 80P6Q-A Flash ROM Version , * : under development ROM capacity 64K + 4K byte 96K + 4K byte 128K + 4K byte 64K + 4K byte 96K + 4K byte


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PDF M16C/29 16-BIT REJ03B0072-0010Z M16C/60 64-pin 80-pin
gpc10096a

Abstract: GPC10 00FF GPC10096
Text: GPC10096A SOUND CONTROLLER WITH 96K-BYTE ROM 1. GENERAL DESCRIPTION 3. FEATURES The GPC10096A, a speech/wavetable synthesizer, equips an 8-bit 8-bit microprocessor CMOS microprocessor, and 96K-byte Working ROM, 128- byte 96K bytes ROM working SRAM. Other primary features include two 8-bit 128- byte , Area User's Program & Data Area The GPC10096A provides a 96K-byte ROM that can be defined as the


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PDF GPC10096A GPC10096A SPC10096A GPC10 00FF GPC10096
1994 - TMS28F400BZB

Abstract: TMS28F400BZT
Text: 16 Bits Array-Blocking Architecture ­ Two 8K- Byte Parameter Blocks ­ One 96K-Byte Main Block ­ Three 128K- Byte Main Blocks ­ One 16K- Byte Protected Boot Block ­ Top or Bottom Boot Locations All , architecture consisting of one 16K- byte protected boot block, two 8K- byte parameter blocks, one 96K-byte main , Block 8K- Byte 8K- Byte Parameter Parameter Block Block 96K-Byte Main Block 128K- Byte 128K- Byte , Dissipation ( VCC = 5.5 V ) ­ Active Write . . . 330 mW ( Byte Write) ­ Active Read . . . 330 mW ( Byte Read


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PDF TMS28F400BZT, TMS28F400BZB 8-BIT/262144 16-BIT SMJS400E 96K-Byte 128K-Byte 16K-Byte 28F400BZx80 28F400BZx90 TMS28F400BZB TMS28F400BZT
1994 - Not Available

Abstract: No abstract text available
Text: ˆ’ Two 8K- Byte Parameter Blocks − One 96K-Byte Main Block − Three 128K- Byte Main Blocks − One 16K- Byte Protected Boot Block − Top or Bottom Boot Locations All Inputs / Outputs TTL Compatible , boot block, two 8K- byte parameter blocks, one 96K-byte main block, and three 128K- byte main blocks , Boot Block 8K- Byte 8K- Byte Parameter Parameter Block Block 96K-Byte Main Block 128K- Byte , ( VCC = 5.5 V ) − Active Write . . . 330 mW ( Byte Write) − Active Read . . . 330 mW ( Byte Read


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PDF TMS28F400BZT, TMS28F400BZB BIT/262144 SMJS400E 96K-Byte 128K-Byte 16K-Byte 28F400BZx80 28F400BZx90
2003 - 30281FA

Abstract: M30281FATHP 032716 30281f CRC-16 20MHZ 16MHZ 10MHZ marking code P73 marking code P72
Text: . Table 1.4.1. Product List (1) -Normal-ver. Type No. ROM capacity M30280F6HP (D) 48K + 4K byte M30280F8HP (D) 64K + 4K byte M30280FAHP (D) 96K + 4K byte M30281F6HP (D) 48K + 4K byte M30281F8HP (D) 64K + 4K byte M30281FAHP (D) 96K + 4K byte M30280M8-XXXHP (P) 64K byte M30280MA-XXXHP (P) 96K byte M30281M8-XXXHP (P) 64K byte M30281MA-XXXHP (P) 96K byte (P) : under planning RAM capacity 4K byte 4K byte 8K byte 4K byte 4K byte 8K byte 4K byte 8K byte 4K byte 8K byte Package


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PDF M16C/28 16-BIT REJ03B0026-0040Z M16C/60 64-pin 80-pin 30281FA M30281FATHP 032716 30281f CRC-16 20MHZ 16MHZ 10MHZ marking code P73 marking code P72
2003 - Not Available

Abstract: No abstract text available
Text: capacity 64K + 4K byte 96K + 4K byte 128K + 4K byte 64K + 4K byte 96K + 4K byte 128K + 4K byte 48K byte 64K byte 96K byte 48K byte 64K byte 96K byte RAM capacity 4K byte 8K byte 12K byte 4K byte 8K byte 12K byte 4K byte 4K byte 8K byte 4K byte 4K byte 8K byte Package type 80P6Q-A Flash ROM Version 64P6Q-A As of , ) M30291M8T-XXXHP (P) M30291MAT-XXXHP (P) (P) : under planning (D) : under development ROM capacity 64K + 4K byte 96K + 4K byte 128K + 4K byte 64K + 4K byte 96K + 4K byte 128K + 4K byte 48K byte 64K byte 96K byte 48K


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PDF M16C/29 16-BIT REJ03B0072-0020Z M16C/60 64-pin 80-pin REJ03B0072-0020Z
a14q

Abstract: No abstract text available
Text: By 8 Bits 524288 By 16 Bits Array-Blocking Architecture Two 8K- Byte Parameter Blocks One 96K-Byte , architecture consisting of one 16K- byte protected boot block, two 8K- byte parameter blocks, one 96K-byte main , 96K-Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main , Parameter Block 96K-Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte , Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 128K- Byte Main Block 96K-Byte Main


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PDF TMS28F008SET, TMS28F008SEB, TMS28F800SET. TMS28F800SEB TMS28F008SZT, TMS28F008SZB, TMS28F800SZT, TMS28F800SZB 8-BJT/524288 16-BIT a14q
1997 - 28F002BX

Abstract: CAT28F002 Nippon capacitors
Text: ADDRESS LATCH CE OE Y-GATING Y-DECODER X-DECODER 16K- BYTE BOOT BLOCK 8K- BYTE PARAMETER BLOCK 8K- BYTE PARAMETER BLOCK 64K- BYTE MAIN BLOCK 96K-BYTE MAIN BLOCK 28F150 F01 © 1997 by , Enable WE 96K-Byte Main Block Input Write Enable 96K-Byte Main Block 20000H 1FFFFH , 17 18 19 20 16K- Byte Boot Block 8K- Byte Parameter Block 8K- Byte Parameter Block 30000H 2FFFFH 20000H 1FFFFH 64K- Byte Main Block Reads Indeterminate (either high or low but not floating


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PDF CAT28F150 16-KB 40-Lead 44-Lead 64-KB 96-KB 300-T 28F002BX CAT28F002 Nippon capacitors
2001 - toyota bean protocol

Abstract: toyota bean protocol 8BIT M30622MAA 144 QFP body size M306NAFGTFP M306NBFCTFP m30220ma-xxxrp "M16 Family" Mitsubishi M306NAMCT-XXXFP Mitsubishi flash
Text: -pin ROM( Byte ) 256K M30622MGN FP 128K M30622MCA M30623MCA FP GP GP 96K M30622MAA , ( Byte ) (80P6S-A) (100P6S-A) (100P6Q-A) (100D0) 0.65 0.5 - Under Development 14 , Flash Memory Internal Memory ROM( Byte ) 68K RAM( Byte ) 3K New Product 15 Power Source , M306NAFGTFP M306NBMCT-XXXFP M306NBFCTFP Internal Memory CAN (ch) ROM( Byte ) RAM( Byte ) Mask ROM , ROM One Time PROM Mask ROM One Time PROM Mask ROM One Time PROM Internal Memory ROM( Byte ) RAM


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PDF 16/32-bit 16-bit 100-pin 144-pin 144-pin 100-pin M30835FJ M30833FJ toyota bean protocol toyota bean protocol 8BIT M30622MAA 144 QFP body size M306NAFGTFP M306NBFCTFP m30220ma-xxxrp "M16 Family" Mitsubishi M306NAMCT-XXXFP Mitsubishi flash
secucalm

Abstract: HT80C51 ARM10 H285 I18N SecuCalm16
Text: 3 4 5 6 7 8 1. System LSI (S) 7. Rom Master 0 : 0K byte 2 : 2K byte 4 : 4K byte 6 : 6K byte 8 : 8K byte A : 48K byte C : 96K byte E : 176K byte G : 384K byte I : 768K byte (S-SIM) K : 1M byte M : 4M byte T : 16M byte V : 192K byte 2. Large Classification , : 88 8-bit A : 15 Other 1 : 1K byte 3 : 12K byte 5 : 16K byte 7 : 24K byte 9 : 32K byte B : 64K byte D : 128K byte F : 256K byte H : 512K byte J : 768K byte L : 2M byte R : 8M byte U


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PDF 16-bit 32-bit ARM10 16-bit HT80C51 SC-200 128-be secucalm ARM10 H285 I18N SecuCalm16
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