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8XC196NP datasheet (1)

Part Manufacturer Description Type PDF
8XC196NP Intel COMMERCIAL CHMOS 16-BIT MICROCONTROLLER Original PDF

8XC196NP Datasheets Context Search

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1995 - 80C196NP

Abstract: MARK AD9 83C196NP 8XC196NP P648 a3080 16 bit MCS-96 microcontroller
Text: 8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER n n n n n n n n n n n n n 25 MHz , Channels The 8XC196NP is a member of Intel's 16-bit MCS® 96 microcontroller family. The device features , mode, the 8XC196NP can access a 100 ns memory device with zero wait states. The 8XC196NP is available , 8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER 16 CPU 1000 Byte Register File 24 Bytes CPU , / EXTINT3:2 PWM2:0 A2351-01 Figure 1. 8XC196NP Block Diagram 2 8XC196NP COMMERCIAL CHMOS 16


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PDF 8XC196NP 16-BIT 80C196NP MARK AD9 83C196NP P648 a3080 16 bit MCS-96 microcontroller
1996 - a3256

Abstract: 8XC196NP 80C196NU 272479 intel DOC 27245
Text: 8XC196NP's behavior to deviate from published specifications are documented in this specification update. 8XC196NP SPECIFICATION UPDATE Information in this document is provided in connection with Intel products , 8XC196NP SPECIFICATION UPDATE Release Date: July, 1996 Order Number 272838-001 The 8XC196NP , 8XC196NP may contain design defects or errors known as errata. Current characterized errata are available , , 1996 272838-001 8XC196NP SPECIFICATION UPDATE CONTENTS REVISION HISTORY


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PDF 8XC196NP 8XC196NP 8XC196NP, 80C196NU a3256 272479 intel DOC 27245
Not Available

Abstract: No abstract text available
Text: in y 8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER 25 MHz Operation at 4.5-S.5 Volts 16 , 8XC196NP is a member of Intel’s 16-bit MCS® 96 microcontroller family. The device features 1 Mbyte of , , the 8XC196NP can access a 100 ns memory device with zero wait states. The 8XC196NP is available , 4-297 4 flZ b l7 S D 144T15 T7D 8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER intel , D K lF © [^ !M Ä ¥ ö © [M 8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER PROCESS


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PDF 8XC196NP 16-BIT 014414S
1996 - 80C196NU

Abstract: 8XC196NP 272479 intel DOC a3256
Text: 8XC196NP SPECIFICATION UPDATE Release Date: September, 1996 Order Number 272838-002 The 8XC196NP may contain design defects or errors known as errata. Characterized errata that may cause the 8XC196NP's behavior to deviate from published specifications are documented in this specification update. 8XC196NP SPECIFICATION UPDATE Information in this document is provided in connection with Intel products , 8XC196NP may contain design defects or errors known as errata. Current characterized errata are available


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PDF 8XC196NP 8XC196NP 8XC196NP, 80C196NU 272479 intel DOC a3256
1996 - 1F42

Abstract: 80c196nu 80C196NP 270646 80c196nu instruction set 8XC196NU 87C196CA Programmer GuIDE Instruction 80C196 8XC196 instruction set 8xc196 programming support
Text: 8XC196NP , 80C196NU Microcontroller User's Manual 8XC196NP , 80C196NU Microcontroller User , .2-13 2.7 DESIGN CONSIDERATIONS FOR 80C196NP TO 80C196NU CONVERSIONS . 2-13 iii 8XC196NP , .5-18 5.3.2.4 Unsupported Locations Windowing Example ( 8XC196NP Only) .5-19 , .5-31 v 8XC196NP , 80C196NU USER'S MANUAL CHAPTER 6 STANDARD AND PTS INTERRUPTS 6.1 OVERVIEW , . 10-1 vii 8XC196NP , 80C196NU USER'S MANUAL 10.2 EPA AND TIMER/COUNTER SIGNALS AND


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PDF 8XC196NP, 80C196NU Index-11 80C196NU Index-12 1F42 80C196NP 270646 80c196nu instruction set 8XC196NU 87C196CA Programmer GuIDE Instruction 80C196 8XC196 instruction set 8xc196 programming support
2000 - lt1298

Abstract: NE555B 80C196NP 077h dual slope adc TLC1540 harris semiconductors ad574 pin-compatible MAX539 AD574 rev A
Text: measure T2 to implement ADC algorithm with 8xC196NP. It is accomplished by the program listed in Appendix , Analog Data I/O Solutions for Intel® 8xC196NP Microcontrollers Application Note (AP-707) December 2000 Order Number: 272658-002 Analog Data I/O Solutions for Intel® 8xC196NP , incompatibilities arising from future changes to them. The Intel® 8xC196NP may contain design defects or errors , -707) Analog Data I/O Solutions for Intel® 8xC196NP Microcontrollers Contents 1.0 Introduction


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PDF 8xC196NP AP-707) 256-byte lt1298 NE555B 80C196NP 077h dual slope adc TLC1540 harris semiconductors ad574 pin-compatible MAX539 AD574 rev A
1995 - MCS-96 architecture overview

Abstract: 80C196NP MCS-96 temperature controller using microcontroller 16 bit MCS-96 microcontroller intel DOC 196KC 8XC196NP 28F200BX Intel MCS-96/Intel MCS-296
Text: in the 8XC196NP. These I/O ports multiplex with the serial UART, chip selects high-speed I/O event , 15 OE# WR# WE# 2176_05 Figure 5. The 8XC196NP's Demultiplexed Bus Signals Correspond , accomplish this, the 8XC196NP will be examined. Although the timing and specifications for other , application note will start with a brief discussion of the 8XC196NP and Intel's 28F200BX, a high-integration , 8XC196NP /NU were designed as all-purpose microcontrollers which could be used in a diverse range of


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PDF AP-621 specificatio2130 AB-57, AB-60, MCS-96 architecture overview 80C196NP MCS-96 temperature controller using microcontroller 16 bit MCS-96 microcontroller intel DOC 196KC 8XC196NP 28F200BX Intel MCS-96/Intel MCS-296
1996 - 8XC196KC Users manual

Abstract: 8XC196KC/KD complete users manual MCS-96 8XC196KC/KD 8XC196KC/kd users manual MCS-96 development mcs 96 programming 8XC196KD users manual 8XC196KC instructions 8XC196KC/KD microcontroller
Text: 8XC196NP'' section 3 2 ) 4 Wait States To support 1 Mbyte addressability the EPORT was added See , Addressability 3 2 Chip Select Unit of the 8XC196NP 3 3 Demultiplexed Multiplexed Bus of the 8XC196NP 3 4 Lower Voltage (3 3V) Operation of the 8XC196NP 4 0 MEMORY PARTITIONS 4 1 Special Purpose Memory 4 2 , Processer Array (EPA) The EPA family includes the 8XC196KR 8XC196KT 8XC196NT and 8XC196NP and the Motion , family In addition to the highly integrated peripherals both the 8XC196NP and the 8XC196NT offer a


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PDF AP-714 8XC196KB 8XC196Nx 8XC196KC Users manual 8XC196KC/KD complete users manual MCS-96 8XC196KC/KD 8XC196KC/kd users manual MCS-96 development mcs 96 programming 8XC196KD users manual 8XC196KC instructions 8XC196KC/KD microcontroller
Not Available

Abstract: No abstract text available
Text: in ttJ o ^ iy i» w 8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER ■25 MHz Operation at , Processor Array (EPA) with 4 High-speed Capture/Compare Channels The 8XC196NP is a member of Intel’s 16 , demultiplexed operation. When operating at 25 MHz in demultiplexed mode, the 8XC196NP can access a 100 ns memory device with zero wait states. The 8XC196NP is available without ROM (80C196NP) or with 4 Kbytes , 8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER in t e i EPA3:0, Timer 1, Timer 2 Hold Control


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PDF 8XC196NP 16-BIT 16bit)
1996 - 80c196nu

Abstract: 80C196NP mcs-96 programmers guide 270646 8XC196KR 8xc196 programming support 8XC196 instruction set 1F42 AP-445 8xC196
Text: 8XC196NP , 80C196NU Microcontroller User's Manual 8XC196NP , 80C196NU Microcontroller User , .2-13 2.7 DESIGN CONSIDERATIONS FOR 80C196NP TO 80C196NU CONVERSIONS . 2-13 iii 8XC196NP , .5-18 5.3.2.4 Unsupported Locations Windowing Example ( 8XC196NP Only) .5-19 , .5-31 v 8XC196NP , 80C196NU USER'S MANUAL CHAPTER 6 STANDARD AND PTS INTERRUPTS 6.1 OVERVIEW , . 10-1 vii 8XC196NP , 80C196NU USER'S MANUAL 10.2 EPA AND TIMER/COUNTER SIGNALS AND


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PDF 8XC196NP, 80C196NU Index-11 80C196NU Index-12 80C196NP mcs-96 programmers guide 270646 8XC196KR 8xc196 programming support 8XC196 instruction set 1F42 AP-445 8xC196
2004 - ad1286

Abstract: S8XC196NP 80C196NP ad1484 A2120-02 a3080 272459 P648 8XC196NP 83C196NP
Text: 8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER 25 MHz Operation at 4.5­5.5 Volts 4 External , System Development Support High-speed CHMOS Technology The 8XC196NP is a member of Intel's 16 , demultiplexed operation. When operating at 25 MHz in demultiplexed mode, the 8XC196NP can access a 100 ns memory device with zero wait states. The 8XC196NP is available without ROM (80C196NP) or with 4 Kbytes , . 8XC196NP Block Diagram 2 8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER PROCESS


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PDF 8XC196NP 16-BIT 16bit) ad1286 S8XC196NP 80C196NP ad1484 A2120-02 a3080 272459 P648 83C196NP
1996 - mcs 96 opcode

Abstract: 80c196nu marking wk1 8XC196NU 03C0H 8XC196NP 272479
Text: 8XC196NP , 80C196NU Microcontroller User's Manual 8XC196NU Commercial CHMOS 16-Bit Microcontroller , 4-9, 8XC196NP , 80C196NU Microcontroller User's Manual (272479-002) The explanatory comments for the , SP ­ 2 Stack Operation ITEM: Page 4-13, 8XC196NP , 80C196NU Microcontroller User's Manual , , 8XC196NP , 80C196NU Microcontroller User's Manual (272479-002) The counter-overflow interrupt pending bit , 004. PSW Overflow Flag Values for DIV and DIVB ITEM: Page A-4, 8XC196NP , 80C196NU


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PDF 80C196NU, 83C196NU 83C196NU 8XC196NU 16-Bit mcs 96 opcode 80c196nu marking wk1 03C0H 8XC196NP 272479
1999 - 80C196NU

Abstract: marking wk1 FF205D 03C0H 8XC196NP 8XC196NU 272479 FF2017
Text: . Affected Documents/Related Documents Title Order 8XC196NP , 80C196NU Microcontroller User's Manual , Documentation Changes 1. Indirect Addressing With the Stack Pointer Issue: Page 4-9, 8XC196NP , Issue: Page 4-13, 8XC196NP , 80C196NU Microcontroller User's Manual (272479-002) The stack order , address stack pointer 3. Counter Overflow Interrupt Issue: Page 10-6, 8XC196NP , 80C196NU , . 4. PSW Overflow Flag Values for DIV and DIVB Issue: Page A-4, 8XC196NP , 80C196NU


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PDF 80C196NU, 83C196NU 83C196NU 8XC196NU 16-Bit 80C196NU marking wk1 FF205D 03C0H 8XC196NP 272479 FF2017
1996 - marking wk1

Abstract: 03C0H 80C196NU 8XC196NP 8XC196NU 272479 intel DOC
Text: published. Affected Documents/Related Documents Title Order 8XC196NP , 80C196NU Microcontroller , . Indirect Addressing With the Stack Pointer ITEM: Page 4-9, 8XC196NP , 80C196NU Microcontroller User , , 8XC196NP , 80C196NU Microcontroller User's Manual (272479-002) The stack order shows the low word of param2 , pointer Counter Overflow Interrupt ITEM: Page 10-6, 8XC196NP , 80C196NU Microcontroller User's Manual , Flag Values for DIV and DIVB ITEM: Page A-4, 8XC196NP , 80C196NU Microcontroller User's Manual


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PDF 8XC196NU 8XC196NU 80C196NU 83C196NU 16-Bit 100-pin marking wk1 03C0H 8XC196NP 272479 intel DOC
1996 - 03C0H

Abstract: 80C196NU 8XC196NP 8XC196NU 272479 intel DOC A5226 196NU
Text: Title 8XC196NP , 80C196NU Microcontroller User's Manual 8XC196NU Commercial CHMOS 16 , 4-9, 8XC196NP , 80C196NU Microcontroller User's Manual (272479-002) The explanatory comments for the , SP ­ 2 Stack Operation ITEM: Page 4-13, 8XC196NP , 80C196NU Microcontroller User's Manual , 10-6, 8XC196NP , 80C196NU Microcontroller User's Manual (272479-002) The counter-overflow interrupt , SPECIFICATION UPDATE 004. PSW Overflow Flag Values for DIV and DIVB ITEM: Page A-4, 8XC196NP , 80C196NU


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PDF 80C196NU, 83C196NU 83C196NU \specupdt\source\mcs96\196nu\272864 8XC196NU 16-bit A5226-01 03C0H 80C196NU 8XC196NP 272479 intel DOC A5226 196NU
Not Available

Abstract: No abstract text available
Text: . 8XC196NP , 80C196NU USER’S MANUAL Table A-1. Opcode Map (Left Half) Opcode Ox jri JtO SKIP , , 8XC196NP , 80C196NU USER’S MANUAL Table A-2. Processor Status Word (PSW) Flags Mnemonic C , indeterminate state. 4A2bl75 Gn24flS 041 8XC196NP , 80C196NU USER’S MANUAL Table A-5 defines the , -7 4ß2bl?S O n S H 1 7TT !! 8XC196NP , 80C196NU USER’S MANUAL In te l. Table A-6. Instruction , LOOP Z PSW Flag Settings N V VT C ST A-9 4fl2bl7S 01^24^3 S72 8XC196NP , 80C196NU


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PDF 4fl2bl75
1996 - mcs 96 programming

Abstract: mcs 96 opcode MCS-96 mcs-96 software INT02 A3061 Intel MCS-96 FFF800 8XC196NU 8XC196NP
Text: AP-717 APPLICATION NOTE Migrating from the 8XC196NP or 8XC196NU to the 80296SA January , 8xC196NP and 8xC196NU, so you can place the 80296SA into a socket designed for its predecessors. The , for storing code or data. The 80296SA has the same peripherals as the 8xC196NP and 8xC196NU: an event , -Mbaud asynchronous baud rate. However, its interrupt structure differs from that of the 8xC196NP and 8xC196NU, and , application note describes these enhancements and outlines differences to help migrate 8xC196NP or 8xC196NU


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PDF AP-717 8XC196NP 8XC196NU 80296SA 24-bit mcs 96 programming mcs 96 opcode MCS-96 mcs-96 software INT02 A3061 Intel MCS-96 FFF800 8XC196NU
Intel MCS-296

Abstract: intel 8086 Arithmetic and Logic Unit -ALU mcs-296 Intel MCS 296 80186 architecture MELPS7700 Intel MCS-96/296 zilog z80 p10 M377XX MELPS740
Text: is the most recent addition to the 196 family. The 80296SA improves performance over the 8xC196NP and 8xC196NU controllers and maintains binary-code compatibility. You can drop it into an 8xC196NP /NU , peripherals as the 8xC196NP /NU. Intel built the MCS-96 around 256 RAM-based registers; most of the , address stable during data transfers. However, the 8xC196NP has a demultiplexed external bus. An on-chip , , and support for a HOLD/HLDA (hold/hold-acknowledge) protocol for multiprocessor systems. The 8xC196NP


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PDF 16-bit 80C186 16-bit-wide Z80-compatible 32-bit Z8018x Z8038x Intel MCS-296 intel 8086 Arithmetic and Logic Unit -ALU mcs-296 Intel MCS 296 80186 architecture MELPS7700 Intel MCS-96/296 zilog z80 p10 M377XX MELPS740
1996 - EMUL196

Abstract: 80296SA EMUL196-PC intel emulator 87C196NT
Text: . MICROCONTROLLERS SUPPORTED: 8xC196KB, 8xC196KC, 8xC196NP , 8xC196NU, 87C196NT, 80296SA D E V E L O P M E N T P


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PDF EMUL196 EMUL196-PC EMUL196PC 8xC196KB, 8xC196KC, 8xC196NP, 8xC196NU, 87C196NT, 80296SA 80296SA intel emulator 87C196NT
1996 - intel C196

Abstract: mcs-296 80C196NU 80296SA c196 instruction set Intel MCS-296 C196 intel C196KC 8XC196NP Intel MCS 296
Text: matches the 8XC196NP and 8XC196NU microcontroller. 80296SA lifts the overall instruction performance by 5


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PDF 40-Bit 880ns 100-Pin 80296SA 80C196NU, 8xC296SA intel C196 mcs-296 80C196NU c196 instruction set Intel MCS-296 C196 intel C196KC 8XC196NP Intel MCS 296
8XC196

Abstract: MCS-96 cpu mcs-96 Intel MCS-96 intel microcontroller MCS-96 datasheet mcs-96 software 8XC196KB 8XC196MH architecture of microcontroller 96
Text: 23 8xC196KB, 8xC196KC, 8xC196KD, 8xC196KR, 8xC196MC, 8xC196MD, 8xC196MH, 8xC196NP , 8xC196NT


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PDF 16-Bit 8XC196KC 8XC196KD. 8xC196KB, 8xC196KC, 8xC196KD, 8xC196KR, 8xC196MC, 8xC196MD, 8xC196MH, 8XC196 MCS-96 cpu mcs-96 Intel MCS-96 intel microcontroller MCS-96 datasheet mcs-96 software 8XC196KB 8XC196MH architecture of microcontroller 96
1997 - PID code implementation

Abstract: MCS-96 fuzzy z-transform applications MCS-96 architecture overview smac actuator 8XC196NP 80C196NU 80296SA 018H mcs 96 opcode
Text: compatibility. The 80296SA is pin compatible with the 8XC196NP and the 80C196NU. The 80296SA has 512 bytes of , layout with the 8XC196NP and the 80C196NU. The interrupt controller on the 80C296SA can be programmed to


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PDF 80296SA PID code implementation MCS-96 fuzzy z-transform applications MCS-96 architecture overview smac actuator 8XC196NP 80C196NU 018H mcs 96 opcode
1995 - 196NU

Abstract: intel 80c196 INSTRUCTION SET 80C196 instruction set 80C196 z-transform applications 80C196NP fir filter design MCS96 16-bit adder code fir filter
Text: . [3] Intel 80C196NU Supplement to the 8XC196NP Microcontroller User's Manual z-1 x(n) h(0


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PDF
Not Available

Abstract: No abstract text available
Text: the 8XC196NP ■32 I/O Port Pins ■16 Prioritized Interrupt S o u rces Event Processor Array , xFOOOOxFOOFFH are reserved for ICE. 4. Refer to the 8XC196NP , NU User's Manual for SFR descriptions. 5. Code , bits. 3. Locations xFOOOOxFOOFFH are reserved for ICE. 4. Refer to the 8XC196NP , NU User's Manual for


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PDF 8XC196NU 16-BIT 16-bit) 8XC196NP
80c196nu

Abstract: p6506
Text: more of these locations may not function properly. 5. Refer to the 8XC196NP User's Manual or 8XC196NP


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PDF 80C196NU 16-BIT 16-bit) 32-bit 100-pin USA/MS095-059 0/SMS95 p6506
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