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817 BN circuit Datasheets Context Search

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817 BN

Abstract: 817 BN circuit
Text: REFERENCE DATA SYMBOL tpLH tpHL C|N PARAMETER Propagation delay An to Bn or Bn to An Input capacitance , CPBA AO A1 A2 A3 A4 A5 A6 A7 g - B2 B3 B4 B5 B6 B7 B8 B9 B10 811 B12 B13 B14 B15 B16 817 , H o rL An X h I X h I H L h I h I X X INTERNAL REGISTER X H L NC H L H L H L H L H L OUTPUTS Bn Z z , high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should


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PDF 18-bit 74LVT16501A 64mA/-32tmA 500mA 74LVT165 74LVT16 510MHz 817 BN 817 BN circuit
2004 - 817 BN

Abstract: No abstract text available
Text: bn S 1 2 3 4 5 6 Insertion Loss Amplitude Isolation Phase FREQ FREQ VSWR VSWR VSWR Unbalance (dB , 8.08 8.09 1.800 8.12 8.11 8.12 2.600 8.13 8.14 8.14 3.400 8.15 8.16 8.17 4.200 8.17 8.17 8.19 5.000


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817 BN

Abstract: 817 BN circuit 52J DIODE CPXX
Text: PARAMETER Propagation delay An to Bn ; Bn to An LEab Bn ; LEBa to An CPab to Bn ; CP ba to An Input capacitance , ¡24 (25 ¡2« [2 ] 6 1 5 B16 G ND 817 C P 8A LE r a [28 S W 00 J24 LOGIC SYMBOL 3 5 AQ A1 A2 , bus transceiver (3-State) 74ALVCH16600 LOGIC SYMBOL (IEEE/IEC) BUSHOLD CIRCUIT 1998 Aug 27 , to Bn , Bn to An Propagation delay LEba to An, LE ab to Bn 1 1 1 *PHL tP LH 2 Propagation delay CP ba to An, CPab to Bn 3-State output enable time D E ba to An, OE ab to Bn 3-State output


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PDF 18-bit 74ALVCH16600 74ALVCH16600 817 BN 817 BN circuit 52J DIODE CPXX
2004 - 817 BN

Abstract: No abstract text available
Text: ) U=upper range(fU/2 to fU) Pin Connections Port Sum Port Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 bn S 1 2 , ) Unbalance (MHz) (dB) (dB) (dB) (MHz) S 1 3 (dB) S-1 S-3 S-5 1-2 1-3 5-6 (Degrees) 10.00 8.17 8.17 8.18 12.00 8.18 8.18 8.18 14.00 8.18 8.18 8.19 16.00 8.17 8.20 8.19 18.00 8.20 8.21 8.20 25.00 8.21 8.22 8.23


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PDF ZBSC-611 817 BN
2004 - 817 BN

Abstract: FL 817 C
Text: Port 2 Port 3 Port 4 Port 5 Port 6 bn S 1 2 3 4 5 6 Insertion Loss Amplitude Isolation Phase FREQ , 448.00 8.01 7.96 8.10 482.00 8.03 7.98 8.12 516.00 8.05 8.01 8.14 550.00 8.09 8.04 8.17 560.00 8.09 8.05 8.19 580.00 8.09 8.05 8.18 600.00 8.09 8.05 8.17 610.00 8.08 8.04 8.17 714.00 8.05 8.01 8.13 0.190


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PDF ZN6PD-ED6515A/2 b1826 817 BN FL 817 C
2004 - Not Available

Abstract: No abstract text available
Text: ) U=upper range(fU/2 to fU) Pin Connections Port Sum Port Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 bn S 1 2 , ) Unbalance (dB) (dB) (dB) (MHz) (MHz) S 1 3 (dB) S-1 S-3 S-5 1-2 1-3 5-6 (Degrees) 10.00 8.17 8.17 8.18 12.00 8.18 8.18 8.18 14.00 8.18 8.18 8.19 16.00 8.17 8.20 8.19 18.00 8.20 8.21 8.20 25.00 8.21 8.22 8.23


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PDF ZBSC-611
1999 - 817 BN

Abstract: 817 BN circuit MNA291
Text: ; Tamb = 25 °C; tr = tf = 2.5 ns. SYMBOL tPHL/tPLH PARAMETER propagation delay An, Bn to Bn , An , FUNCTION TABLE See note 1. INPUTS OUTPUTS STATUS CEXX OEXX LEXX CPXX An, Bn X H , 9 48 B4 A5 10 47 B5 handbook, halfpage data input to internal circuit MNA291 46 GND GND 11 A6 12 45 B6 A7 13 44 B7 Fig.2 Bus hold circuit . 43 B8 A8 14 , 74ALVCH162601 OEAB CEAB LEAB CPAB CPBA LEBA CEBA OEBA CE C1 Bn CP 1D An CE C1 CP 1D


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PDF 74ALVCH162601 18-bit 74ALVCH162601 245004/01/pp20 817 BN 817 BN circuit MNA291
1996 - schematic diagram memory card adapter

Abstract: DSP56003 106K010CCS adapter schematic DSP56002 DSP56005 DIN-96CSC-S1-TG30
Text: BOARD PLL ENABLE OPTIONS To disable the DSP PLL circuit on reset, a jumper group option is provided to , Technology #FN- 817 -C Page 12-4 APPLICATION DEVELOPMENT SYSTEM REFERENCE MANUAL 1/17/96 12.5 , Smith #4056 2 Screwt #4-40 x 1/4" nylon SPC Technology #FN- 817 -C 12.6 DSP56003/5 , PC5/SC2 21 D03 GND PC4/SC1 22 D02 BN * PC3/SC0 23 D01 BS* PC2/SCLK , > A<7> OS1/DSCK 6 D<7> A<6> WT* 7 D<6> A<5> BN * 8 D<5> A<4> WR


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PDF DSP56003/5 DSP56003 DSP56005 DSP56002 DSP56005 schematic diagram memory card adapter 106K010CCS adapter schematic DIN-96CSC-S1-TG30
2004 - Not Available

Abstract: No abstract text available
Text: (fU/2 to fU) Pin Connections Port Sum Port Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 bn S 1 2 3 4 5 6 , 8.20 8.20 2.800 8.18 8.16 8.19 3.700 8.16 8.14 8.17 4.600 8.16 8.14 8.15 5.500 8.15 8.14 8.15 6.400 8.16 8.14 8.16 7.300 8.16 8.14 8.15 8.200 8.16 8.15 8.16 9.100 8.16 8.15 8.15 10.00 8.16 8.17 8.16


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PDF ZFSC-6-1-75
1999 - Not Available

Abstract: No abstract text available
Text: delay An, Bn to Bn , An CONDITIONS TYPICAL UNIT CL = 30 pF; VCC = 2.5 V 4.0 ns CL = , CEXX OEXX LEXX CPXX An, Bn X H X X X Z disabled X X L L H , B4 A5 10 47 B5 handbook, halfpage data input to internal circuit MNA291 46 GND GND 11 A6 12 45 B6 A7 13 44 B7 Fig.2 Bus hold circuit . 43 B8 A8 14 162601 A9 15 , CEAB LEAB CPAB CPBA LEBA CEBA OEBA CE C1 Bn CP 1D An CE C1 CP 1D 18 IDENTICAL


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PDF 74ALVCH162601 18-bit 74ALVCH162601 245004/01/pp20
2004 - Not Available

Abstract: No abstract text available
Text: bn S 1 2 3 4 5 6 Insertion Loss Amplitude Isolation Phase FREQ FREQ VSWR VSWR VSWR Unbalance (dB , 8.24 8.25 2.000 8.23 8.22 8.22 3.000 8.18 8.20 8.20 4.000 8.18 8.18 8.18 5.000 8.18 8.17 8.18 6.000 8.17 8.19 8.18 7.000 8.000 9.000 10.00 20.00 8.18 8.19 8.19 8.19 8.22 8.18 8.18 8.18 8.19 8.21 8.19


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PDF ZBSC-615
2004 - Not Available

Abstract: No abstract text available
Text: Port 2 Port 3 Port 4 Port 5 Port 6 bn Amplitude Unbalance, dB 6 800.00 8.22 8.08 8.11 , grams. 0.210 37.09 34.50 34.39 1.66 852.50 1.19 1.14 1.13 855.00 8.17 8.08 8.08 0.200 36.26 35.13 34.87 1.59 855.00 1.18 1.13 1.13 857.50 8.17 8.08 8.07 0.220


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PDF ZB6PD1-900 ZB6PD1-900
2004 - Not Available

Abstract: No abstract text available
Text: ) U=upper range(fU/2 to fU) Pin Connections Port Sum Port Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 bn S 1 2 , 8.23 8.22 8.22 3.000 8.18 8.20 8.20 4.000 8.18 8.18 8.18 5.000 8.18 8.17 8.18 6.000 8.17 8.19 8.18


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PDF ZBSC-615
GDFP2-F20

Abstract: 817 BN 817 BN circuit 54F241/BSA 54F240 CQCC2-N20 54F240/BRA 54F241 E 817
Text: DESCRIPTION 54F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW 'aN ' ' bN Data Inputs (54F240) 1.0/1.67 20pA/1.0mA 'aN â , OEb 3-State Output Enable input (Active Low) 1.0/1.67 20|iA/1.0mA ^ani ^ bn Data outputs (54F240) 600 , tacH Vcc - Max 54F241 40 60 mA tacL 60 90 mA tacz 60 90 mA February 19, 1988 817 , -State) Product specification 54F240 54F241 TEST CIRCUIT AND WAVEFORMS O 7.0' Test Circuit for 3-State Outputs


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PDF 54F240 54F241 54F241 20-Pin 54F240/BRA, 54F241/BRA GDIP1-T20 GDIP1-T20 GDFP2-F20 817 BN 817 BN circuit 54F241/BSA CQCC2-N20 54F240/BRA E 817
2004 - Not Available

Abstract: No abstract text available
Text: ) U=upper range(fU/2 to fU) Pin Connections Port Sum Port Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 bn S 1 2 , 8.21 8.11 8.11 852.50 8.19 8.11 8.10 855.00 8.17 8.08 8.08 857.50 8.17 8.08 8.07 860.00 8.13 8.06 8.05


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PDF ZB6PD1-900
1999 - 817 BN

Abstract: 74AHC245 74AHC245D 74AHC245PW 74AHCT245
Text: FUNCTION TABLE See Note 1. INPUTS An Bn L A=B inputs L H inputs B=A H X , = 5 V 3.5 5.0 ns An to Bn , Bn to An CI input capacitance VI = VCC or GND 3.5 , tPHL/tPLH propagation delay An to Bn ; Bn to An see Figs 4 and 6 15 pF - 5.0 8.4 1.0 10.0 1.0 10.5 ns tPZL/tPZH propagation delay OE to An; OE to Bn ; signal name DIR , delay OE to An; OE to Bn ; signal name DIR - 7.5 12.5 1.0 15.5 1.0 16.0 ns


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PDF 74AHC245; 74AHCT245 EIA/JESD22-A114-A EIA/JESD22-A115-A EIA/JESD22-C101 245002/02/pp20 817 BN 74AHC245 74AHC245D 74AHC245PW 74AHCT245
GDFP2-F20

Abstract: No abstract text available
Text: Data Handbook INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS U n ` ^ bN laN - IbN OEa, OEb OEb ^an- ^ bn Yan> NOTE: D E S C R IP T IO N 5 4 F ( U .L .) H IG H /L O W LO A D VALUE H IG H /L O W Data , current7 mA mA mA mA mA mA mA February 19, 1988 817 Philips Semiconductors Military FAST , - 54F241 TEST CIRCUIT AND WAVEFORMS VM t 0.3V tTHL(lf) V» 0.3V g


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PDF 54F240 54F241 20-Pin 54F241 54F240/BRA, 500ns GDFP2-F20
1999 - 74LVC4245A

Abstract: 74LVC4245AD 74LVC4245ADB 74LVC4245ADH 74LVC4245APW
Text: TYPICAL UNIT CL = 50 pF An to Bn VCCA = 5.0 V 4.0 ns Bn to An VCCB = 3.3 V 4.0 ns 10.0 pF CI/O input/output capacitance CPDA A port An to Bn 7.8 pF VI = GND to VCC; note 1 27.9 pF An to Bn VI = GND to VCC; note 1 26 pF Bn to An CPDB VI = GND to VCC; note 1 Bn to An VI = GND to VCC; note 1 10.4 pF B port Note , -state 74LVC4245A FUNCTION TABLE See note 1. INPUT INPUT/OUTPUT OE DIR An Bn L L A=B


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PDF 74LVC4245A 74LVC4245A 245004/03/pp16 74LVC4245AD 74LVC4245ADB 74LVC4245ADH 74LVC4245APW
1999 - TSSOP56 footprint

Abstract: No abstract text available
Text: . SYMBOL tPHL/tPLH CI/O CI CPD PARAMETER propagation delay An, Bn to Bn , An input/output capacitance input , PACKAGE TSSOP MATERIAL plastic OEXX H L L L L L L L LEXX X H H L L L L L CPXX X X X X L H An, Bn X H L X , GND 45 B6 44 B7 43 B8 MNA291 handbook, halfpage VCC data input to internal circuit A5 10 GND 11 A6 12 A7 13 A8 14 Fig.2 Bus hold circuit . 162601 A9 15 A10 16 A11 17 GND 18 A12 19 , LEAB CPAB CPBA LEBA CEBA OEBA CE C1 CP An CE C1 CP 1D 18 IDENTICAL CHANNELS MNA289 Bn 1D


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PDF 74ALVCH162601 18-bit 74ALVCH162601 74ALVCH162601, TSSOP56 footprint
1999 - A1117

Abstract: smd diode code B4 ST smd diode marking A9
Text: . SYMBOL tPHL/tPLH CI/O CI CPD PARAMETER propagation delay An, Bn to Bn , An input/output capacitance input , PACKAGE TSSOP MATERIAL plastic OEXX H L L L L L L L LEXX X H H L L L L L CPXX X X X X L H An, Bn X H L X , GND 45 B6 44 B7 43 B8 MNA291 handbook, halfpage VCC data input to internal circuit A5 10 GND 11 A6 12 A7 13 A8 14 Fig.2 Bus hold circuit . 162601 A9 15 A10 16 A11 17 GND 18 A12 19 , LEAB CPAB CPBA LEBA CEBA OEBA CE C1 CP An CE C1 CP 1D 18 IDENTICAL CHANNELS MNA289 Bn 1D


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PDF 74ALVCH162601 18-bit 74ALVCH162601 featurin46 74ALVCH162601, A1117 smd diode code B4 ST smd diode marking A9
1999 - Not Available

Abstract: No abstract text available
Text: output stages to reduce line noise. Bn inputs B=A Z PACKAGE MATERIAL SO SSOP TSSOP plastic plastic , voltage DESCRIPTION PARAMETER propagation delay An to Bn ; Bn to An input capacitance power dissipation , values at VCC = 3.3 V and Tamb = 25 °C. AC WAVEFORMS propagation delay An to Bn ; Bn to An 3-state output enable time OE to An; OE to Bn 3-state output disable time OE to An; OE to Bn see Figs 4 and 6 see Figs 5 , MIN. 1.5 1.5 1.5 MAX. 7.5 10.0 6.9 UNIT ns ns ns handbook, halfpage VI An, Bn INPUT GND


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PDF 74LVC2245A SCA63 245002/00/01/pp16
1999 - 74LVC2245A

Abstract: 74LVC2245AD 74LVC2245ADB 74LVC2245APW
Text: An Bn L L A=B inputs L H inputs B=A H X Z Z Note 1. H = , propagation delay An to Bn ; Bn to An CI input capacitance CPD power dissipation capacitance per , . UNIT MAX. tPHL/tPLH propagation delay An to Bn ; Bn to An see Figs 4 and 6 1.5 3.9 6.5 1.5 7.5 ns tPZH/tPZL 3-state output enable time OE to An; OE to Bn see Figs 5 , ; OE to Bn see Figs 5 and 6 1.5 4.2 5.9 1.5 6.9 ns Note 1. Typical values at


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PDF 74LVC2245A 74LVC2245A 245004/02/pp16 74LVC2245AD 74LVC2245ADB 74LVC2245APW
817 BN

Abstract: No abstract text available
Text: !" &6" )% !" & klm 7)$ bn $./0&./0.//0&!!5./ !" bn$obgpqr\st !" uv^JKw"$/`015x6 7 !" yzw"$)*+,- , #ÝÔ !" =^7$7A` M/% M #ÝÔ !" =^B7A` ¢/% 817 < Oª ¯$ #ÝÔ !" ="* %&% !" )A #ÝÔ x , % /M!® » /M!® bn $ bn $ bn$cd bn$cd bn$cd !"# Sf & bn$cdR )$ bn$cd^7)$` ¢bn$cd^)$` \abcd^.B`A \abcd^8B` %+>ÍJKw"$ %$# A %#$ µ2'%½ áâÕË©Ñ, & cd% ½ <7âxøS!T¯ab1b$ \]% ©Ñ bn $ cd ½ 8 A ©Ñ bn $ cd A 3 1 -> #-#? 3 3 $->$% #-#? 3 5 <) ><'*) 9


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PDF 015x6 817 BN
Not Available

Abstract: No abstract text available
Text: high-performance Integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should , output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC Vi V,H ViL bn , Hold Times Output Disable Time from Low Level 1998 Feb 19 817 Philips Semiconductors Product specification 3.3V Octal D-type flip-flop, inverting (3-State) 74LVT534 TEST CIRCUIT AND


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PDF 74LVT534 500mA LVT534
2004 - 817 BN

Abstract: 16250 88 826 XXX 3268
Text: ) U=upper range(fU/2 to fU) Pin Connections Port Sum Port Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 bn S 1 2 , 8.06 8.25 1575.00 8.25 8.05 8.24 1580.00 8.23 8.02 8.21 G H J 1585.00 8.19 7.98 8.17 1590.00 8.16 7.94


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PDF ZB6PD-1700 1500-ed 817 BN 16250 88 826 XXX 3268
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