74LVC109PW |
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Philips Semiconductors
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Dual J Inverted(K)Flip-flop with Set and Reset, Positive-Edge Trigger |
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74LVC109PW |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
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Scan |
PDF
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74LVC109PW |
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Philips Semiconductors
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Dual JK flip-flop with set and reset, positive-edge trigger |
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Scan |
PDF
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74lVC109PW |
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Philips Semiconductors
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Dual JK flip-flop with set and reset, positive-edge trigger |
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Scan |
PDF
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74LVC109PW,112 |
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NXP Semiconductors
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Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1.2-3.6; Package: SOT403-1 (TSSOP16); Container: Tube |
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Original |
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74LVC109PW,112 |
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NXP Semiconductors
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74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, TSSOP1-16, FF/Latch |
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Original |
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74LVC109PW,118 |
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NXP Semiconductors
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Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1.2-3.6; Package: SOT403-1 (TSSOP16); Container: Reel Pack, SMD, 13" |
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Original |
PDF
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74LVC109PW,118 |
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NXP Semiconductors
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74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, 4.40 MM,PLASTIC, MO-153, SOT403-1, TSSOP1-16, FF/Latch |
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74LVC109PWDH |
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Philips Semiconductors
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Dual J Inverted K flip-flop with set and reset, positive-edge trigger |
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Original |
PDF
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74LVC109PW-T |
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NXP Semiconductors
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Dual JK(not) flip-flop with set and reset; positive-edge trigger - Description: 3.3V Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 330 MHz; Logic switching levels: TTL ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 4.0@3.3V ns; Voltage: 1.2-3.6 |
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Original |
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74LVC109PW-T |
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NXP Semiconductors
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74LVC109 - IC LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, TSSOP1-16, FF/Latch |
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Original |
PDF
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74LVC109PW-T |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
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Scan |
PDF
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