The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LT1017MJ8/883 Linear Technology LT1017 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military
LM108AJ8 Linear Technology LM108A - Operational Amplifiers; Package: CERDIP; Pins: 8; Temperature: Military
LT1175CDWF#MILDWF Linear Technology LT1175 - 500mA Negative Low Dropout Micropower Regulator; Pins: 5
LT1018MJ8/883 Linear Technology LT1018 - Micropower Dual Comparator; Package: CERDIP; Pins: 8; Temperature: Military
LTC1041MJ8/883 Linear Technology LTC1041 - BANG-BANG Controller; Package: CERDIP; Pins: 8; Temperature: Military
LTC2905HDDB#TRMPBF Linear Technology LTC2905 - Precision Dual Supply Monitor with Pin-Selectable Thresholds; Package: DFN; Pins: 8; Temperature Range: -40°C to 125°C

74LS192 pins Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
IC 74LS192

Abstract: ic 74LS193 pin diagram 74LS192 INTERNAL DIAGRAM 74LS192 PIN diagram of 74LS193 IC counter 74LS192 truth table 74ls193 pin diagram pin diagram of 74LS192 74LS193 74LS192
Text: SN54/ 74LS192 is an UP/DOWN BCD Decade (8421) Counter and the SN54/74LS193 is an UP/DOWN MODULO , Input Clamp Diodes Limit High Speed Termination Effects SN54/ 74LS192 SN54/74LS193 PRESETTABLE BCD , U.L. for C ommercial (74) Temperature Ranges. FAST AND LS T T L DATA 5-213 SN54/ 74LS192 · SN54 , 16 GND = PIN 8 0 = PIN NUMBERS FAST AND LS T TL DATA 5-214 SN54/ 74LS192 · SN54/74LS193 , TL DATA 5-215 SN54/ 74LS192 · SN54/74LS193 FUNCTIONAL DESCRIPTION The LS192 and LS193 are


OCR Scan
PDF SN54/74LS192 SN54/74LS193 MODULO-16 as218 SN54/74LS192 SN54/74LS193 IC 74LS192 ic 74LS193 pin diagram 74LS192 INTERNAL DIAGRAM 74LS192 PIN diagram of 74LS193 IC counter 74LS192 truth table 74ls193 pin diagram pin diagram of 74LS192 74LS193 74LS192
IC 74LS192

Abstract: 74ls183 74LS192 truth table 74LS193 pin data 74LS192 table 74LS193 truth table
Text: D ESCRIPTIO N - The SN54LS/ 74LS192 is an UP/DOWN BCD Decade {8421) Counter and the SN54LS/74LS193 , DOWN . FAST AND LS TTL DATA SN54/ 74LS192 · SN54/74LS193 O T O * ? LOGIC DIAGRAMS , DATA SN54/ 74LS192 · SN54/74LSÎ93 FU N CTIO N AL D ESCR IPTIO N - The LS192 and LS193 are , FAST AND LS TTL DATA 5-174 SN64/ 74LS192 · SN54/74LS193 GUARAN TEED OPERATING RAN GES SYM BO L , FAST AND LS TTL DATA 5-175 SN54/ 74LS192 · SN54/74LS183 A C SETU P MEp m REM E N TS: TA -~ =2 5


OCR Scan
PDF SN54LS/74LS192 SN54LS/74LS193 MODULO-16 SN54/74LS192 SN54/74LS193 IC 74LS192 74ls183 74LS192 truth table 74LS193 pin data 74LS192 table 74LS193 truth table
1996 - 74LS192

Abstract: 74LS192 PIN diagram 74LS192 truth table 74LS193 pin data 74ls193 pin diagram TTL 74ls193 74LS193 truth table 74LS192 INTERNAL DIAGRAM 74LS192 table 74LS193
Text: SN54/ 74LS192 SN54/74LS193 PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP , The SN54/ 74LS192 is an UP/DOWN BCD Decade (8421) Counter and the SN54/74LS193 is an UP/DOWN MODULO , PIN 8 7 SN54/ 74LS192 · SN54/74LS193 STATE DIAGRAMS 0 1 2 3 4 15 0 TCU , TCD (BORROW OUTPUT) Q T 4 3 TCU (CARRY OUTPUT) Q3 SN54/ 74LS192 · SN54 , TCD (BORROW OUTPUT) SN54/ 74LS192 · SN54/74LS193 FUNCTIONAL DESCRIPTION The LS192 and LS193 are


Original
PDF SN54/74LS192 SN54/74LS193 SN54/74LS192 SN54/74LS193 MODULO-16 inputsN54/74LS193 74LS192 74LS192 PIN diagram 74LS192 truth table 74LS193 pin data 74ls193 pin diagram TTL 74ls193 74LS193 truth table 74LS192 INTERNAL DIAGRAM 74LS192 table 74LS193
74LS192 PIN diagram

Abstract: 74LS193 function table mr1520 74LS192 function table 74LS192 pins Am25LS193 LS192 74LS192 74LS 8bit counter 74ls
Text: Am25LS192 • Am25LSl93 Am54LS/ 74LS192 • Am54LS/74LS193 Decimal and Hexadecimal Up/Down , Copyrighted By Its Respective Manufacturer Am25 LS/54 LS/ 74LS192 /193 Am25LS192 • Am25LS193 ELECTRICAL , Respective Manufacturer Am25 LS/54 LS/ 74LS192 /193 Am54LS/ 74LS192 • Am54LS/74LS193 ELECTRICAL , Respective Manufacturer Am25 LS/54 LS/ 74LS192 /193 SWITCHING CHARACTERISTICS (TA = 25°C, VCC=5.0V| Am25LS , Respective Manufacturer Am25 LS/54 LS/ 74LS192 /193 Am25LS192, Am25LS193 ONLY SWITCHING CHARACTERISTICS


OCR Scan
PDF Am25LS192 Am25LSl93 Am54LS/74LS192 Am54LS/74LS193 Am25LS Am54/74LS 440/jA MIL-STD-883 LS192 LS193 74LS192 PIN diagram 74LS193 function table mr1520 74LS192 function table 74LS192 pins Am25LS193 74LS192 74LS 8bit counter 74ls
74LS192 truth table

Abstract: 74LS193 truth table 74LS192 PIN diagram 74ls193 74LS192 74LS192 INTERNAL DIAGRAM TTL 74ls193 74LS193 pin data 74LS192 table ttl 74ls192
Text: SN54/ 74LS192 SN54/74LS193 PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP , The SN54/ 74LS192 is an UP/DOWN BCD Decade (8421) Counter and the SN54/74LS193 is an UP/DOWN MODULO , Q1 Q2 Q3 14 3 2 6 VCC = PIN 16 GND = PIN 8 7 SN54/ 74LS192 · SN54/74LS193 STATE , GND = PIN 8 = PIN NUMBERS FAST AND LS TTL DATA 5-352 Q3 SN54/ 74LS192 · SN54/74LS193 , = PIN 16 GND = PIN 8 = PIN NUMBERS FAST AND LS TTL DATA 5-353 Q3 SN54/ 74LS192 · SN54


Original
PDF SN54/74LS192 SN54/74LS193 SN54/74LS192 SN54/74LS193 MODULO-16 74LS192 truth table 74LS193 truth table 74LS192 PIN diagram 74ls193 74LS192 74LS192 INTERNAL DIAGRAM TTL 74ls193 74LS193 pin data 74LS192 table ttl 74ls192
74LS192 truth table

Abstract: 74LS193 truth table IC 74LS192 74LS192 table TTL 74ls193 74LS192 74LS193 74LS193 pin data motorola 74ls192 of ic 74ls193
Text: (g ) MOTOROLA DESCRIPTION - The SN54LS/ 74LS192 is an UP/DOWN BCD Decade (8421) Counter and , / 74LS192 SN54LS/74LS193 PRESETTABLE BCD/DECADE UP/DOW N COUNTER PRESETTABLE 4-BIT BINARY UP/DOW N COUNTER , iagram ) as th e Dual In -L in e Package. MOTOROLA SCHOTTKY TTL DEVICES SN54LS/ 74LS192 · SN54LS , s itio n MOTOROLA SCHOTTKY TTL DEVICES S N54LS/ 74LS192 · SN54LS/74LS193 GUARANTEED , CONDITIONS MOTOROLA SCHOTTKY TTL DEVICES 4 -1 8 9 SN54LS/ 74LS192 · SN54LS/74LS193 AC SETUP


OCR Scan
PDF SN54LS/74LS192 SN54LS/74LS193 MODULO-16 N54LS/74LS192 SN64LS/74LS193 74LS192 truth table 74LS193 truth table IC 74LS192 74LS192 table TTL 74ls193 74LS192 74LS193 74LS193 pin data motorola 74ls192 of ic 74ls193
ic 74192 pin configuration

Abstract: pin diagram of counter ic 74193 ic 74193 ic 74192 ic 74192 pin diagram 74192 ic TTL 74192 ttl 74193 74192 pin configuration IC 74LS192
Text: be loaded in parallel by activating the asyn chronous parallel load pin. 1 TYPE 74192 74LS192 '193 74LS193 PINS All All 74192, 74193, LS192, LS193 Counters TYPICAL fMAX 32MHz TYPICAL , 34 0.5 0.4 -1 .5 Max V V V V mA mA =m /jA =m#iA mA mA mA 74LS192 , '193 UNIT < 0 1 HIGH-level


OCR Scan
PDF
IC 74LS192

Abstract: mr25n
Text: Am25LSl92 · Am25LSl93 Am54LS/ 74LS192 · Am54LS/74LS193 Decimal and Hexadecimal Up/Down Counters D , t, In to O u tp u ts DC In p u t C u rre n t 3-100 Am25LS/54LS/ 74LS192 /193 Am54LS/ 74LS192 · , Am25 LS/54 LS/ 74LS192 /193 SWITCHING CHARACTERISTICS (T a = 2 5 °C , V n n = 5 .0 V ) D e scrip , y cycle . 3-10 2 Am25LS/54LS/ 74LS192 /193 Am25LS192, Am25LS193 ONLY SWITCHING CHARACTERISTICS , G r o u p A , S u b g r o u p 9 . 3-10 3 Am25LS/54LS/ 74LS192 /193 FUNCTION TABLE IN P U T S


OCR Scan
PDF Am25LSl92 Am25LSl93 Am54LS/74LS192 Am54LS/74LS193 Am25LS192 Am25LS193 Am25LS IC 74LS192 mr25n
74192 pin configuration

Abstract: 74LS192 PIN CONFIGURATION TTL 74192 74192 74192 four bit binary counter 74193 state diagram up counter 74193 pin configuration 74192 up/down decade (0-9) counter 74193 pin diagram of 74192
Text: asynchronous parallel load pin. TYPE TYPICAL f„AX TYPICAL SUPPLY CURRENT 74192 32MHz 65mA 74LS192 32MHz , Products Data Manual. INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74 74LS All Inputs 1ul , unless otherwise noted.) PARAMETER TEST CONDITIONS1 74192, '193 74LS192 , '193 UNIT Min Typ2 Max


OCR Scan
PDF LS192, LS193 74192 pin configuration 74LS192 PIN CONFIGURATION TTL 74192 74192 74192 four bit binary counter 74193 state diagram up counter 74193 pin configuration 74192 up/down decade (0-9) counter 74193 pin diagram of 74192
74193 pin configuration

Abstract: ic 74192 74LS192 PIN CONFIGURATION ic 74193 ic 74192 pin configuration IC 74LS192 pin configuration of 74193 ttl 74193 74 LS 193 Logic DIAGRAM 74193 state diagram
Text: Specification TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT 74192 32MHz 65mA 74LS192 32MHz 19mA 74193 32MHz 65 mA , OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74 74LS All Inputs 1 ul 1 LSul All Outputs 10ul , range unless otherwise noted.) PARAMETER TEST CONDITIONS1 74192, '193 74LS192 , '193 UNIT Min


OCR Scan
PDF
74LS255

Abstract: 74LS367 54LS 74LS258 ls386 74ls193 54LS/74LS191 inverter tristate
Text: Digital Circuits 9LS/54LS/74LS Low Power Schottky (Cont.) Prop D elay1 (ns) or Max. Op. Freq. Type Number 9LS/54 LS/74LS190 9LS/54LS/74LS191 9LS/54LS/ 74LS192 9LS/54LS/74LS193 9 LS/54 LS/74 LSI 94 A 9 LS/54 LS/74LS195A 9LS/54LS/74LS196 9 LS/54 LS/74 L S 19 7 9LS/54LS/74LS221 9LS/54LS/74LS251 9LS/54LS/74LS253 9LS/54LS/74LS255 9LS/54LS/74LS257 9LS/54LS/74LS258 9LS/54 LS/74 LS26t 9LS/54LS/74 LS266 9LS/54LS/74LS279 9LS/54LS/74LS283 9 LS/54 LS/74 LS295A 9LS/54LS/74LS298 9LS/54LS/74LS365 9 LS/54 LS/74


OCR Scan
PDF 9LS/54LS/74LS 9LS/54 LS/74LS190 9LS/54LS/74LS191 9LS/54LS/74LS192 9LS/54LS/74LS193 LS/54 LS/74 LS/74LS195A 74LS255 74LS367 54LS 74LS258 ls386 74ls193 54LS/74LS191 inverter tristate
74LS192 truth table

Abstract: 74HC192 up down counter truth table M54HC192 M74HC192
Text: Function compatible with 54/ 74LS192 INPUT AND OUTPUT EQUIVALENT CIRCUIT "cc vcc INPUT V Ï * 273


OCR Scan
PDF M54HC192 M74HC192 M54/74HC192 54/74LS192 74LS192 truth table 74HC192 up down counter truth table M74HC192
multiplexers 74 LS 150

Abstract: 74LS255 74LS190 up down decade counter 74LS190 pins bcd counter 74 90 74LS192 pins 74LS221 LS386 ls95b 74LS191
Text: Digital Circuits 9LS/54LS/74LS Low Power Schottky (Cont.) Type Number Description Prop Delay1 (ns) or Max. Op. Freq. (MHz)2 Available Packages Pwr Diss. 14 Pin 16 Pin 24 Pin (mW) J w J w J w 9LS/54LS/74LS190 BCD decade counter, mode control 25 MHz 90 X X 9LS/54LS/74LS191 4-bit binary counter, mode control 25 MHz 90 X X 9LS/54LS/ 74LS192 BCD decade counter, up/down 30 MHz 85 X X 9LS/54LS/74LS193 4-bit binary counter, up/down 30 MHz 85 X X 9 LS/54 LS/74 LSI 94 A 4


OCR Scan
PDF 9LS/54LS/74LS 9LS/54LS/74LS190 9LS/54LS/74LS191 9LS/54LS/74LS192 9LS/54LS/74LS193 LS/54 LS/74 9LS/54LS/74LS195A LS196 multiplexers 74 LS 150 74LS255 74LS190 up down decade counter 74LS190 pins bcd counter 74 90 74LS192 pins 74LS221 LS386 ls95b 74LS191
IC 74LS192

Abstract: ic 74193 74193 state diagram 74193 pin configuration ic 74192 pin configuration 74192 ic 74192 pin diagram of counter ic 74193 74192 ic of ic 74ls193
Text: Signelics Counters Logic Products FEATURES · Synchronous reversible 4-bit binary counting · Asynchronous parallel load · Asynchronous reset (clear) · Expandable without external logic TYPE 74192 74LS192 74193 74LS193 7 4 1 9 2 , 7 4 1 9 3 , LS192, LS193 '192 Presettable BCD Decade Up/Down Counter , OUTPUT LOADING AND FAN-OUT TABLE PINS All All NOTE: W h e re a 7 4 u n it lo a d (ul) is u n d e rs to , -1 .5 Max V V V V mA mA =m¿¿A -m /iA mA mA mA 74LS192 , ' 193 UNIT V qh HIGH-level output voltage


OCR Scan
PDF 74LS192 74LS193 LS192, LS193 32MHz IC 74LS192 ic 74193 74193 state diagram 74193 pin configuration ic 74192 pin configuration 74192 ic 74192 pin diagram of counter ic 74193 74192 ic of ic 74ls193
74LS192 PIN diagram

Abstract: 74LS192D 74192PC 74LS192PC pin configurations of 74LS192 BCD counter 74LS192 INTERNAL DIAGRAM 74 LS 193 n 74LS192 table 74192 74LS192P
Text: 192 54/74192 ^ 54LS/ 74LS192 0 I o UP/DOWN DECADE COUNTER (With Separate Up/Down Clocks) DESCRIPTION —The '192 is an up/down BCD decade (8421) counter. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronous with the LOW-to-HIGH transitions on the clock inputs. Separate Terminal Count Up and Terminal Count Down outputsare provided which are used as the clocks for a subsequent stage without extra logic


OCR Scan
PDF 54LS/74LS192 54/74LS 74LS192 PIN diagram 74LS192D 74192PC 74LS192PC pin configurations of 74LS192 BCD counter 74LS192 INTERNAL DIAGRAM 74 LS 193 n 74LS192 table 74192 74LS192P
74ALS192

Abstract: IC 74LS192 LS192 ALS192 MODULO-16 DV74LS192 DV74LS192-93 LS193
Text: AVG Semiconductors Technical Data DDT Synchronous Up/Down Decade and Binary Counters with CLEAR The 74LS192 / 74ALS192 is an UP/DOWN BCD Decade (8421) Counter and the 74LS/ALS193 is an UP/DOWN MODULO-16 Binary Counter. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The out puts change state synchronous with the LOW-to-HIGH transitions on the clock inputs. Separate Terminal Count Up and Terminal Count Down outputs are provided which


OCR Scan
PDF 74LS192 74ALS192 74LS/ALS193 MODULO-16 clock92-93, DV74ALS192-93 1-800-AVG-SEMI LS192, ALS192, LS192 IC 74LS192 ALS192 DV74LS192 DV74LS192-93 LS193
IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Text: 74LS183 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A 74LS196 74LS197 74LS240 74LS241 74LS244 74LS251 , 74LS183 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A 74LS196A 74LS197 74LS240 74LS241 74LS244 74LS251


OCR Scan
PDF
FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Text: 74LS191 74LS192 74HC192 74LS193 74HC193 74LS194 74LS195 74LS197 74LS221 74LS240 74LS241 74LS242 , 74LS191 74LS192 74LS193 74LS194 74LS195 74LS197 74LS20 74LS21 74LS22 74LS221 74LS240 74LS241


Original
PDF 74INTEGRATED Line-to-10 150ns 16-DIL 150ns 18-pin 250ns 300ns FZH115B fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
TC74HC192P

Abstract: No abstract text available
Text: with 74LS192 /193 ABSOLUTE MAXIMUM RATINGS PARAMETER Supply Voltage Range SYMBOL VCC VALUE


OCR Scan
PDF 10172va TC74HC192P/F TC74HC193P/F TC74HC192P/F TC74HC193P/F TC74HC192 TC74HC193 T-45-23-09 TC74HC192P
74LS82

Abstract: 74LS176 74LS94 74LS286 74ls150 74LS177 74LS116 74ls198 7400 TTL 74ls521
Text: 74LS173A 74LS174 74LS175 74LS176 74LS177 74LS179 74LS182 74LS183 74LS190 74LS191 74LS192 74LS193 74LS194


OCR Scan
PDF
74192 internal diagram

Abstract: 74192FC 74LS192P 74LS192DC 74LS192 INTERNAL DIAGRAM 74192 counter
Text: 1 NATIONAL SEMICOND -CLOGIO DEE D | b S D U B S _ ~ T - 9 5 3 -o 9 DDbBiei 5 | 192 CO NN ECTIO N DIAGRAM PINO UT A 54/74192 54LS / 74LS192 UP/DOWN DECADE COUNTER (With Separate U p/D ow n Clocks) DESCRIPTION - The '192 is an up/down BCD decade (8421) counter. Sepa rate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronous with the LOW -to-HIGH transitions on the clock


OCR Scan
PDF /74LS192 LSD112E 54/74LS 74192 internal diagram 74192FC 74LS192P 74LS192DC 74LS192 INTERNAL DIAGRAM 74192 counter
74L193

Abstract: SN74L193 LS 7313 - S SN741S193 ic 74192 SN54119 sn74l192 SN741S2 LS 7313 S SJ74193
Text: a 0 20 40 20 0 -5 5 125 4 .6 NOM 5 M AX S.5 - 400 4 25 0 20 40 20 0 M IN 4 .7 5 SN 74LS192 SN 74LS , , 2 0.7 - 1 .5 TYPÍ M AX 2 0 .8 - 1 .5 SN 74LS192 SN 74LS1B3 M IN TYPÍ M AX V V V U N IT 0 ·c


OCR Scan
PDF SKS4192. SN54193, SW54L192. SN54L SN54LS192, SN54LS193 SJ74193, SH74LW2. SN74L193, SN74LS192, 74L193 SN74L193 LS 7313 - S SN741S193 ic 74192 SN54119 sn74l192 SN741S2 LS 7313 S SJ74193
74LS167

Abstract: F199 transistor 74LS382 74LS514 74LS76A 74LS183 transistor b1100 74ls171 74LS204 F199
Text: Number Comprexityt Cell2 Propagation Delay Max. Number of Signal Pins Output Options Supply ^Voltage , supply and ground pins , 6: Two speed versions, standard and high speed (H-version), available. PACKAGE , between the input and output pins of the circuit. This assures that the computerized layout for the , 74LS183 22 26 F190 74LS190 71 85 F191 74LS191 68 82 F192 74LS192 62 74 F193 74LS193 58 74 F194


OCR Scan
PDF 74LS181 74LS183 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A 74S260 74LS261 74LS167 F199 transistor 74LS382 74LS514 74LS76A transistor b1100 74ls171 74LS204 F199
2006 - 74LS193 truth table

Abstract: LS192 74LS192 truth table
Text: SN74LS192 PRESETTABLE BCD/DECADE UP/DOWN COUNTER PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER The SN54/ 74LS192 is an UP/DOWN BCD Decade (8421) Counter and the SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. The outputs change state synchronous with the LOW-to-HIGH transitions on the clock inputs. Separate Terminal Count Up and Terminal Count Down outputs are provided which are used as the clocks for a


Original
PDF SN74LS192 SN54/74LS192 SN54/74LS193 MODULO-16 SN74LS192/D 74LS193 truth table LS192 74LS192 truth table
74191, 74192, 74193 circuit diagram

Abstract: Truth Table 74161 IC 7402, 7404, 7408, 7432, 7400 counter schematic diagram 74161 7408, 7404, 7486, 7432 74244 uses and functions 74191, 74192, 74193 counter 74168 truth table of ic 7495 A schematic diagram for the IC of 7411
Text: Function 74LS190 74LS191 74LS192 74LS193 74LS194A 74LS195A 74LS196 74LS197 74LS240 74LS241 74LS244 74LS251 , ., latches, flip-flops, and pins ) w ithin Altera EPLD s. Together, these features make it easy to im plem ent , specific chip assignments for flip-flops and pins in the source design files. After partitioning, the


OCR Scan
PDF HP400 QIC-24, 60-Mbytetape 74191, 74192, 74193 circuit diagram Truth Table 74161 IC 7402, 7404, 7408, 7432, 7400 counter schematic diagram 74161 7408, 7404, 7486, 7432 74244 uses and functions 74191, 74192, 74193 counter 74168 truth table of ic 7495 A schematic diagram for the IC of 7411
Supplyframe Tracking Pixel