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Part Manufacturer Description Datasheet Download Buy Part
SN74LS137D Texas Instruments 3-line to 8-line decoder / demultiplexer with address latches 16-SOIC 0 to 70
SN74LS137DR Texas Instruments 3-line to 8-line decoder / demultiplexer with address latches 16-SOIC 0 to 70
SN74LS137N Texas Instruments 3-line to 8-line decoder / demultiplexer with address latches 16-PDIP 0 to 70
SN74LS137FNR Texas Instruments LS SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PQCC20
SN74LS137J Texas Instruments 3-line to 8-line decoder / demultiplexer with address latches 16-CDIP 0 to 70
SN74LS137FN Texas Instruments LS SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PQCC20

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74LS137D Texas Instruments ComS.I.T. - -
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74LS137N Chip One Exchange - -
74LS137N Rochester Electronics - -
SN74LS137D Texas Instruments Rochester Electronics 1,486 $0.96 $0.78
SN74LS137D Texas Instruments Avnet 0 $1.49 $1.29
SN74LS137D Rochester Electronics - -
SN74LS137DR2 Rochester Electronics - -
SN74LS137J Rochester Electronics - -
SN74LS137JD Rochester Electronics - -
SN74LS137JDS Rochester Electronics - -
SN74LS137JS Rochester Electronics - -
SN74LS137N Motorola Semiconductor Products Chip One Exchange - -
SN74LS137N Rochester Electronics - -
SN74LS137N Rochester Electronics LLC Avnet - -
SN74LS137N Motorola Semiconductor Products Bristol Electronics 57 $1.69 $0.63
SN74LS137N Texas Instruments Chip One Exchange - -
SN74LS137N3 Texas Instruments Chip One Exchange - -
SN74LS137ND Motorola Semiconductor Products Bristol Electronics 425 $1.69 $0.47
SN74LS137ND Rochester Electronics - -
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74LS137 datasheet (2)

Part Manufacturer Description Type PDF
74LS137 Motorola 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES Original PDF
74LS137 Texas Instruments 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES Original PDF

74LS137 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
74ls137

Abstract:
Text: MOTOROLA SN54/ 74LS137 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES DATA OUTPUTS V cc YO Y1 Y2 Y3 Y4 Y5 Y6 LOW POWER SCHOTTKY Y ï T T ; A Y0 A B Y1 Y2 Y3 Y4 Y5 Y6 J SUFFIX C E R A M IC C A SE 620-09 , Low 8.0 FAST AND LS TTL DATA 5-127 SN54/ 74LS137 FUNCTION TABLE INPUTS ENABLE GL X X L L L , to stored address, L; all others, H FAST AND LS TTL DATA 5-128 SN54/ 74LS137 DC


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PDF SN54/74LS137 74ls137 ic 74ls137
74LS137

Abstract:
Text: <8> M O TO R O LA SN54/ 74LS137 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES DATA OUTPUTS VCC YÛ Y1 Y2 Y3 Y4 Y5 Y6 LOW POWER SCHOTTKY pisi |~ i? 1 |~ ÌT | H T ! fiil f ~ M ~ | [ ~ iÖ 1 [~ 9 ~ | YO Y1 Y2 Y3 Y4 Y5 , Output Current - High Output Current - Low mA mA FAST AND LS TTL DATA 5-127 SN54/ 74LS137 , SN54/ 74LS137 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified


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PDF SN54/74LS137 751B-03 SN54LSXXXJ SN74LSXXXN SN74LSXXXD 74LS137 aag2
74LS137

Abstract:
Text: SN54/ 74LS137 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES 3-LINE TO 8-LINE DECODERS/ DEMULTIPLEXERS WITH ADDRESS LATCHES LOW POWER SCHOTTKY DATA OUTPUTS VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 16 15 14 13 12 11 10 9 Y0 Y1 Y2 Y3 Y4 , 4.0 8.0 mA FAST AND LS TTL DATA 5-225 SN54/ 74LS137 FUNCTION TABLE INPUTS OUTPUTS , Y7 (5) G2 (6) G1 FAST AND LS TTL DATA 5-226 SN54/ 74LS137 DC CHARACTERISTICS OVER


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PDF SN54/74LS137 751B-03 SN54LSXXXJ SN74LSXXXN SN74LSXXXD 74LS137 751B-03 M 5229 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
1996 - 74LS137

Abstract:
Text: SN54/ 74LS137 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES 3-LINE TO 8-LINE DECODERS/ DEMULTIPLEXERS WITH ADDRESS LATCHES LOW POWER SCHOTTKY DATA OUTPUTS VCC 16 Y0 Y1 Y2 Y3 Y4 Y5 Y6 15 14 13 12 11 10 9 Y0 Y1 Y2 Y3 Y4 , DATA 5-1 SN54/ 74LS137 FUNCTION TABLE INPUTS OUTPUTS ENABLE SELECT GL G1 G2 C , Y6 Y7 DATA OUTPUTS SN54/ 74LS137 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE


Original
PDF SN54/74LS137 751B-03 SN54LSXXXJ SN74LSXXXN SN74LSXXXD 74LS137 16y0y1 diode high voltage Y5 SN54LSXXXJ SN74LSXXXD SN74LSXXXN TTL 74ls137 Y4 DIODE
74LS137

Abstract:
Text: <8> MOTOROLA SN54/ 74LS137 D A T A O U T PU T S / Y0 Y1 Y2 Y3 Y4 YS Y6 ^ V CC f61 £¡1 Fyi YO A B C Y1 FI R I Y2 Y3 FH R Y4 Y5 Y6 fT | 3-UNE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS LATCHES LOW POWER SC HO TTK Y GL 53 GJ Y7 TTTTTT " V" SELECT Cy x 6 l 53 G îy Y7 GND "V " ENABLE J Suffix - Case 620-09 (Ceramic) N Suffix - Case , V 'os Ice Vcc = MAX V CC = M A X FAST AND US TTL DATA SN54/ 74LS137 FUNCTION TABLE


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PDF SN54/74LS137 74LS137
74LS137

Abstract:
Text: maintaining full function and pin compatibility with the 74LS137. Speeds are comparable to the low power , SP74SC137 SPI DECODER/DEMULTIPLEXER FEATURES ■Designed for high performance memory decoders in microprocesor systems ■3 to 8 line decoders 3 enable inputs and inverted outputs with latches ■Pin compatible with 74LS137 ■SPI CMOS technology ■Full TTL interface capability ■High noise immunity ■Low quiescent power dissipation GENERAL DESCRIPTION The SP74SC137 is


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PDF SP74SC137 74LS137 SP74SC137 74LS137. 74LS137 SP74SC137F SP74SC137N
74LS183

Abstract:
Text: CM O S/BiCM O S Gate Array LZ93/LZ95/LZ96/LZ97 Series 74LS Series Macro Cell Libraries (LZ93/LZ95/LZ96/LZ97 Series) Model No. 74LS00 74LS02 74LS04 74LS08 74LS10 74LS11 74LS20 74LS21 74LS27 74LS28 74LS30 74LS32 74LS37 74LS40 74LS42 7443 7444 74LS48 Model No. 74LS51 74LS54 74LS55 74LS73 74LS74 74LS75 74LS76 7447 74LS78 74LS83 74LS85 74LS86 74LS90 74LS91 74LS92 74LS93 74LS95 74LS97 Model No. 74LS107 74LS109 74LS112 74LS113 74LS114 74LS125 74LS126 74LS137 74LS138 74LS139 74LS147 74LS148 74LS151


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PDF LZ93/LZ95/LZ96/LZ97 74LS00 74LS02 74LS04 74LS08 74LS10 74LS11 74LS20 74LS21 74LS183 74LS275 74LS97 74ls series 74LS93 74LS356 74LS55 74LS396
74LS137

Abstract:
Text: Propagation Delays tpLH = tpHL Pin and Function compatible with 54/ 74LS137 PRODUCT PREVIEW « 1 B1 F1 C1


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PDF M54HCT137 M74HCT137 M54/74HCT137 74LS137 M74HCT137
Not Available

Abstract:
Text: voltage, V c c NOM S N 74LS137 M AX 5 5 .5 M IN NOM 4 .7 5 5 5.25 V jj A , u tp u t voltage Low -level o u tp u t voltage S N 74LS137 M AX 2 M IN TYP! V


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PDF SN54LS137, SN74LS137 LS137
dd127

Abstract:
Text: S · T T L ( 74LS137 ) and uses silicon gate process technology to achieve op eratin g speeds s im ila r to L S · T T L ( 74LS137 ). - All inputs are protected from dam age. A b s o l u t e M a x i m u m R


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PDF LC74HC137 74LS137) GQlE74b MLC74HC137 dd127
74LS137

Abstract:
Text: 4-100 SN54LS/ 74LS137 FUNCTION TABLE INPUTS ENABLE GL G1 G2 X X H H H H H H H H H H = high le vel


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PDF SN54LS137 SN74LS137 74LS137
Not Available

Abstract:
Text: ( 74LS137 ) a n d u ses silicon g a te process technology to ac h ie v e o p e r a tin g speeds s i m il a r to LS · T T L ( 74LS137 ). · All in p u ts a r e p ro te c te d fro m da m a g e . A b s o l u t e M a


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PDF GQ127H7 MLC74HC137M 74LS137) D01S7SD
54LS137

Abstract:
Text: 0 1 2 · D ALLAS . TEXAS 75 26 5 TTL Devices ]« J5 Y2 SN 54LS137, SN 74LS137 3-LINE TO 8 , 54LS137, SN 74LS137 3-LINE TO 8-LINE DECODERSfDEM ULTIPLEXERS W IT H ADDRESS LATCHES logic diagram


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PDF 54LS137, SN74LS137 54LS137 74LS137 Y561
74LS137

Abstract:
Text: V c c = MAX MOTOROLA SCHOTTKY TTL DEVICES SN54LS/ 74LS137 FUNCTION TABLE INPUTS ENABLE GL X X


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PDF SN54LS137 SN74LS137 74LS137
74hc137

Abstract:
Text: M54HC137 M74HC137 3 TO 8 LINE DECODER/LATCH (INVERTING) . . . . . . . . HIGH SPEED tPD = 11 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/ 74LS137 B1R (Plastic Package) F1R


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PDF M54HC137 M74HC137 54/74LS137 M54HC137F1R M74HC137M1R M74HC137B1R M74HC137C1R M54/74HC137 74hc137 HC137 M54HC137 M54HC137F1R M74HC137 m74hc137b1 M74HC137B1R M74HC137C1R M74HC137M1R
74hc137

Abstract:
Text: 57» SGS-THOMSON M54HC137 M74HC137 3 TO 8 LINE DECODER/LATCH (INVERTING) ■HIGH SPEED tpD = 14 ns (TYP.) at VCc= 5V ■LOW POWER DISSIPATION Ice = 4 /iA (MAX.) at TA = 25°C ■HIGH NOISE IMMUNITY VniH = VN|L = 28% Vcc (MIN.) ■OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■SYMMETRICAL OUTPUT IMPEDANCE MOHI = Iol = 4 mA (MIN.) ■BALANCED PROPAGATION DELAYS tpLH = tPHL ■WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2V to 6V ■PIN AND FUNCTION COMPATIBLE WITH 54/ 74LS137 DESCRIPTION


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PDF M54HC137 M74HC137 54/74LS137 M54/74HC137 M54/74HC137 74hc137 54HC 74HC HC137 M54HC137 M74HC137
74HCT137

Abstract:
Text: – PIN AND FUNCTION COMPATIBLE WITH 54/ 74LS137 C1 Plastic Chip Carrier ORDERING NUMBERS


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PDF M54HCT137 M74HCT137 54/74LS137 M54HCT137 M74HCT137 M54/74HCT137 M54/74HCT137 74HCT137 M74HCT13
TC74HCT137

Abstract:
Text: 74LS137_ ABSOLUTE MAXIMUM RATINGS PARAMETER Supply Voltage Range DC Input Voltage DC


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PDF TC74HCT137P/F TC74HCT137P/F TC74HCT137 Y4 diode
1994 - HC137

Abstract:
Text: M54HCT137 M74HCT137 3 TO 8 LINE DECODER/LATCH (INVERTING) . . . . . . . HIGH SPEED tPD = 17 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/ 74LS137 DESCRIPTION The M54/74HCT137 is a high speed CMOS3TO8LINE DECODER


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PDF M54HCT137 M74HCT137 54/74LS137 M54/74HCT137 HC137 ic 74ls137 M54HCT137 M54HCT137F1R M74HCT137 M74HCT137B1R M74HCT137C1R M74HCT137M1R
HC137

Abstract:
Text: M54HCT137 M74HCT137 3 TO 8 LINE DECODER/LATCH (INVERTING) . . . . . . . HIGH SPEED tPD = 17 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/ 74LS137 DESCRIPTION The M54/74HCT137 is a high speed CMOS3TO8LINE DECODER


Original
PDF M54HCT137 M74HCT137 54/74LS137 M54/74HCT137 HC137 M54HCT137 M54HCT137F1R M74HCT137 M74HCT137B1R M74HCT137C1R M74HCT137M1R
74LS82

Abstract:
Text: 74LS116 74LS125 74LS125A 74LS126 74LS126A 74LS133 74LS137 74LS138 74LS139 74LS139A 74LS147 74LS148 74LS150


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PDF
Not Available

Abstract:
Text: patible with 74LS137 PIN A S S I G N M E N T A B C GL G2 G1 Y7 GND 1[ 2[ 3[ 4[ 5[ 6[ 7[ -


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PDF TC74HC137AP/AF TC74HC137A
Not Available

Abstract:
Text: Package) C1R (Chip Carrier) tPLH = tPHL ■PIN AND FUNCTION COMPATIBLE WITH 54/ 74LS137


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PDF 74HCT137 54/74LS137 T137F1R 74HCT137M T137B1R T137C M54/74HCT137 7R2R237 00545M2 M54/M74HCT137
1994 - HC137

Abstract:
Text: M54HC137 M74HC137 3 TO 8 LINE DECODER/LATCH (INVERTING) . . . . . . . . HIGH SPEED tPD = 11 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/ 74LS137 B1R (Plastic Package) F1R


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PDF M54HC137 M74HC137 54/74LS137 M54HC137F1R M74HC137M1R M74HC137B1R M74HC137C1R M54/74HC137 HC137 M54HC137 M54HC137F1R M74HC137 M74HC137B1R M74HC137C1R M74HC137M1R
G1.L

Abstract:
Text: „ SGS-THOMSON M54HCT137 ^Dtg^OtltLiOTOtROÖigi M74HCT137 3 TO 8 LINE DECODER/LATCH ■LOW POWER DISSIPATION ICC = 4 (MAX.) at TA = 25°C ■HIGH NOISE IMMUNITY VniH = VNIL = 28% Vcc (MIN.) ■OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■SYMMETRICAL OUTPUT IMPEDANCE IIOHI = "OL = 4 mA (MIN.) ■BALANCED PROPAGATION DELAYS tPLH = tPHL ■PIN AND FUNCTION COMPATIBLE WITH 54/ 74LS137 DESCRIPTION The M54/74HCT137 is a high speed CMOS 3 TO 8 LINE DECODER/LATCH fabricated in silicon gate C2MOS


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PDF M54HCT137 M74HCT137 54/74LS137 M54/74HCT137 M54/74HCT137 /150V. G1.L 54HC 74HC 74hct137 M54HCT137 M74HCT137
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