74HCT112DB
Philips Semiconductors
dual JK flip-flop with set and reset negative-edge trigger
Original
PDF
74HCT112DB
Unknown
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.
Scan
PDF
74HCT112DB,112
NXP Semiconductors
dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger; TTL Enabled ; Fmax : 70 MHz; Logic switching levels: TTL ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 19 ns; Voltage: 4.5-5.5V; Package: SOT338-1 (SSOP16); Container: Tube
Original
PDF
74HCT112DB,118
NXP Semiconductors
dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger; TTL Enabled ; Fmax : 70 MHz; Logic switching levels: TTL ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 19 ns; Voltage: 4.5-5.5V; Package: SOT338-1 (SSOP16); Container: Reel Pack, SMD, 13"
Original
PDF
74HCT112DB-T
NXP Semiconductors
dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger; TTL Enabled ; Fmax : 70 MHz; Logic switching levels: TTL ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 19 ns; Voltage: 4.5-5.5V
Original
PDF
74HCT112DB-T
Unknown
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.
Scan
PDF