74HCT112DB-T Search Results
74HCT112DB-T Datasheets (2)
Part | ECAD Model | Manufacturer | Description | Curated | Type | |
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74HCT112DB-T |
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dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger; TTL Enabled ; Fmax: 70 MHz; Logic switching levels: TTL ; Output drive capability: +/- 4 mA ; Power dissipation considerations: Low Power ; Propagation delay: 19 ns; Voltage: 4.5-5.5V | Original | |||
74HCT112DB-T |
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Scan |