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Top Results (4)

Part Manufacturer Description Datasheet Download Buy Part
SN74HCT138D-00 Texas Instruments HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
CD74HCT138M96E4 Texas Instruments HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, GREEN, PLASTIC, MS-012AC, SOIC-16
SN74HCT138DTG4 Texas Instruments HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16, GREEN, PLASTIC, SOIC-16
SN74HCT138PWLE Texas Instruments 3-Line To 8-Line Decoders/Demultiplexers 16-TSSOP -40 to 85

74HC-HCT138 datasheet (2)

Part Manufacturer Description Type PDF
74HC/HCT138 Philips Semiconductors 3-to-8 line decoder/demultiplexer Original PDF
74HC-HCT138 Philips Semiconductors 3-to-8 line decoder-demultiplexer inverting Original PDF

74HC-HCT138 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1997 - HCT138

Abstract: 74HC-HCT138 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC 74HCT 5 to 32 line decoder 74HC DEmultiplexer mlb312 5 to 32 demultiplexer
Text: · The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/ HCT138 3-to-8 line decoder , / HCT138 The 74HC/ HCT138 decoders accept three binary weighted address inputs (A0, A1, A2) and when , permanently tied to their appropriate active HIGH or LOW state. GENERAL DESCRIPTION The 74HC/ HCT138 are , Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting 74HC/ HCT138 PIN , /demultiplexer; inverting 74HC/ HCT138 FUNCTION TABLE INPUTS OUTPUTS E1 E2 E3 A0 A1 A2


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PDF 74HC/HCT/HCU/HCMOS 74HC/HCT138 74HC/HCT138 HCT138 74HC-HCT138 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC 74HCT 5 to 32 line decoder 74HC DEmultiplexer mlb312 5 to 32 demultiplexer
2004 - 74hc138d

Abstract: marking code E3 SMD ic hct138 74HC138N 74HCT138N 74HC138PW-T 74HC138PW 74HC138D-T 74HC138DB-T 74hc138bq
Text: · The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/ HCT138 3-to-8 line decoder , DESCRIPTION The 74HC/ HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. 74HC/ HCT138 The 74HC/ HCT138 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 , voltage 74HC/ HCT138 handbook, halfpage 1 2 3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 15 14 13 12 11 10 9


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PDF 74HC/HCT/HCU/HCMOS 74HC/HCT138 74hc138d marking code E3 SMD ic hct138 74HC138N 74HCT138N 74HC138PW-T 74HC138PW 74HC138D-T 74HC138DB-T 74hc138bq
2002 - NAU000

Abstract: 5 to 32 line decoder block diagram 74HC138N 74hc138d HCT138 selector guide 74HC 74HCT FAMILY smd code marking e3 74HC138DB package marking y6 SMD MARKING E1
Text: · The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/ HCT138 3-to-8 line decoder , DESCRIPTION The 74HC/ HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. 74HC/ HCT138 The 74HC/ HCT138 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 , voltage 74HC/ HCT138 handbook, halfpage 1 2 3 A0 A1 A2 Y0 Y1 Y2 Y3 Y4 15 14 13 12 11 10 9


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PDF 74HC/HCT/HCU/HCMOS 74HC/HCT138 01-Mar-98) 01-Nov-97) NAU000 5 to 32 line decoder block diagram 74HC138N 74hc138d HCT138 selector guide 74HC 74HCT FAMILY smd code marking e3 74HC138DB package marking y6 SMD MARKING E1
2012 - 74HC138

Abstract: related circuit of 74HC138 001aae059 74HC-HCT138 74HC138 using for testing equipment hct138 74hc138bq hct138d 74HC138N 74HC138DB
Text: diagram 74HC_ HCT138 All information provided in this document is subject to legal disclaimers , Fig 5. Pin configuration DHVQFN16 74HC_ HCT138 All information provided in this document is , mA mA °C 74HC_ HCT138 All information provided in this document is subject to legal disclaimers , V V V V V V Typ Max Tamb = -40 °C to +85 °C Min Max Tamb = -40 °C to Unit +125 °C Min Max 74HC_ HCT138 , current - 8.0 - 80 - 160 A 74HC_ HCT138 All information provided in this


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PDF 74HC138; 74HCT138 74HCT138 74HC138 related circuit of 74HC138 001aae059 74HC-HCT138 74HC138 using for testing equipment hct138 74hc138bq hct138d 74HC138N 74HC138DB
2012 - Not Available

Abstract: No abstract text available
Text: 5 E2 6 mna370 ENABLE EXITING E3 mna372 Fig 1. Logic symbol 74HC_ HCT138 , DIP16, SO16, SSOP16 and TSSOP16 74HC_ HCT138 Product data sheet 001aae060 Transparent top , storage temperature −65 +150 °C 74HC_ HCT138 Product data sheet All information , input voltage V LOW-level input voltage 74HC_ HCT138 Product data sheet 3.15 2.4 - , - 8.0 - 80 - 160 VOL 74HC_ HCT138 Product data sheet - All information


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PDF 74HC138; 74HCT138 74HCT138
HCT138

Abstract: 74HC-HCT138 74HC 74HCT
Text: 74HC/ HCT138 MSI 3-TO-8 LINE DECODER/DEMULTIPLEXER; INVERTING FEATURES • Demultiplexing capability , DESCRIPTION The 74HC/ HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/ HCT138 decoders , Material Copyrighted By Philips Semiconductors. 74HC/ HCT138 MSI 3-to-B DECOOER ENABLE EXITING J6. M_ 13 , -to-8 line decoder/demultiplexer; inverting 74HC/ HCT138 MSI DC CHARACTERISTICS FOR 74HC For the DC


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PDF 74HC/HCT138 7Z93233 HCT138 74HC-HCT138 74HC 74HCT
2005 - 74HC_HCT138

Abstract: 74HC138 data sheet 74HC138 EQUIVALENT 74HCT138 hct138d 74HC138DB 74HC138N 74HC138 philips 74HC138PW 74HCT138
Text: ; 16 terminals; body 2.5 × 3.5 × 0.85 mm 74HC138 74HC_ HCT138 _3 Product data sheet , E1 5 E2 6 mna370 ENABLE EXITING E3 mna372 Fig 1. Logic symbol 74HC_ HCT138 , 001aae061 Fig 4. Pin configuration DIP16, SO16, SSOP16 and TSSOP16 74HC_ HCT138 _3 Product data , ; X = don't care. 74HC_ HCT138 _3 Product data sheet © Koninklijke Philips Electronics N.V , = 4.5 V 74HC_ HCT138 _3 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All


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PDF 74HC138; 74HCT138 74HCT138 74HC_HCT138 74HC138 data sheet 74HC138 EQUIVALENT 74HCT138 hct138d 74HC138DB 74HC138N 74HC138 philips 74HC138PW
2005 - 74HC138

Abstract: hct138d HCT138 74HC138D 74HC138 philips 74HC138N 74HC138PW 74HC138DB 74HCT138 74HCT138N
Text: terminals; body 2.5 × 3.5 × 0.85 mm 74HC138 74HC_ HCT138 _3 Product data sheet © Koninklijke , EXITING E3 mna372 Fig 1. Logic symbol 74HC_ HCT138 _3 Product data sheet Fig 2. Functional , ambient temperature -40 +25 +125 °C tr, tf Product data sheet 4.5 VI 74HC_ HCT138 , mA; VCC = 6 V Product data sheet - 4.4 IO = -20 µA; VCC = 6.0 V 74HC_ HCT138 _3 1.9 , quiescent supply current VCC = 6.0 V; IO = 0 A; VI = VCC or GND 74HC_ HCT138 _3 Product data sheet


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PDF 74HC138; 74HCT138 74HCT138 74HC138 hct138d HCT138 74HC138D 74HC138 philips 74HC138N 74HC138PW 74HC138DB 74HCT138N
2005 - 74HC138

Abstract: hct138d 74HCT138 74HC138D 74HC138DB 74HC138N 74HC138PW MNA370 74HC-HCT138 74HC138 philips
Text: terminals; body 2.5 × 3.5 × 0.85 mm 74HC138 74HC_ HCT138 _3 Product data sheet © Koninklijke , EXITING E3 mna372 Fig 1. Logic symbol 74HC_ HCT138 _3 Product data sheet Fig 2. Functional , ambient temperature -40 +25 +125 °C tr, tf Product data sheet 4.5 VI 74HC_ HCT138 , µA pin E3 - - 450 µA 74HC_ HCT138 _3 Product data sheet © Koninklijke Philips , pin En - - 612.5 µA pin E3 - - 490 µA 74HC_ HCT138 _3 Product data


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PDF 74HC138; 74HCT138 74HCT138 74HC138 hct138d 74HC138D 74HC138DB 74HC138N 74HC138PW MNA370 74HC-HCT138 74HC138 philips
HCT138

Abstract: 74HC-HCT138 hct138m
Text: 74HC/ HCT138 M SI 3-TO-8 L IN E D E C O D E R / D E M U L T IP L E X E R ; IN V E R T IN G FEA , 74HC/ HCT138 M SI 7293230 F ig . 4 F u n c t io n a l d ia g ra m . F U N C T IO N T A B L E , 276 S eptem ber 1993 3-to-8 line decoder/demultiplexer; inverting 74HC/ HCT138 M SI , September 1993 277 74HC/ HCT138 M SI D C C H A R A C T E R IS T IC S F O R 7 4 H C T For the DC , 74HC/ HCT138 M SI F ig . 7 W a v e fo rm s s h o w in g th e e n a b le in p u t ( E n ) to o u t p u


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PDF 74HC/HCT138 typ20 HCT138 74HC-HCT138 hct138m
ic 74HC138

Abstract: No abstract text available
Text: these inputs determine which one of the eight normally high outputs of the HC/ HCT138 series w ill go , d , all vo lta g es a re referenced to G rou n d . TERMINAL ASSIGNMENT FOR HC/ HCT138 FOR HC , Address to O utput (Fig. 3) Propagation Delay, Enable to O utput (Fig. 3) HC/ HCT138 Propagation Delay


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PDF CD54/74HC138, CD54/74HCT138 CD54/74HC238, CD54/74HCT238 CD54/74HC138 CD54/74HCT138 54/74HC 54/74HCT ic 74HC138
74hc

Abstract: SOT27-1 sot27 SOT109-1 SOT163-1 SOT402-1 SOT360-1 SOT38 SOT339-1 1/CN0944
Text: -1 SOT337-1 SOT402-1 74HC/HCT137 16 SOT38-4 SOT109-1 SOT338-1 SOT403-1 74HC/ HCT138


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PDF 74HC/HCT00 OT27-1 OT108-1 OT337-1 OT402-1 74HC/HCT02 74hc SOT27-1 sot27 SOT109-1 SOT163-1 SOT402-1 SOT360-1 SOT38 SOT339-1 1/CN0944
5 to 32 decoder using 4 t0 16 decoders

Abstract: 74HC-HCT138
Text: decoder/demultiplexer; inverting j 74HC/ HCT138 _ DC C H A R A C T E R IS T IC S FO R


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PDF CT138 7Z93233 5 to 32 decoder using 4 t0 16 decoders 74HC-HCT138
74LV138

Abstract: 74LV138D 74LV138DB 74LV138N 74LV138PW
Text: / HCT138 . The 74LV138 accepts three binary weighted address inputs (A0, A„ /y and when enabled, provide


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PDF 74LV138 74LV138 74HC/HCT138. 711062b 74LV138D 74LV138DB 74LV138N 74LV138PW
74LV138

Abstract: 74LV138D 74LV138DB 74LV138N 74LV138PW
Text: 74LV138 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/ HCT138 . The


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PDF 74LV138 74HC/HCT138. 711002b 0D755b3 74LV138D 74LV138DB 74LV138N 74LV138PW
dil16

Abstract: 74LV138 74LV138D 74LV138N 74HC DEmultiplexer
Text: and function compatible with 74HC/ HCT138 . The 74LV138 accepts three binary weighted address inputs


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PDF 74LV138 74LV138 74HC/HCToder/demultiplexer; dil16 74LV138D 74LV138N 74HC DEmultiplexer
CD74HCT138/238

Abstract: No abstract text available
Text: – Ÿ5 a GN O — 1 -ÍV 6 92CS TERMINAL ASSIGNMENT FOR HC/ HCT138 FOR HC/HCT23S ALL Y1


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PDF CD54/74HC138, CD54/74HCT138 CD54/74HC238, CD54/74HCT238 4302E71 54/74H CD54/74HCT138 54/74HC 54/74HC S4/74HC CD74HCT138/238
Not Available

Abstract: No abstract text available
Text: g e s a re re fe r e n c e d to G r o u n d . P vcc TERMINAL ASSIGNMENT FOR HC/ HCT138 FOR H C


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PDF CD54/74HC138, CD54/74HCT138 CD54/74HC238, CD54/74HCT238 54/74HCT 54/74HC
1984 - Not Available

Abstract: No abstract text available
Text: information The ' HCT138 devices are designed for high-performance memory-decoding or data-routing , SNJ54HCT138J SNJ54HCT138W HT138 HCT138 HCT138 TOP-SIDE MARKING SN74HCT138N LCCC - FK Tube of 55 , SN54HCT138J HCT138 HCT138 HCT138 HCT138 HCT138 HCT138 HCT138 HCT138 HCT138 SN74HCT138N 8550401EA 8550401FA , SN74HCT138N HCT138 HCT138 HCT138 HT138 HT138 HT138 HT138 HT138 HT138 HT138 HT138 HT138 85504012A SNJ54HCT


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PDF SN54HCT138, SN74HCT138 SCLS171E SN54HCT138 HCT138
2003 - Not Available

Abstract: No abstract text available
Text: internal connection description/ordering information The ’ HCT138 devices are designed for , C SN74HCT138N HCT138 HCT138 HT138 LCCC − FK Tube of 55 SNJ54HCT138FK SNJ54HCT138FK , 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 , -1-260C-UNLIM -40 to 85 HCT138 SN74HCT138DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 SN74HCT138DR ACTIVE SOIC D 16


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PDF SN54HCT138, SN74HCT138 SCLS171E SN54HCT138
2003 - SN74HCT138N

Abstract: HT138
Text: internal connection description/ordering information The ’ HCT138 devices are designed for , C SN74HCT138N HCT138 HCT138 HT138 LCCC − FK Tube of 55 SNJ54HCT138FK SNJ54HCT138FK , HCT138 SN74HCT138DE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 SN74HCT138DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 SN74HCT138DR ACTIVE


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PDF SN54HCT138, SN74HCT138 SCLS171E SN54HCT138 SN74HCT138N HT138
1984 - Not Available

Abstract: No abstract text available
Text: internal connection description/ordering information The ’ HCT138 devices are designed for , C SN74HCT138N HCT138 HCT138 HT138 LCCC − FK Tube of 55 SNJ54HCT138FK SNJ54HCT138FK , HCT138 SN74HCT138DE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 SN74HCT138DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HCT138 SN74HCT138DR ACTIVE


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PDF SN54HCT138, SN74HCT138 SCLS171E SN54HCT138
1997 - hct138

Abstract: HC238 HC138 Harris texas instruments ttl data book
Text: VOL, VOH Description The 'HC138, 'HC238, ' HCT138 , and 'HCT238 are high speed silicon gate CMOS , , these inputs determine which one of the eight normally high outputs of the HC/ HCT138 series will go low , and ' HCT138 . Functional Diagram HC/HCT HC/HCT 238 138 A0 A1 3 A2 12 Y3 4 E1 5 E2 E3 6 9 Y6 7 Y7 Y7 Y6 10 Y5 Y5 11 Y4 Y4 Y3 13 Y2 Y2 1 2 15 14 Y0 Y1 Y0 Y1 TRUTH TABLE 'HC138, ' HCT138 INPUTS ENABLE , TYPES Propagation Delay Address to Output tPLH, tPHL CL = 50pF CL = 15pF Enable to Output HC/ HCT138


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PDF CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 SCHS147E CD54HC138F CD54HC138F3A CD74HC138E CD74HC138M CD74HC138M96 hct138 HC238 HC138 Harris texas instruments ttl data book
74LV238

Abstract: 74LV138 74LV138PW SV00524
Text: device that is pin and function compatible with 74HC/ HCT138 . The 74LV138 accepts three binary weighted


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PDF 74LV138 SQT403-1 MO-153 74LV238 74LV138 74LV138PW SV00524
1997 - HC138

Abstract: 74HCT238 74HC138 SCHS147I CD74HC138M CD74HC138E CD54HCT238F3A CD54HCT138F3A CD54HC238F3A CD54HC138F3A
Text: , ' HCT138 , and 'HCT238 are high-speed silicon-gate CMOS decoders well suited to memory address decoding or , normally high outputs of the HC/ HCT138 series go low or which of the normally low outputs of the HC , names in parentheses are for 'HC138 and ' HCT138 . TRUTH TABLE 'HC138, ' HCT138 INPUTS ENABLE ADDRESS , 19 - 22 ns 6 tPLH, tPHL CL = 50pF TYP 4.5 Enable to Output HC/ HCT138 MIN , Propagation Delay Address to Output tPLH, tPHL CL = 50pF CL = 15pF Enable to Output HC/ HCT138 tPLH


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PDF HC138 HCT13 HC238 HCT23 CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 SCHS147I CD54HC138F3A HC138 74HCT238 74HC138 SCHS147I CD74HC138M CD74HC138E CD54HCT238F3A CD54HCT138F3A CD54HC238F3A CD54HC138F3A
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