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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
SN74196N-00 Texas Instruments TTL/H/L SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, PDIP14
SN74196J-00 Texas Instruments TTL/H/L SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, CDIP14
SN74196N-10 Texas Instruments TTL/H/L SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, PDIP14
SN74196J Texas Instruments TTL/H/L SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, CDIP14, CERAMIC, DIP-14
SN74196N Texas Instruments Asynchronous decade counters 14-PDIP 0 to 70
TTL-LOGIC-DATABOOK Texas Instruments TTL-LOGIC-DATABOOK

74196 TTL Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
pin diagram decade counter 74196

Abstract: 74196 TTL pin diagram of 74196 74197 74196 Truth Table 74197 ttl 74196 93197 TTL 74197 Truth+Table+74196
Text: TTL /MSI 93196/54196, 74196 93197/54197, 74197 HIGH SPEED DECADE AND BINARY COUNTER DESCRIPTION - The 93196/54196, 74196 and 93197/54197, 74197 High Speed Counters will provide either a divide-by-two and a divide-by-five counter (93196/54196, 74196 ) or a divide-by-two and a divide-by-eight counter , measured with all inputs grounded and all outputs open. 8-298 HIGH SPEED TTL /MSI . 93196/54196, 74196 â , +5.0 mA -0.5 V to +Vcc va|ue +30 mA 8-299 HIGH SPEED TTL /MSI . 93196/54196, 74196 • 93197/54197


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74196

Abstract: No abstract text available
Text: data sheet of the same number for guaranteed specification limits. Document Number: 74196 S , . Guaranteed by design, not subject to production testing. www.vishay.com 2 Document Number: 74196 S , DATA (TJ=25°C UNLESS OTHERWISE NOTED) Document Number: 74196 S-61150Rev. A, 26


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PDF Si1472DH 18-Jul-08 74196
2004 - MAX 77697

Abstract: 80688 MAX+77697
Text: 1.8 2.0 2.2 2.5 2.8 3.0 3.2 3.5 3.8 4.0 4.2 4.5 4.8 5.0 722.30 726.55 730.54 734.40 738.19 741.96 , 825.40 828.67 722.30 726.55 730.54 734.40 738.19 741.96 745.73 749.53 753.37 757.24 761.14 765.06 769.02


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PDF ROS-EDR5301 MAX 77697 80688 MAX+77697
ic 7483 BCD adder

Abstract: Multiplexer IC 7483 4 bit bcd adder using ic 7483 IC 74196 82S62 82583 adder transistor equivalent table IC 7483 BINARY ADDER of IC 7483 used in 4-bit binary adder 82566
Text: are directly compatible w ith other TTL circuits such as the 8000 MSI circuits, 82/82S bipolar , conventional TTL processing to reduce storage time, PNP transistors can also be used to advantage by the circu , axim um of 1 second duration. BENEFITS · Compatible with 8000 series, 54/74, 54S/74S TTL as well as , use multiples of 7483's and Gates. Replaces 8280, 8290, T.l. 74176, T.l. 74196 , FSC 93176, FSC 93196


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PDF 82/82S 54S/74Sas 82S62 ic 7483 BCD adder Multiplexer IC 7483 4 bit bcd adder using ic 7483 IC 74196 82S62 82583 adder transistor equivalent table IC 7483 BINARY ADDER of IC 7483 used in 4-bit binary adder 82566
7408 CMOS

Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 CMOS 4017 series ttl 74395 74106
Text: intervals along the row and column of the chip, also consist of I/O pads which are compatible of CMOS or TTL , Toggling Frequency: 40MHz • High density 3.5 micron geometries • TTL and CMOS I/O compatibility â , OF LS TTL TTL Pari No. Count TTL Part No. Count TTL Part No. Count TTL Part No. Count 7400 4 7470 , 74195 46 74374 74 7449 45 74135 24 74196 42 74375 16 7450 6 74136 12 74197 41 74376 40 7451 5 74138


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PDF KG10000 7408 CMOS TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 CMOS 4017 series ttl 74395 74106
2004 - Not Available

Abstract: No abstract text available
Text: -34.28 -44.06 -45.16 -43.97 -43.77 T 2.9 3.0 3.1 738.54 740.26 741.96 14.01 , 738.54 736.51 0.54 3.0 3.1 741.76 743.44 740.26 741.96 738.25 739.96 0.54 0.58


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PDF ROS-ED9968/1
2004 - 74237

Abstract: 74593
Text: 738.47 741.96 745.51 749.14 668.95 672.09 675.01 677.78 680.44 683.03 685.56 688.07 690.56 693.04 695.55


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PDF ROS-EDR5951 74237 74593
pin diagram of 74196

Abstract: pin diagram decade counter 74196 74LS196PC
Text: « NATIONAL SEMICOND {LOGIC} 05E D I b5Dliaa Db3c ] 3 31 I 2 ^ 5 - 0 3 - 13- 196 CONNECTION DIAGRAM PINOUT A 54/ 74196 54LS/74LS196 PRESETTABLE DECADE COUNTERS DESCRIPTION - The '196 decade ripple counter is partitioned into divideby-two and divide-by-five sections which can be combined to count either in BCD (8421) sequence or in a bi-quinary mode producing a 50% duty cycle output. Both circuit types have a Master Reset (MR) input which overrides all Other inputs and asynchronously


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PDF 54LS/74LS196 54/74LS pin diagram of 74196 pin diagram decade counter 74196 74LS196PC
IC 3-8 decoder 74138 pin diagram

Abstract: binary to gray code conversion using ic 74157 Multiplexer IC 74151 16 bit odd even parity checker using two IC 74180 binary to gray code conversion using ic 74139 7444 series Excess-3-gray code to Decimal decoder full adder using Multiplexer IC 74151 ic 74151 MSI IC 74138 decoder ic 74148 block diagram
Text: CODE TTL CODE 51 <0196> 74196 52 <0197> 74197 53 <0198> 74198 54 <0199> 74199 2-•2 2 , /Vila are TTL level normal input buffers Vihb/Vilb are CMOS level normal input buffers Vmc/Vac are TTL , Min. Typ. Max, TTL level schmitt Trigger input threshold voltage VT+ - — 1,2 1.7 2.3 V VT- 0.8 , mm 1.0 1.5 2.0 ns 2ND (I: metal wiring length) 1.4 2.1 2.3 TTL level input buffer delay time , €” Type No. Function block name Logic function Max. No. of fan-outs Interface level TTL CMOS


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PDF MSM91H000 b72MS40 DQQ023b t-42-41 b724240 IC 3-8 decoder 74138 pin diagram binary to gray code conversion using ic 74157 Multiplexer IC 74151 16 bit odd even parity checker using two IC 74180 binary to gray code conversion using ic 74139 7444 series Excess-3-gray code to Decimal decoder full adder using Multiplexer IC 74151 ic 74151 MSI IC 74138 decoder ic 74148 block diagram
pin diagram decade counter 74196

Abstract: IC 74196 BCD 8421 IC 8421 74LS196PC 74LS196P 74196PC IC 74196 pin diagram pin diagram of 74196
Text: 196 CO NNECTIO N DIAGRAM PINOUT A ui 54LS/74LS196 \À 4 i / 74196 a/or-3 £>/0 o3C-, PL [ 7 02 U Pi PRESETTABLE DECADE COUNTERS DESCRIPTION - The '196 decade ripple counter is partitioned into divideby-tw o and divide-by-five sections which can be com bined to count either in BCD (8421) sequence or in a bi-quinary mode producing a 50% duty cycle output. Both c ircu it types have a Master Reset (MR) input which overrides all other inputs and asynchronously forces all outputs LOW. A Parallel


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PDF 54LS/74LS196 54/74LS pin diagram decade counter 74196 IC 74196 BCD 8421 IC 8421 74LS196PC 74LS196P 74196PC IC 74196 pin diagram pin diagram of 74196
BCD 8421

Abstract: pin diagram decade counter 74196 pin diagram of 74196 binary to BCD 8421 BCD counter circuit diagram max plus 74196 74LS196PC 74196PC 54LS196FM 54LS196DM
Text:  14/ 74196 54LS/74LS196 ô/o° ^ PRESETTABLE DECADE COUNTERS DESCRIPTION —The '196 decade ripple counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD (8421) sequence or in a bi-quinary mode producing a 50% duty cycle output. Both circuit types have a Master Reset (MR) input which overrides all other inputs and asynchronously forces all outputs LOW. A Parallel Load input (PL) overrides clocked operations and asynchronously loads the


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PDF 54LS/74LS196 stor33 54/74LS BCD 8421 pin diagram decade counter 74196 pin diagram of 74196 binary to BCD 8421 BCD counter circuit diagram max plus 74196 74LS196PC 74196PC 54LS196FM 54LS196DM
IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Text: Support for TTL Macrofunctions Table 4. TTL Function Mappings in Altera-Provided LMFs (Part 1 o f 3 , Page 325 PLS-EDIF Data Sheet Table 4. TTL Function Mappings in Altera-Provided LMFs (Part 2 o , 74194 74195 74196 74197 74240 74241 74244 74251 74253 74257 74258 74259 Mentor Graphics 74LS114A 74LS133 , . TTL Function Mappings in Altera-Provided LMFs (Part 3 o f 3) MAX+PLUS 74260 74261 74273 74279 74280


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74S196

Abstract: 82s90 pin diagram decade counter 74196 BCD counter circuit diagram max plus S54LS196W S54LS196F N74LS196N N74LS196F counter 54LS/74LS 82s90 counter
Text: 54/ 74196 - See 8290 54S/74S196 - See 82S90 54LS/74LS196 LOGIC SYMBOL FEATURES • Performs BCD or Bi-quinary counting • Asynchronous parallel load for presetting counter • Overriding Master Reset • Buffered Qo output drives CP-| input plus standard fan-out • See 82S90 for faster version DESCRIPTION The "196" is an asynchronously presettable Decade Ripple Counter. It is partitioned into divide-by-2 and divide-by-5 sections which can be combined to count in either BCD (8421) mode or


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PDF 54S/74S196 82S90 54LS/74LS196 54LS/74LS. 54S/74S: 54S/74S; 74S196 pin diagram decade counter 74196 BCD counter circuit diagram max plus S54LS196W S54LS196F N74LS196N N74LS196F counter 54LS/74LS 82s90 counter
74191, 74192, 74193 circuit diagram

Abstract: Truth Table 74161 IC 7402, 7404, 7408, 7432, 7400 counter schematic diagram 74161 7408, 7404, 7486, 7432 74244 uses and functions 74191, 74192, 74193 counter 74168 truth table of ic 7495 A schematic diagram for the IC of 7411
Text: MAX+PLUSIITTL Macrofunction 74190 74191 74192 74193 74194 74195 74196 74197 74240 74241 74244 74251 74253 74257 , a NETED function to map. If no equivalent function currently exists in the MAX+PLUS II TTL , > Step 2: Design an equivalent circuit in AHDL if no equivalent function exists in the MAX+PLUS II TTL , relational operations. It is hierarchical, so that frequently used functions such as TTL and bus


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PDF HP400 QIC-24, 60-Mbytetape 74191, 74192, 74193 circuit diagram Truth Table 74161 IC 7402, 7404, 7408, 7432, 7400 counter schematic diagram 74161 7408, 7404, 7486, 7432 74244 uses and functions 74191, 74192, 74193 counter 74168 truth table of ic 7495 A schematic diagram for the IC of 7411
sn 74373

Abstract: SN 74114 logic diagram of ic 74112 IC 7486 xor IC 7402, 7404, 7408, 7432, 7400 7486 xor IC sn 74377 IC TTL 7486 xor ic 74148 block diagram IC 74374
Text: app ed to corresp o n d in g prim itive and T T L functions in the M A X + P L U S II TTL M a croF u , libraries can be m app ed to corresp o n d in g prim itive and TTL functions in the M A X + P L U S 11 T T L , 74LS153 - MAX+PLUS il TTL Macrofunction 74147 74148 74151 74153 74154 74155 74156 74157 74158 74160 , 74195 74196 74197 74240 74241 74244 74251 74253 74257 74258 74259 74260 74261 74273 74LS155A 74LS156 , 74LS377 74LS379 74LS381 74LS390 74LS393 MAX+PLUS II TTL Macrofunction 74279 74280 74283 74290 74293


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features of decade counter 74196

Abstract: pin diagram decade counter 74196 74S196
Text: 54/ 74196 - See 8290 54S/74S196 - See 82S90 54LS/74LS196 DESCRIPTION FEATURES The '‘ 196" is an asynchronously p resetta ble Decade Ripple Counter. It ¡s pa rtitioned into divide-by-2 and divide-by-5 sections w hich can be com bined to count in either BCD (8421) mode or bi-quinary mode producing a 50% duty cycle output. • Performs BCD or Bi-quinary counting • Asynchronous parallel load for presetting counter • Overriding Master Reset • Buffered Qo output drives CP-i input


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PDF 54S/74S196 82S90 54LS/74LS196 82S90 /74LS features of decade counter 74196 pin diagram decade counter 74196 74S196
asynchronous 4bit up down counter using jk flip flop

Abstract: counter 74168 Multiplexer 74152 3-8 decoder 74138 synchronous counter using 4 flip flip 74183 alu 7444 series Excess-3-gray code to Decimal decoder 74169 SYNCHRONOUS 4-BIT BINARY COUNTER counter 74169 MH 74151
Text: is able to convert levels of both CMOS and TTL for all input/output buffers. Ten types of master , €¢ Macro functional block: 84 types ( TTL MSI equivalent) • All pins of schmitt input circuit are available. (Both CMOS and TTL levels are available.) • All pins of pull-up or pull-down MOS (100 K , level Input buffer 1 BFIN Through input buffer 1 TTL 2 BFIC Through input buffer 1 CMOS 3 BCK Through clock input buffer 1 TTL 4 BCKN Invert clock input buffer 1 TTL 5 BST Invert schmitt trigger


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PDF MSM70V000 MSM70V000, asynchronous 4bit up down counter using jk flip flop counter 74168 Multiplexer 74152 3-8 decoder 74138 synchronous counter using 4 flip flip 74183 alu 7444 series Excess-3-gray code to Decimal decoder 74169 SYNCHRONOUS 4-BIT BINARY COUNTER counter 74169 MH 74151
74LS324

Abstract: 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74LS324 equivalent 74C08 equivalent 74C923 equivalent Flip-Flop 7473
Text: (Complementary Metal Oxide Silicon) series are a pin-for-pln functional equivalent to the 7400 TTL family. They , Schottky, a type of TTL with a current and power reduction by a factor of 5 (compared to 7400 TTL ), and an , type of TTL . They have a schottky-barrier diode clamping on all normally saturated devices. 1-272 , equivalent to the 7400 TTL family. They have a wide power supply operating range, low power consumption, high , Abbreviation for Low Power Schottky, a type of TTL with a current and power reduction by a factor of 5


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PDF G0G513S 74C00 74H00 74LS00 74S00 74H01 74LS01 74C02 74LS02 74S02 74LS324 7400 TTL 74LS327 7402, 7404, 7408, 7432, 7400 80C96 74251 multiplexer 74LS324 equivalent 74C08 equivalent 74C923 equivalent Flip-Flop 7473
priority encoder 74148

Abstract: priority encoder 74147 shift register 7495 msm7200 MSM7000 alu 74381 msm7500 74150 demultiplexer MSM72000 multiplexers 74 LS 150
Text: convert levels of both CMOS and TTL for all input/output buffers. Five types of master chips are prepared , • Macro functional block: 84 types ( TTL MSI equivalent) • All pins of schmitt input circuit are available. (Both CMOS and TTL levels are availa-ble.f • All pins of pull-up or pull-down resistance (120 , . of buffer cell Interface level Input buffer 1 BFIN Through input buffer 1 TTL 2 BFIC Through input buffer 1 CMOS 3 BCK Through clock input buffer 1 TTL 4 BCKN Invert clock input buffer 1 TTL


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PDF MSM70000 MSM71000, MSM72000, MSM71000 MSM74000] MSM75000] priority encoder 74148 priority encoder 74147 shift register 7495 msm7200 MSM7000 alu 74381 msm7500 74150 demultiplexer MSM72000 multiplexers 74 LS 150
74139 for bcd to excess 3 code

Abstract: design a bcd counter using jk flip flop ttl 74118 priority encoder 74148 alu 74381 jk flip flop to d flip flop conversion 74541 buffer design excess 3 counter using 74161 two 3 to 8 decoders 74138 7444 series Excess-3-gray code to Decimal decoder
Text: convert levels of both CMOS and TTL for all input/output buffers. Ten types of master chips are prepared , : 31 types • I/O block: 57 types • Macro functional block: 84 types ( TTL MSI equivalent) • All pins of schmitt input circuit are available. (Both CMOS and TTL levels are available ) • All , Interface level Input buffer 1 BFIN Through input buffer 1 TTL 2 BFIC Through input buffer 1 CMOS 3 BCK Through clock input buffer 1 TTL 4 BCKN Invert clock input buffer 1 TTL 5 BST Invert schmitt


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PDF MSM70H000 MSM70H000, 74139 for bcd to excess 3 code design a bcd counter using jk flip flop ttl 74118 priority encoder 74148 alu 74381 jk flip flop to d flip flop conversion 74541 buffer design excess 3 counter using 74161 two 3 to 8 decoders 74138 7444 series Excess-3-gray code to Decimal decoder
1999 - 7474 D flip-flop

Abstract: 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram ICL7103A zestron reed relay 7474 for shift register 2N2007 shift register by using D flip-flop 7474 application notes 74121 7474 D flip-flop circuit diagram zestron 278
Text: reference voltage. · Over-range and under-range signals available for autoranging. · TTL compatible , 47k -15V k ACV #1 +5V +15V 90k RESISTOR LADDER OHMS CONVERTER k 74196


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PDF ICL7103A/ICL8052A AN028 ICL7103A ICL8052A 7474 D flip-flop 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram zestron reed relay 7474 for shift register 2N2007 shift register by using D flip-flop 7474 application notes 74121 7474 D flip-flop circuit diagram zestron 278
1999 - ICL7103A

Abstract: zestron reed relay 2N2007 ICL7103 7474 D flip-flop application notes 74121 7474 D flip-flop circuit diagram 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram shift register by using D flip-flop 7474 74121 application as pulse generator
Text: reference voltage. · Over-range and under-range signals available for autoranging. · TTL compatible , 74196 8 A B 1/4 - 7482 C D 1 74121 #3 RELAYS ARE ZESTRON #278 4 1A 1/4 - 7406


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PDF ICL7103A/ICL8052A AN028 ICL7103A ICL8052A zestron reed relay 2N2007 ICL7103 7474 D flip-flop application notes 74121 7474 D flip-flop circuit diagram 2-DIGIT 7-SEGMENT LED DISPLAY schematic diagram shift register by using D flip-flop 7474 74121 application as pulse generator
counter 74168

Abstract: 3-8 decoder 74138 counter 74169 Multiplexer 74152 74183 adder 74381 alu 74169 binary counter 74175 flip flops 74151 8 by 1 Multiplexer flip flop 74379
Text: is able to convert levels of both CMOS and TTL for all input/output buffers. Ten types of master , functional block: 84 types ( TTL MSI equivalent) • All pins of schmitt input circuit are available. (Both CMOS and TTL levels are available.) • All pins of pull-up or pull-down MOS (100 Ki2) are available , buffer cell Interface level Input buffer 1 BFIN Through input buffer 1 TTL 2 BFIC Through input buffer 1 CMOS 3 BCK Through clock input buffer 1 TTL 4 BCKN Invert clock input buffer 1 TTL 5


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PDF MSM70V000 MSM70V000, counter 74168 3-8 decoder 74138 counter 74169 Multiplexer 74152 74183 adder 74381 alu 74169 binary counter 74175 flip flops 74151 8 by 1 Multiplexer flip flop 74379
ic 74226

Abstract: jk flip flop 74103 ic D flip flop 7474 7471 rs flip flop 4011 flip flop IC 7400 SERIES list 7414 NOT gate ic IC LA 74141 Ic ttl 7490, 7493, 7495 ci 74386
Text: 100 100 80 76 TTL Part N o. 74192 74193 74194 74195 74196 74197 74198 74199 74225 74226 74245 74246 , N UM B ER OF GATES · TTL 7 4 0 0 SERIES TTL Part N o. 7400 7401 7402 7403 7404 7405 7406 7407 7408 , 45 6 5 8 7 7 6 6 6 9 8 8 16 15 14 20 15 14 20 14 20 17 80 27 57 80 73 12 19 320 TTL Part N o. 7490


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PDF RP3G01 RP3G01 ic 74226 jk flip flop 74103 ic D flip flop 7474 7471 rs flip flop 4011 flip flop IC 7400 SERIES list 7414 NOT gate ic IC LA 74141 Ic ttl 7490, 7493, 7495 ci 74386
74S196

Abstract: 74S196 TTL 54s196 IC 74196 54S197 74S197
Text: 54LS197, SN 54S197 . . J OR W PACKAG E SN 74196 , SN 74197 . . . J OR N PACKAGE SN 74LS196, SN 74S196. SN , .U M t N l b ofF |C E BQ1< 2J6(J, 2 . 0 A L L A $ TE>1AS i6J65 o - ic - t '*' ' ° ' TTL DEVICES , '1 9 7 d kP . 6 k i2 TTL DEVICES 3-788 T e x a s 'V In s t r u m e n t s PO ST O F F IC E B O , 0 0 16 50 25 U N IT V HA mA M Hz 3 TTL DEVICES 3-789 NOTES: 3. Minimum count enable time is , u t s h o u l d b e s h o r t e d a t a t im e . TTL DEVICES switching characteristics, V c c


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PDF SN54196, SN54197, SN54LS196, SN54LS197, SN54S196, SN54S197, SN74196, SN74197, SN74LS196, SN74LS197, 74S196 74S196 TTL 54s196 IC 74196 54S197 74S197
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