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Part Manufacturer Description Datasheet Download Buy Part
LT1106CFTR Linear Technology IC DC/DC CONV FOR PCMCIA 20TSSOP
LT1106CF Linear Technology IC 0.5 A SWITCHING REGULATOR, 500 kHz SWITCHING FREQ-MAX, PDSO20, TSSOP-20, Switching Regulator or Controller
LT1106CF#TR Linear Technology IC 0.5 A SWITCHING REGULATOR, 500 kHz SWITCHING FREQ-MAX, PDSO20, TSSOP-20, Switching Regulator or Controller
ISL91106AIIQZ-T Intersil Corporation High Efficiency Buck-Boost Regulator with 4.2A Switches and Bypass Mode; WLCSP15; Temp Range: -40° to 85°C
ISL91106IIQZ-T Intersil Corporation High Efficiency Buck-Boost Regulator with 3.6A Switches and Bypass Mode; WLCSP15; Temp Range: -40° to 85°C
ISL91106IINZ-T Intersil Corporation High Efficiency Buck-Boost Regulator with 3.6A Switches and Bypass Mode; WLCSP15; Temp Range: -40° to 85°C

7 segment LD 1106 BS Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1996 - Not Available

Abstract: No abstract text available
Text: always located in the base segment The stack pointer will be ini- O bs ol Reset 9 et http , Diagrams http www national com bs ol Bit 7 TL DD 12854­ 9 10 et e Control Registers , T2C3 T2C3 T2C2 T2C1 T2C0 T2PNDA T2ENA T2PNDB T2ENB Bit 7 Bit 0 bs ol T3C3 T3C2 T3C1 Bit 7 , DD12854 bs ol TL DD 12854 ­ 1 FIGURE 1 Block Diagram TRI-STATE is a registered trademark of , Number V44A bs ol TL DD 12854­2 Top View FIGURE 2 Connection Diagrams http www national


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PDF COP87L88RD COP888GD 16-bit
1998 - 220v ac to 5v dc convertor

Abstract: cop8sa RS-232 specification
Text: Diagrams bs ol 2 CKI VCC I0 I1 I2 I3 I4 I5 I6 I7 L0 6 5 4 3 2 1 44 43 42 41 40 7 39 8 38 9 37 10 , µs µs ns ns ns tc tc tc tc bs ol 7 e 220 µs O Note 1: Maximum rate of voltage , . COP RESET bs ol (READS UNDEFINED DATA) UNUSED* 017F SEGMENT 1 ON-CHIP RAM (128 BYTES) ON-CHIP RAM , converter-I6 7 . Clock Monitor current when enabled-I7 It = I1 + I2 + I3 + I4 + I5 + I6 + I7 bs ol T1C0 , T3ENB Bit 7 Bit 0 O bs ol ITSEL2 0 0 0 0 1 0 0 1 1 X Bit 7 et ITSEL1 ITSEL0 0 1 0 1 X


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PDF COP888GD COP988GD COP988GD SNOS036A COP888GD/COP988GD COP888 220v ac to 5v dc convertor cop8sa RS-232 specification
2011 - Not Available

Abstract: No abstract text available
Text: Reading the G6 and G7 data bits will return zeros O bs ol FIGURE 4 I O Port Configurations 7 , Timer T0 Interrupt Enable (Bit 12 toggle) T0PND Timer T0 Interrupt pending O bs ol T3C3 Bit 7 , Semiconductor Corporation TL DD12864 RRD-B30M96 Printed in U S A bs ol Y Y Y Y Y Y Idle Timer Multi-Input , Order Number COP87L88KGV-XE See NS Package Number V44A TL DD12864 ­ 3 http www national com bs , 29 30 31 32 33 34 35 36 CKX TDX RDX T2A T2B T3A T3B bs ol I I I I I I I I I I I I I I I I


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PDF COP87L88KG COP87L88KG SNOS890A COP888KG
1998 - RS-232 specification

Abstract: No abstract text available
Text: bs ol 7 e 220 µs O Note 1: Maximum rate of voltage change must be < 0.5 V/ms. Note 2 , bs ol SK tUWS tUWH tUPD et 8 www.national.com e Note 7 : Conversion Time includes 7 A/D , . COP RESET bs ol (READS UNDEFINED DATA) UNUSED* 017F SEGMENT 1 ON-CHIP RAM (128 BYTES) ON-CHIP RAM , converter-I6 7 . Clock Monitor current when enabled-I7 It = I1 + I2 + I3 + I4 + I5 + I6 + I7 bs ol T1C0 , T3ENB Bit 7 Bit 0 O bs ol ITSEL2 0 0 0 0 1 0 0 1 1 X Bit 7 et ITSEL1 ITSEL0 0 1 0 1 X


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PDF COP888GD/COP988GD COP888 COP888GD COP888GD-XXX/V COP988GD-XXX/V RS-232 specification
1996 - Not Available

Abstract: No abstract text available
Text: EXPND BUSY EXEN GIE Bit 0 bs ol Bit 7 T1C2 T1C1 T1C0 MSEL IEDG SL1 SL0 Bit 0 Bit 7 ICNTRL , MetaLink Corporation C1996 National Semiconductor Corporation TL DD12527 RRD-B30M96 Printed in U S A bs , Connection Diagram bs ol Top View Order Number COP87L88GWV-XE See NS Plastic Chip Package Number V68A , mA mA e 0 8 VCC 0 2 VCC VCC e 5 5V V V V V mA mA V VCC e 5 5V VIN e 0V (Note 6) bs ol VCC e 4 5V VOH e 3 3V VCC e 4 5V VOL e 1V b0 4 et b2 a2 0 7 VCC 0 2 VCC 40 b 250 0


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PDF COP87L88GW COP888GW 16-bit COP87L88GWV-XE
1996 - Not Available

Abstract: No abstract text available
Text: Reading the G6 and G7 data bits will return zeros O bs ol FIGURE 4 I O Port Configurations 7 , Timer T0 Interrupt Enable (Bit 12 toggle) T0PND Timer T0 Interrupt pending O bs ol T3C3 Bit 7 , RRD-B30M96 Printed in U S A bs ol Y Y Y Y Y Y Idle Timer Multi-Input Wake-Up (MIWU) with optional , See NS Package Number V44A TL DD12864 ­ 3 http www national com bs ol Plastic Chip Carrier , 36 CKX TDX RDX T2A T2B T3A T3B bs ol I I I I I I I I I I I I I I I I COMP1INb COMP1IN a


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PDF COP87L88KG COP888KG
2011 - Not Available

Abstract: No abstract text available
Text: EXPND BUSY EXEN GIE Bit 0 bs ol Bit 7 T1C2 T1C1 T1C0 MSEL IEDG SL1 SL0 Bit 0 Bit 7 ICNTRL , MetaLink Corporation C1996 National Semiconductor Corporation TL DD12527 RRD-B30M96 Printed in U S A bs , Connection Diagram bs ol Top View Order Number COP87L88GWV-XE See NS Plastic Chip Package Number V68A , mA mA e 0 8 VCC 0 2 VCC VCC e 5 5V V V V V mA mA V VCC e 5 5V VIN e 0V (Note 6) bs ol VCC e 4 5V VOH e 3 3V VCC e 4 5V VOL e 1V b0 4 et b2 a2 0 7 VCC 0 2 VCC 40 b 250 0


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PDF COP87L88GW COP87L88GW SNOS782A COP888GW
1996 - Not Available

Abstract: No abstract text available
Text: output change occurs Note 7 Parameter characterized but not tested O 5 www national com bs ol , return zeros O bs ol FIGURE 4 I O Port Configurations 7 PORT L is an 8-bit I O port All L-pins , FIGURE 7 Crystal and R C Oscillator Diagrams bs ol R (kX) 33 56 68 C (pF) 82 100 100 CKI Freq (MHz) 2 , Interrupt pending O bs ol T3C3 Bit 7 T3C2 T3C1 PSW Register (Address X 00EF) The PSW register , trademark of MetaLink Corporation C1996 National Semiconductor Corporation bs ol Y Y Y Idle Timer


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PDF COP87L88GG COP888GG
2011 - canton AS 85 SC service manual

Abstract: national semiconductor COP8 application note
Text: will return zeros O bs ol FIGURE 4 I O Port Configurations 7 PORT L is an 8-bit I O port All , FIGURE 7 Crystal and R C Oscillator Diagrams bs ol R (kX) 33 56 68 C (pF) 82 100 100 CKI Freq (MHz) 2 , Interrupt pending O bs ol T3C3 Bit 7 T3C2 T3C1 PSW Register (Address X 00EF) The PSW register , Corporation bs ol Y Y Y Idle Timer Multi-Input Wakeup (MIWU) with optional interrupts (8) WATCHDOGTM , Number V44A bs ol Top View Note FIGURE 2 Connection Diagrams O http www national com et


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PDF COP87L88GG COP87L88GG SNOS785A COP888GG canton AS 85 SC service manual national semiconductor COP8 application note
1996 - Not Available

Abstract: No abstract text available
Text: VCC 0 7 VCC b2 0 8 VCC bs ol VCC e 5 5V VCC e 5 5V 40 0 05 VCC VCC e 4 5V VOH e 3 3V VCC e 4 , architecture permits transfer of data from ROM to RAM bs ol 7 Port G has the following alternate , (address range 0080 to 00FF) is independent of data segment extension O http www national com bs ol , produce the instruction cycle clock (1 tc) Figure 7 shows the Crystal and R C diagrams bs ol TL DD , MetaLink Corporation C1996 National Semiconductor Corporation TL DD12872 RRD-B30M96 Printed in U S A bs


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PDF COP87L84RG COP888EG COP87L84RGN-XE
2011 - Not Available

Abstract: No abstract text available
Text: mA mA mA mA mA et 0 2 VCC 0 7 VCC 0 7 VCC b2 0 8 VCC bs ol VCC e 5 5V VCC e 5 5V 40 0 05 , architecture permits transfer of data from ROM to RAM bs ol 7 Port G has the following alternate , (address range 0080 to 00FF) is independent of data segment extension O http www national com bs ol , produce the instruction cycle clock (1 tc) Figure 7 shows the Crystal and R C diagrams bs ol TL DD , DD12872 RRD-B30M96 Printed in U S A bs ol Y Y Y Idle timer Multi-Input Wake Up (MIWU) with optional


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PDF COP87L84RG COP87L84RG SNOS895A COP888EG
2011 - Not Available

Abstract: No abstract text available
Text: can tie two or more D port outputs (except D2) together in order to get a higher drive 7 bs ol , DD12525 RRD-B30M106 Printed in U S A bs ol Y Y Y Y Y Idle timer Multi-Input Wake Up (MIWU) with , Dual-In-Line Package Top View Order Number COP87L88EGV-XE See NS Package Number V44A bs ol TL DD12525 , 30 31 32 CKX TDX RDX T2A T2B T3A T3B I I I I I I I I COMP1INb COMP1IN a COMP1OUT bs ol , RESET 3 O O O O O O O O et 7 8 9 10 9 10 11 12 9 10 11 12 13 14 15 16 29 30 31 32 39 40 1 2 13 14


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PDF COP87L84EG COP87L88EG COP87L88EG SNOS780A
2004 - Not Available

Abstract: No abstract text available
Text: Ordering number : ENN*6790 CMOS IC LC4104C-T2A LCD Dot Matrix Segment Driver for STN Displays Preliminary Overview The LC4104C-T2A is a segment driver IC for large-scale dot matrix LCD , (8bits × 20) BS VDD — D0 Bits Control Address Decoder VSS D7 CP R/L , voltage VDD max –0.3 to + 7 V Maximum supply voltage VDDH max –0.3 to +40 V , VIN Input voltage V0, V2 VDDH – 7 to VDDH + 0.3 V Input voltage V3 V3 â


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PDF LC4104C-T2A LC4104C-T2A 160bits LC4102C-T2A
2002 - 6790

Abstract: A13678
Text: Ordering number : ENN*6790 CMOS IC LC4104C-T2A LCD Dot Matrix Segment Driver for STN Displays Preliminary Overview The LC4104C-T2A is a segment driver IC for large-scale dot matrix LCD , VDDH VDDH Level Shifter DISP M 2nd Latch (160bits) LOAD 1st Latch (8bits × 20) BS , Parameter Symbol Conditions Ratings Unit Maximum supply voltage VDD max ­0.3 to + 7 V , +0.3 V ­0.3 to VDD + 0.3 V Input voltage VIN Input voltage V0, V2 VDDH ­ 7 to


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PDF LC4104C-T2A LC4104C-T2A 160bits LC4102C-T2A 6790 A13678
1998 - RS232 MAX232 micro

Abstract: MAX232 ST72251
Text: of the ST7, and the Transmit Data pin (TD) to the ICAP1 pin. 7 /24 SCI COMMUNICATION BETWEEN , . TE BS RE BR SP SP: Sampling Phase of reception mode. BR: Byte Received flag. RE: Reception Enable. BS : Byte Sent flag. TE: Transmission Enable. Figure 5. Main Flowchart MAIN port , SCI COMMUNICATION BETWEEN ST7 AND PC THROUGH RS232 Figure 7 . Transmission and Reception Flowcharts , rim rim no BS = 1? yes no BR = 1? yes sim return 10/24 sim return


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PDF ST72251 16-BIT RS232 MAX232 micro MAX232
1998 - MAX232 connection

Abstract: MAX232 ST72251 MAX232 pin configuration 9600bd
Text: of the ST7, and the Transmit Data pin (TD) to the ICAP1 pin. 7 /24 SCI COMMUNICATION BETWEEN , . TE BS RE BR SP SP: Sampling Phase of reception mode. BR: Byte Received flag. RE: Reception Enable. BS : Byte Sent flag. TE: Transmission Enable. Figure 5. Main Flowchart MAIN port , SCI COMMUNICATION BETWEEN ST7 AND PC THROUGH RS232 Figure 7 . Transmission and Reception Flowcharts , rim rim no BS = 1? yes no BR = 1? yes sim return 10/24 sim return


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PDF ST72251 16-BIT MAX232 connection MAX232 MAX232 pin configuration 9600bd
1998 - 4800bd

Abstract: MAX232 I2C MAX232 ST72251
Text: . The software uses software register: sci_status register. TE BS RE BR SP SP: Sampling Phase of reception mode. BR: Byte Received flag. RE: Reception Enable. BS : Byte Sent flag. TE: Transmission Enable. 7 /24 SCI SOFTWARE COMMUNICATION WITH A PC USING ST72251 16-BIT TIMER Figure 5 , ST72251 16-BIT TIMER Figure 7 . Transmission and Reception Flowcharts SCI_Rx SCI_Tx sci_status = , TAACR+0x0030 ICIE = 1, OCIE = 0 OLVL1 = 0 remove ICAP interrupts rim rim no BS = 1


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PDF ST72251 16-BIT 4800bd MAX232 I2C MAX232
1998 - MAX232 I2C

Abstract: MAX232 ST72251 MAX232 14 pin
Text: . The software uses software register: sci_status register. TE BS RE BR SP SP: Sampling Phase of reception mode. BR: Byte Received flag. RE: Reception Enable. BS : Byte Sent flag. TE: Transmission Enable. 7 /24 SCI SOFTWARE COMMUNICATION WITH A PC USING ST72251 16-BIT TIMER Figure 5 , PC USING ST72251 16-BIT TIMER Figure 7 . Transmission and Reception Flowcharts SCI_Rx SCI_Tx , BS = 1? yes no BR = 1? yes sim return 10/24 sim return SCI SOFTWARE


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PDF ST72251 16-BIT MAX232 I2C MAX232 MAX232 14 pin
power supply ic 1507

Abstract: horizontal driver transistor D155 tA 1507 LUT20 horizontal driver transistor D148 01AF SPLD801A 1507
Text: alternate signal FP 6 I Common data input LD 7 I LCD data load. When " LD " is set to , DO80 LD DF CS CUP2 LCD PANEL V4 V5 DIN MODE 80 Common X 160 Segment V1 V1 , common/ segment combinations for LCD applications. Four types of LCD combinations are provided: 80 , LD 31-bit Control Register Maximum working Frequency: 5.0MHz @ 3.3V LD LCD driver voltage , control Decoder Negative Voltage generator) Bias voltage (V5 - 1) can be supplied externally LD


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PDF SPLD801A 80-CHANNEL SPLD801A, SPLD801A 160-bit 80-bit power supply ic 1507 horizontal driver transistor D155 tA 1507 LUT20 horizontal driver transistor D148 01AF 1507
2005 - uc 3882

Abstract: D0214AC D0214AC SMA LED 3mm 2ma Green LED 3mm red led 3mm AN2233 3050 smd led B45196E0107M409 STPS1L30A
Text: ;* bs O segment 'vectit' DC.W DC.W DC.W DC.W DC.W DC.W DC.W 0 0 0 0 0 0 0 , du o Pr e let o bs O September 2005 Rev. 1 1/19 www.st.com 1 AN2233 , . . . . . . . . . . . . . . . . . . . . . 7 3.1 Stand-alone step-up converter part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1.1 3.1.2 Output voltage ripple . . . . . , . . . . 7 Start-up voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


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PDF AN2233 uc 3882 D0214AC D0214AC SMA LED 3mm 2ma Green LED 3mm red led 3mm AN2233 3050 smd led B45196E0107M409 STPS1L30A
horizontal driver transistor D155

Abstract: LUT33 1084 D154 LUT20 sunplus spl circuit diagram 2166 display 2173 SPLD801B FP 801 7 segment display LT 542
Text: 7 . APPLICATION CIRCUITS 7.1. Application Circuit - (1) SPL130A VDD DI CP FP FM LD , . 12 7 . APPLICATION CIRCUITS , varieties of common/ segment combinations for LCD application. ! Operation voltage 2.4V - 5.5V Four , for both Segment driver and Common driver Command mode Data Latch 18 x 2 bits Command Latch Shifter register 18 x 2 bits / 18 x 1 bits 18 x 2 bits DOUT Command mode Common/ Segment Data


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PDF SPLD801B 80-Channel PIN23 horizontal driver transistor D155 LUT33 1084 D154 LUT20 sunplus spl circuit diagram 2166 display 2173 SPLD801B FP 801 7 segment display LT 542
2002 - Not Available

Abstract: No abstract text available
Text: . 12 7 . APPLICATION CIRCUITS , varieties of common/ segment combinations for LCD application. ! Operation voltage 2.4V - 5.5V Four , both Segment driver and Common driver Command mode Data Latch 18 x 2 bits Command Latch Shifter register 18 x 2 bits / 18 x 1 bits 18 x 2 bits DOUT Command mode Common/ Segment Data , shifter and RC Oscillator selector C1P C1N C2P LCD driver 80 bits ( segment /common


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PDF SPLD801B 80-Channel PIN23
horizontal driver transistor D155

Abstract: SPLD801B
Text: . 12 7 . APPLICATION CIRCUITS , , is able to provide varieties of common/ segment combinations for LCD application. ! Operation , ! Chain function for both Segment driver and Common driver Command mode Data Latch 18 x 2 bits , Common/ Segment Data Latch 80 x 2 bits /80 x 1 bits CK1 LP Decoder Gray scale control DIR FM Level shifter and RC Oscillator selector C1P C1N C2P LCD driver 80 bits ( segment


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PDF SPLD801B 80-Channel horizontal driver transistor D155 SPLD801B
2000 - datasheet and pin diagram of IC 7491

Abstract: LC4132C Electronic Volume Controller IC O237 LC4102C O234 29740 co18
Text: , BS 2. The following relationships must hold for V0, V2, V3, and V5: VDDH V0 V2 VDDH ­ 7 V, and 7 , Ordering number : ENN*6477 CMOS IC LC4132C Dot Matrix STN LCD Segment Driver Overview The LC4132C is a segment driver for large-scale dot matrix LCDs. The LC4132C latches 240 bits of , Shifter DISP M 2nd Latch (240 bits) LOAD 1st Latch (8 bits × 30) BS VDD D0 to Bits , : 3. D0 to D7, LOAD, CP, R/L, M, DISP, BS , EIO1, EIO2 4. The following relationships must hold for V0


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PDF LC4132C LC4132C LC4102C datasheet and pin diagram of IC 7491 Electronic Volume Controller IC O237 O234 29740 co18
8002B

Abstract: SM 8002C 8002A SA 8002 8002A 8 pin block diagram for ic 7404 BFAAA 7x11 dot matrix ic 7404 logic symbol SM 8002 C
Text: S T A N D A R » M I C R O S Y S T E M S bS 1)E| ñSb4bñb D0G3bD4 7 |""^04 D STANDARD , · 'C AN BE PROGRAMMED FROM 1 TO 7 BITS ··LENGTH DETERMINED BY LD /SR, VDC TIMING EXAMPLE: 10010110 , DONT CARE THE INSIDE SEGMENT IS MASK PROGRAMMABLE TO ROW 0000 LENGTH DETERMINED BY LD /5H. VDC TIMING , Generator VDAC' kTM FEATURES PIN CONFIGURATION VIDEO LD /SH v / ID 28 RETBL 1C Z On chip , frequency A1 5 C D 24 BLINK CRT 8002A 20MHz A2 6 C Z1 23 V SYNC CRT 8002B 15MHz A3 7 C Z Z1 22 CHABL CRT


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PDF 20MHz 8002B 15MHz 8002C 10MHz 400ns 74SXX 74S74 SM 8002C 8002A SA 8002 8002A 8 pin block diagram for ic 7404 BFAAA 7x11 dot matrix ic 7404 logic symbol SM 8002 C
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