The Datasheet Archive

Top Results (3)

Part Manufacturer Description Datasheet Download Buy Part
UBY1E622MHL6TN Nichicon Corporation Aluminum Electrolytic Capacitor, Polarized, Aluminum, 25V, 20% +Tol, 20% -Tol, 6200uF
UBY1V622MHL Nichicon Corporation Aluminum Electrolytic Capacitor, Polarized, Aluminum, 35V, 20% +Tol, 20% -Tol, 6200uF, Through Hole Mount
UBY1E622MHL Nichicon Corporation Aluminum Electrolytic Capacitor, Polarized, Aluminum, 25V, 20% +Tol, 20% -Tol, 6200uF, Through Hole Mount
SF Impression Pixel

Search Stock (4)

  You can filter table by choosing multiple options from dropdownShowing 4 results of 4
Part Manufacturer Supplier Stock Best Price Price Each Buy Part
UBY1E622MHL Nichicon Corporation Chip1Stop 300 $2.42 $2.42
UBY1E622MHL6 Nichicon Corporation TME Electronic Components 24 $3.94 $1.96
UBY1E622MHL6TN Nichicon Corporation Chip1Stop 250 $2.49 $2.49
UBY1V622MHL Nichicon Corporation Chip1Stop 250 $3.27 $3.27

No Results Found

Show More

622MH datasheet (1)

Part Manufacturer Description Type PDF
622MHz Infineon Technologies Multimode 850nm 622MHz Original PDF

622MH Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
SW2N60

Abstract: Samwin SW2N
Text: 1.5 - uc NOTES 1. Repeativity rating: pulse width limited by junction temperature 2. L= 62.2mH


Original
PDF SW2N60 O-252 O-220 O-251 SW2N60 Samwin SW2N
2005 - marking vt6

Abstract: 44-PIN SY58039U SY58038U SY58037UMITR SY58037UMI SY58037UMGTR SY58037UMG SY58037U marking vt5
Text: /div.) TIME (600ps/div.) Output Swing (200mV/div.) 622MHz Output (Q ­ /Q) TIME (100ps/div


Original
PDF SY58037U 450ps 300mV) 10psPP marking vt6 44-PIN SY58039U SY58038U SY58037UMITR SY58037UMI SY58037UMGTR SY58037UMG SY58037U marking vt5
2005 - SY89873L

Abstract: SY89876L SY89876LMG SY89876LMGTR SY89876LMI SY89876LMITR
Text: high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDS or HSTL clock input signal and dividing down the , High-end, multiprocessor servers OC-12 to OC-3 Translator/Divider CML/LVPECL/LVDS 622MHz Clock In , ) 622MHz In Enable FF IN Q0 Enable MUX /Q0 MUX /IN Q1 IN Divided by 2, 4, 8 or , (50mV/div.) Output Swing (50mV/div.) 622MHz Output TIME (300ps/div.) TIME (130ps/div


Original
PDF SY89876L 190ps 10psPP M9999-020707 SY89873L SY89876L SY89876LMG SY89876LMGTR SY89876LMI SY89876LMITR
2007 - JESD97

Abstract: STLVD111 STLVD111BFR TQFP32
Text: STLVD111 Programmable low voltage 1:10 differential LVDS clock driver Features 100ps part-to part skew 50ps bank skew Differential design Meets LVDS spec. for driver outputs and receiver inputs Reference voltage available output VBB Low voltage VCC range of 2.375V to 2.625V High signalling rate capability (exceeds 622MHz ) Support open, short and terminated input failsafe (low output state) Programmable drivers power off control Description


Original
PDF STLVD111 100ps 622MHz) STLVD111 JESD97 STLVD111BFR TQFP32
2005 - T3666-2

Abstract: marking code 36L CAZ MARKING ic MARKING FZ sis 650 transistor marking 36L MAX3882 MAX3882EGX
Text: connected to an external reference clock of 155MHz/167MHz or 622MHz /667MHz to maintain a valid clock , , RATESET must always be low. 30 FREFSET Sets Reference Frequency. LVTTL low for 622MHz /667MHz , 155MHz/167MHz or 622MHz /667MHz must be applied to the SLBI input. Control input FREFSET selects which , reference frequency at 622MHz 0 0 X 1 Clock holdover: PLL locked to reference frequency at


Original
PDF 488Gbps/2 67Gbps MAX3882 622Mbps/667Mbps 10mVP-P 622Mbps/667Mbps. T3666-2 marking code 36L CAZ MARKING ic MARKING FZ sis 650 transistor marking 36L MAX3882EGX
1996 - hdlc

Abstract: PM5312 PM5343 PM5344 PM5362 PMC-960725
Text: system architecture for implementing PPP over an STS12/STM-4 rate. The 622MHz front end and SONET path


Original
PDF PMC-960725 hdlc PM5312 PM5343 PM5344 PM5362 PMC-960725
2003 - ICS8745B

Abstract: ICS8745BY ICS8745BYLF MS-026
Text: : Characterized at VCO frequency of 622MHz. NOTE 7: Measured from the 20% to 80% points. Guaranteed by


Original
PDF ICS8745B ICS8745B 25MHz 700MHz. 8745BY ICS8745BY ICS8745BYLF MS-026
2000 - laserdiode application

Abstract: No abstract text available
Text: NOTES: 1. Input referred noise = RMS output noise/low frequency gain. 2. Input is a 622MHz square wave


Original
PDF SY88922 SY88904 SY88905 10-pin SY88923 SY88923KC K10-1 SY88923 laserdiode application
2003 - Not Available

Abstract: No abstract text available
Text: typical 622MHz clock system this would provide availability of 311MHz, 155MHz, 77MHz or 38MHz auxiliary , , /DISABLE TYPICAL APPLICATION 622MHz /155.5MHz SONET Clock Generator Enable FF Enable MUX QA 622MHz LVPECL Clock In /QA IN /IN QB0 IN Divided by 2, 4, 8 or 16 50 VT 50 QA 622MHz LVDS /QA Clock Out OC-12 or OC-3 Clock Generator QB 155.5MHz LVDS /QB Clock Out /QB0 QB1 /IN Bank A: 622MHz for OC-12 line card Bank B: 155.5MHz for OC-3 line card (set to


Original
PDF SY89872U 750ps 200ps
2003 - Not Available

Abstract: No abstract text available
Text: accepting a high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDS or HSTL clock input signal and dividing , typical 622MHz clock system this would provide availability of 311MHz, 155MHz, 77MHz or 38MHz auxiliary , -12 to OC-3 Translator/Divider FUNCTIONAL BLOCK DIAGRAM LVDS 622MHz Clock In Divide-by-4 LVPECL 155.5MHz Clock Out S2 /RESET Enable FF 622MHz In Q0 Enable MUX IN /Q0 , 60 80 100 120 TEMPERATURE (°C) FREQUENCY (MHz) 622MHz Output 1.25GHz Output Output Swing


Original
PDF SY89874U 250ps
1999 - VSC8113

Abstract: VSC8114QB1 PM5355 VSC8114 VSC8114QB
Text: PLL is a voltage controlled ring-oscillator with a center frequency of 622MHz. The reactive elements , the low speed parallel outputs (RXOUT[7:0]). See Figure 4. The internally generated 622MHz clock is , VSC8114 uses an integrated phase-locked loop (PLL) for clock synthesis of the 622MHz high speed clock , classic feedback system. The PFD compares the selected divided down version of the 622MHz VCO (select pin


Original
PDF VSC8114 STS-12/STM-4 08Mb/s) 08MHz G52185-0, VSC8113 VSC8114QB1 PM5355 VSC8114 VSC8114QB
2002 - lvdt

Abstract: SN65LVDM22 SN65LVDS122 SN65LVDS122D SN65LVDS122PW SN65LVDS22 SN65LVDT122 SN65LVDT122D
Text: -192) Optical Modules 622-MHz Central Office Clock Distribution Wireless Basestations Low Jitter Clock


Original
PDF SN65LVDS122 SN65LVDT122 SLLS525B SN65LVDS22 SN65LVDM22 OC-192) 622-MHz lvdt SN65LVDM22 SN65LVDS122 SN65LVDS122D SN65LVDS122PW SN65LVDT122 SN65LVDT122D
2003 - 32-PIN

Abstract: ICS8624
Text: with JEDEC Standard 65. NOTE 6: Characterized at VCO frequency of 622MHz. ps TABLE 6B. AC


Original
PDF ICS8624 ICS8624 250MHz 700MHz. 700MHz 32-PIN
resistance 33 kohm

Abstract: 0.18Um Standard cell ST horizontal output section 0.18-um CMOS technology characteristics 12v na 19.5v ST20 ST100 ST10 D950 CB65000
Text: MAC & PHY, Gigabit,.), ­ Telecommunication ( 622MHz phase aligner, clock recovery), ­ Computer and


Original
PDF CB65000 85K/mm 30nanoWatt/Gate/MHz/ resistance 33 kohm 0.18Um Standard cell ST horizontal output section 0.18-um CMOS technology characteristics 12v na 19.5v ST20 ST100 ST10 D950
2002 - 438B

Abstract: STM-64
Text: TxREFSEL (F 30) 0 1 slects a TxREFCLK frequency of 155MHz slects a TxREFCLK frequency of 622MHz , 15) 0 1 slects an RxREFCLK frequency of 155MHz slects an RxREFCLK frequency of 622MHz RxMCLKSEL (B 12) 0 1 slects the RxMCLK frequency of 155MHz slects the RxMCLK frequency of 622MHz


Original
PDF OTR370M-IR OC-192 STM-64) OTR370Mustion 3697C-0203 438B STM-64
2006 - vt6 transistor

Abstract: Exar cross fpga ethernet sgmii
Text: -12/STM-4 bit@ 622Mhz ) Serdes Interface (4x1- · Terminates and processes Section, Line and Path · Line-side Interfaces Working and protect OC-48/STM-16 Serdes Interfaces (4-bit@ 622Mhz , encapsulation/de- APPLICATIONS G-header Quad OC-12/STM-4/OC-3/STM-1 Serdes Interfaces (4x1-bit@ 622Mhz , -bit @ 622Mhz OC-48 Serdes VC VC LCAS LCAS Section/Line/ TOH Processor STS-1 Path Overhead , Processor 4x1-bit@ 622Mhz GFP GFP LAPS LAPS PPP PPP ATM ATM SDRAM Interface SPI


Original
PDF XRT95L52 EXtendAR-48M OC-48 XRT95L52) OC48/STM-16, OC-12/STM-4 OC-48/STM-16, OC-12/ vt6 transistor Exar cross fpga ethernet sgmii
2002 - 56us

Abstract: PDO15 PDO14 PDO11 OC192 MAX3971A MAX3970 MAX3953UGK MAX3953 VCO at 15GHZ
Text: OF PCLKO AT 622MHz 1 0 0 5000 10,000 15,000 20,000 POWER-SUPPLY FREQUENCY (kHz


Original
PDF 10Gbps 953Gbps/10 3125Gbps 75UIP-P 16-Bit 100mVP-P MAX3953 rate/64 rate/16 10x10x09 56us PDO15 PDO14 PDO11 OC192 MAX3971A MAX3970 MAX3953UGK VCO at 15GHZ
XR2206 application notes

Abstract: pin diagram of ic xr2206 IC XR2206 XR2206 XR2206 pin details for function generator XR2206 monolithic function generator xr2206 circuit peb1756ae fsk modulation and demodulation using Xr2206 MXP2
Text: high performance low jitter 155MHz, 312MHz and 622MHz clock sources ideal for SONET & SDH, Gigabit


Original
PDF acqui010 350MHz XRT8020 XRT85L61 QFN-16 TSSOP-28 XR2206 application notes pin diagram of ic xr2206 IC XR2206 XR2206 XR2206 pin details for function generator XR2206 monolithic function generator xr2206 circuit peb1756ae fsk modulation and demodulation using Xr2206 MXP2
1995 - EXC16

Abstract: all ic data MAX3270 MAX3270EMH Phase Frequency detector
Text: into the PLL and always operates at 622MHz. The center frequency is tightly controlled by laser , clock rates of 155MHz and 622MHz. F(s) Gm FILP FILG Rf s Gm ( _ + 1) wz F(s) = , MAX3270 1 0 155MHz MUX 1 0 INPUT 0 622MHz 1 EXC 1 RST CRS Figure 1


Original
PDF 155Mbps/622Mbps 155Mbps 622Mbps MAX3270 MAX3270 EXC16 all ic data MAX3270EMH Phase Frequency detector
2007 - smd code HF transistor

Abstract: S357 A3 smd transistor SMD HF SMD HF transistor S 357
Text: 3.3 @100MHz, 3.3V @ 622MHz , 3.3V 20 years See Chart First Year 10 years CMOS, PECL, LVDS


Original
PDF 0710E MIL-STD-202, MIL-STD-883, 1x10-8 smd code HF transistor S357 A3 smd transistor SMD HF SMD HF transistor S 357
2004 - Not Available

Abstract: No abstract text available
Text: FREQUENCY DETECTOR ÷M ÷N REF 622MHz CHARGE PUMP OSC VCO LPF CML DRIVER ÷R


Original
PDF AD9956 48-lead 48-bit 14-bit CP-48) AD9956YCPZ1 AD9956YCPZ-REEL1 AD9956/PCB
2005 - Not Available

Abstract: No abstract text available
Text: , low-jitter device is capable of accepting a high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDS or HSTL , , multiprocessor servers CML/LVPECL/LVDS 622MHz Clock In FUNCTIONAL BLOCK DIAGRAM Divide-by-4 LVDS 155.5MHz Clock Out S2 622MHz In /RESET Enable IN FF Q0 Enable MUX /Q0 MUX 50 , CHARACTERISTICS (Continued) VCC = 2.5V, TA = 25° unless otherwise stated. C, 622MHz Output Output Swing


Original
PDF SY89875U 200ps 10psPP M9999-082407
2005 - Not Available

Abstract: No abstract text available
Text: tJITTER RMS Phase Jitter Output = 622MHz Integration Range: 12kHz - 20MHz tr, tf Output Rise , (Typical) OFFSET FREQUENCY (Hz) Phase Noise Plot: 622MHz @ 3.3V M9999-102711 hbwhelp@micrel.com or


Original
PDF 400mV SY58039U 490ps 100mV) 400mV M9999-102711
2007 - Not Available

Abstract: No abstract text available
Text: clock from a 622MHz , 155.5MHz, 77.8MHz, or 38.9MHz reference clock. A selectable dual VCO allows , Parallel to 2.5Gbps/2.7Gbps Serial Conversion 622MHz /667MHz or 311MHz/333MHz Clock Input On-Chip Clock , and CML outputs open. AC characteristics are guaranteed by design and characterization. In 622MHz clock mode, the parallel data is clocked in by the rising edge of the 622MHz /666MHz parallel clock input , 200 1.4 PATTERN = 00001111 1.2 JITTER GENERATION (psRMS) 1.0 0.8 0.6 0.4 0.2 0 fRCLK = 622MHz


Original
PDF MAX3892 622Mbps 622MHz, MAX3882 MAX3892
2003 - 1N60H

Abstract: PM94s 1k79h 1N6A SARC chipset 0k77 L5 diodes 4004 F AH32 GFP
Text: No file text available


Original
PDF 9953-POS PMC-2030245, 9953-POS PM5392 PMC-2030245 34x34 1N60H PM94s 1k79h 1N6A SARC chipset 0k77 L5 diodes 4004 F AH32 GFP
Supplyframe Tracking Pixel