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Part ECAD Model Manufacturer Description Datasheet Download Buy Part
TUSB6250PFCR TUSB6250PFCR ECAD Model Texas Instruments USB 2.0 Low-Power, High-Speed ATA/ATAPI Bridge Solution 80-TQFP
TSB42AA9PZTR TSB42AA9PZTR ECAD Model Texas Instruments High-Performance 1394 Link-Layer Controller for ATAPI/ATA Storage Products 100-TQFP 0 to 70
TUSB6250PFCG4 TUSB6250PFCG4 ECAD Model Texas Instruments USB 2.0 Low-Power, High-Speed ATA/ATAPI Bridge Solution 80-TQFP 0 to 70
TSB42AA9PZT TSB42AA9PZT ECAD Model Texas Instruments High-Performance 1394 Link-Layer Controller for ATAPI/ATA Storage Products 100-TQFP 0 to 70
TUSB6250PFC TUSB6250PFC ECAD Model Texas Instruments USB 2.0 Low-Power, High-Speed ATA/ATAPI Bridge Solution 80-TQFP 0 to 70
0580030000 0580030000 ECAD Model Molex CONNECTOR GUIDE PIN

50-pin ATAPI dimensions Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2005 - GL811E

Abstract: No abstract text available
Text: / ATAPI Bridge Controller LIST OF FIGURES FIGURE 3.1 - 48 PIN LQFP/TQFP PINOUT DIAGRAM , ATA/ ATAPI Bridge Controller CHAPTER 3 PIN ASSIGNMENT DIOW_ DIOR_ IORDY DMACK , ATA/ ATAPI Bridge Controller 3.2 Pin Descriptions Table 3.1 - Pin Descriptions Pin Name 48Pin , / ATAPI reset input, (*) When Reset pin is pulled low, the IDE bus will be in tri-state. (*) RREF , Genesys Logic, Inc. GL811E USB 2.0 to ATA / ATAPI Bridge Controller Datasheet Revision


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PDF GL811E GL811E 48-pin 64-pin
2004 - GL811E

Abstract: dmf 612 GL811 ata PINOUTS
Text: / ATAPI Bridge Controller LIST OF FIGURES FIGURE 3.1 - 48 PIN LQFP/TQFP PINOUT DIAGRAM , reserved. Page 8 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller CHAPTER 3 PIN ASSIGNMENT , . Page 10 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller 3.2 Pin Descriptions Table 3.1 - Pin , mode: GPIO7 is the ATA/ ATAPI reset input, (*) When Reset pin is pulled low, the IDE bus will be in , Genesys Logic, Inc. GL811E USB 2.0 to ATA / ATAPI Bridge Controller Datasheet Revision


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PDF GL811E GL811E 48-pin 64-pin dmf 612 GL811 ata PINOUTS
2003 - GL811

Abstract: GL811E ide usb cable pinouts CONTROLLER-12MHZ
Text: to ATA/ ATAPI Bridge Controller CHAPTER 3 PIN ASSIGNMENT DIOW_ DIOR_ IORDY DMACK , reserved. Page 11 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller 3.2 Pin Descriptions Table 3.1 - , mode: GPIO7 is the ATA/ ATAPI reset input, (*) When Reset pin is pulled low, the IDE bus will be in , Genesys Logic, Inc. GL811E USB 2.0 to ATA / ATAPI Bridge Controller Datasheet Revision 1.11 Nov. 27, 2003 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller Copyright: Copyright © 2003


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PDF GL811E GL811E AND08 50BASIC 020BASIC 48-pin GL811 ide usb cable pinouts CONTROLLER-12MHZ
2007 - ide usb cable pinouts

Abstract: DD10 DD11 DD12 DD15 GL811S 3724N
Text: . Page 4 GL811S USB2.0 to ATA/ ATAPI Bridge Controller LIST OF FIGURES FIGURE 3.1 - 48 PIN LQFP , . - All rights reserved. P Type 51 I Pin Name Page 11 GL811S USB2.0 to ATA/ ATAPI , mode Input ATA/ ATAPI Interface Pin Name Pin # Type 43,45,47, 2,5,8,10,1 2,11,9,6,4, 1,46 , GL811S USB2.0 to ATA/ ATAPI Bridge Controller Miscellaneous Interface Pin Name Pin # GPIO 1 48 , USB2.0 to ATA/ ATAPI Bridge Controller ATA/ ATAPI Interface Pin Name Pin # Type 57,59,61, 2


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PDF GL811S GL811S GL811S-MNGXX 48-pin GL811S-MSGXX 64-pin ide usb cable pinouts DD10 DD11 DD12 DD15 3724N
2004 - Not Available

Abstract: No abstract text available
Text: to ATA/ ATAPI Bridge Controller CHAPTER 3 PIN ASSIGNMENT DIOW_ DIOR_ IORDY DMACK , rights reserved. Page 10 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller 3.2 Pin Descriptions Table , operating in default mode: GPIO7 is the ATA/ ATAPI reset input, (*) When Reset pin is pulled low, the IDE , Genesys Logic, Inc. GL811E USB 2.0 to ATA / ATAPI Bridge Controller Datasheet Revision 1.11 Nov. 27, 2003 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller Copyright: Copyright © 2004


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PDF GL811E GL811E AND008 48-pin 64-pin
2006 - GL811

Abstract: GL811E
Text: GL811E USB 2.0 to ATA/ ATAPI Bridge Controller CHAPTER 3 PIN ASSIGNMENT X2 12 CBLID_ 25 , 10 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller 3.2 Pin Descriptions Table 3.1 - Pin , mode: GPIO7 is the ATA/ ATAPI reset input , 5V tolerance. (*) When Reset pin is pulled low, the IDE , Genesys Logic, Inc. GL811E USB 2.0 to ATA / ATAPI Bridge Controller Datasheet Revision 1.25 May. 03, 2006 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller Copyright: Copyright © 2006


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PDF GL811E GL811E 64-pin 48-pin GL811
2006 - Not Available

Abstract: No abstract text available
Text: GL811S USB2.0 to ATA/ ATAPI Bridge Controller CHAPTER 3 PIN ASSIGNMENT DMACK_ INTRQ DA1 , USB2.0 to ATA/ ATAPI Bridge Controller 3.2 Pin List Table 3.1 - 48 Pin List Pin # Pin Name Type Pin , Test mode Input ATA/ ATAPI Interface Pin Name Pin # Type 43,45,47, 2,5,8,10,1 2,11,9,6,4 , USB2.0 to ATA/ ATAPI Bridge Controller Miscellaneous Interface Pin Name Pin # GPIO 1 48 , USB2.0 to ATA/ ATAPI Bridge Controller ATA/ ATAPI Interface Pin Name Pin # Type 57,59,61, 2


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PDF GL811S GL811S 48-pin 64-pin
2004 - Not Available

Abstract: No abstract text available
Text: / ATAPI Bridge Controller LIST OF FIGURES FIGURE 3.1 - 48 PIN LQFP PINOUT DIAGRAM , All rights reserved. Page 10 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller 3.2 Pin Descriptions , . (*) When operating in default mode: GPIO7 is the ATA/ ATAPI reset input, (*) When Reset pin is pulled , Genesys Logic, Inc. GL811E USB 2.0 to ATA / ATAPI Bridge Controller Datasheet Revision 1.21 Sep. 23, 2004 GL811E USB 2.0 to ATA/ ATAPI Bridge Controller Copyright: Copyright © 2004


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PDF GL811E GL811E 48-pin 64-pin
2004 - USB97C202-MD-05

Abstract: mp3 player circuit diagram with 8051 8051 PID controller interfacing 8051 mp3 player circuit diagram Y1 XTAL 12Mhz MA10 USB97C202 USB97C202-MN-03 USB97C202-MN-04 USB97C202-MN-05
Text: /EE_CLK nTEST0 Revision 1.6 (11-05-04) USB 2.0 ATA/ ATAPI Controller Datasheet Pin , pins USB 2.0 ATA/ ATAPI Controller Datasheet Chapter 5 Pin Descriptions Table 5.1 - , INTERFACE IS This pin is the active high DMA request from the ATA/ ATAPI interface. O20 This pin is the , IDE_SA0 O20 This pin is the register select address bit 0 signal for the ATA/ ATAPI interface. In , the ATA/ ATAPI interface. In part number USB97C202-MN-03 or later ROM codes, this pin is high


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PDF USB97C202 12Mhz 2048GB USB97C202-MD-05 mp3 player circuit diagram with 8051 8051 PID controller interfacing 8051 mp3 player circuit diagram Y1 XTAL 12Mhz MA10 USB97C202 USB97C202-MN-03 USB97C202-MN-04 USB97C202-MN-05
2004 - USB97C202-MN-04

Abstract: interfacing 8051 with eprom and rom
Text: active high DMA request from the ATA/ ATAPI interface. O20 This pin is the active low read signal for the , O20 This pin is the register select address bit 1 signal for the ATA/ ATAPI interface. In part , / ATAPI interface. In part number USB97C202-MN-03 or later ROM codes, this pin is high impedance when , bit 2 signal for the ATA/ ATAPI interface. In part number USB97C202-MN-03 or later ROM codes, this pin , This pin is active low write signal for the ATA/ ATAPI interface. In part number USB97C202-MN-03 or


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PDF USB97C202 Boota16 USB97C202 USB97C202-MN-04 interfacing 8051 with eprom and rom
1997 - Not Available

Abstract: No abstract text available
Text: The LC895196 can be set to the opposite of the ATAPI pin layout using the setting of pin 29. Pin 29 , IO6 B 29 ATPINSEL I 30 IO7 B ATAPI pin assignment select pin . Connect to VSS0 , and STOP output Test input pin . Connect to VSS. 63 CSEL I ATAPI control signal 64 , 28 IO6 B 29 ATPINSEL I 30 IO7 B ATAPI pin assignment select pin . Connect , XTALCK1 1/1, 1/2 and STOP output Test input pin . Connect to VSS. 63 CSEL I ATAPI control


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PDF LC895196 LC895196 3214-SQFP144
1999 - 50 pin ATAPI

Abstract: No abstract text available
Text: P 5.0 V 119 VDD0 P 5.0 V 120 VSS0 P ATAPI data bus Test pin . This pin must be connected to VSS in normal operation. ATAPI pin layout selection. This pin must be connected , 5.0 V 120 VSS0 P ATAPI control signal Test pin . This pin must be connected to VSS in normal operation. ATAPI pin layout selection. This pin must be connected to VDD0. · Unused ("NC" , Ordering number : ENN6237 CMOS IC LC895198 CD-ROM Decoder for 32× ATAPI (IDE) Drives


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PDF ENN6237 LC895198 LC895198 3237-LQFP120 LC895198] 50 pin ATAPI
2000 - smoke detector using microcontroller

Abstract: lc895199 LC895199-MK2 50 pin ATAPI 62383
Text: ATAPI pin layout selection. (This pin must be connected to VSS0.) Continued on next page. No. 6238-7 , data bus ATAPI pin layout selection. (This pin must be connected to VDD0.) 103 ATPINSEL I , Ordering number : ENN6238 CMOS IC LC895199K 32× CD-ROM Decoder with ATAPI (IDE) Interface Overview The LC895199K is a CD-ROM decoder IC that provides subcode read functions and an ATAPI interface integrated on the same chip. Functions CD-ROM ECC function Subcode read function ATA-PI (IDE) I/F


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PDF ENN6238 LC895199K LC895199K 3214-SQFP144 LC895199K] smoke detector using microcontroller lc895199 LC895199-MK2 50 pin ATAPI 62383
2009 - SQFP144

Abstract: WD25C32 DD15 LC895196 R118
Text: the ATAPI pin layout using the setting of pin 29. Pin 29 ATPINSEL = 0 I: Input pin B: Bi-directional , buffer DRAM Address signal output pins to the data buffer DRAM ATAPI pin assignment select pin , ATAPI data bus ATAPI data bus P ATAPI data bus Leave the NC pins OPEN. Those pin names , buffer DRAM Address signal output pin to the data buffer DRAM ATAPI pin assignment select pin , 142 ATAPI data bus P ATAPI control signals Leave the NC pins OPEN. Those pin names


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PDF LC895196 LC895196 3214-SQFP144 SQFP144 WD25C32 DD15 R118
1997 - Not Available

Abstract: No abstract text available
Text: /12 LC895196K Pin Functions The LC895196K can be set to the opposite of the ATAPI pin layout , 29 ATPINSEL I 30 IO7 B ATAPI pin assignment select pin . Connect to VSS0. 31 , B 144 VDD ATAPI data bus P ATAPI data bus Leave the NC pins OPEN. Those pin names , 28 IO6 B 29 ATPINSEL I 30 IO7 B ATAPI pin assignment select pin . Connect , Test input pin . Connect to VSS. 63 CSEL I ATAPI control signal 64 ZRSTIC O


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PDF LC895196K LC895196K 3214-SQFP144 LC895196K]
Not Available

Abstract: No abstract text available
Text: compatibility Package Dimensions unit: mm Features 3214-SQFP144 • Built-in ATA-PI (IDE) interface , to the opposite of the ATAPI pin layout using the setting of pin 29. Pin 29 ATPINSEL = 0 I: Input , Address signal output pins to the data buffer DRAM ATAPI pin assignment select pin . Connect to Vsso , output XTALCK1 1/1,1/2 and STOP output Test input pin . Connect to Vss. 63 CSEL 1 ATAPI , Vdd P ATAPI data bus ATAPI data bus Leave the NC pins OPEN. Those pin names starting with


OCR Scan
PDF LC895196 100Z23
895196

Abstract: No abstract text available
Text: LC895196K Pin Functions The LC895196K can be set to the opposite of the ATAPI pin layout using the , . Built-in pull-up resistor. Data I/O pin to the data buffer DRAM. Built-in pull-up resistor. ATAPI pin , P B B B NC P P P NC NC Data I/O pin to the data buffer DRAM. Built-in pull-up resistor ATAPI pin , Ordering number : EN *5852 C M O S LSI LC895196K s a H v o i ATA-PI , equipped with CD-ROM functions and an internal ATAPI (IDE) interface. decoding, CD-R compatibility) · Built


OCR Scan
PDF LC895196K 895196K 3214-SQFP144 LC895196K] 895196
2004 - 39VF512-70

Abstract: 8051 mp3 player circuit diagram MA10 MA13 USB97C202 USB97C202-MN-03 USB97C202-MN-04
Text: /EE_CLK nTEST0 Revision 1.5 (02-04-04) USB 2.0 ATA/ ATAPI Controller Datasheet Pin , pins USB 2.0 ATA/ ATAPI Controller Datasheet Chapter 5 Pin Descriptions Table 5.1 - , INTERFACE IS This pin is the active high DMA request from the ATA/ ATAPI interface. O20 This pin is the , IDE_SA0 O20 This pin is the register select address bit 0 signal for the ATA/ ATAPI interface. In , the ATA/ ATAPI interface. In part number USB97C202-MN-03 or later ROM codes, this pin is high


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PDF USB97C202 12Mhz 2048GB 39VF512-70 8051 mp3 player circuit diagram MA10 MA13 USB97C202 USB97C202-MN-03 USB97C202-MN-04
2004 - MA11

Abstract: MA12 MA13 USB97C202 USB97C202-MN-02 MA10
Text: / ATAPI Controller Datasheet Chapter 2 Pin Table DISK DRIVE INTERFACE (27 Pins) IDE_D0 IDE_D1 , /EE_CLK nTEST/nDBGSTR Revision 1.2 (02-04-04) USB 2.0 ATA/ ATAPI Controller Datasheet Pin , pins USB 2.0 ATA/ ATAPI Controller Datasheet Chapter 5 Pin Descriptions Table 5.1 ­ , / ATAPI interface. IDE DMA Request IDE_DRQ IDE IO Read Strobe IDE_nIOR O20 This pin is , pin is the register select address bit 1 signal for the ATA/ ATAPI interface. IDE Register Address


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PDF USB97C202 12Mhz MA11 MA12 MA13 USB97C202 USB97C202-MN-02 MA10
2003 - Not Available

Abstract: No abstract text available
Text: active high DMA request from the ATA/ ATAPI interface. O20 This pin is the active low read signal for the interface. This pin is the register select address bit 1 signal for the ATA/ ATAPI interface. This pin is the register select address bit 0 signal for the ATA/ ATAPI interface. This pin is the register select address bit 2 signal for the ATA/ ATAPI interface. This pin is the bi-directional data bus bit 15 signal for the ATA/ ATAPI interface. This pin is active low write signal for the ATA/ ATAPI interface. This pin is


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PDF USB97C202
2003 - Not Available

Abstract: No abstract text available
Text: / ATAPI Controller Datasheet List of Figures Figure 3.1 ­ 100 PIN STQFP , INTERFACE IS This pin is the active high DMA request from the ATA/ ATAPI interface. O20 This pin is the , the ATA/ ATAPI interface. In part number USB97C202-MN-03 or later ROM codes, this pin is high , This pin is the register select address bit 2 signal for the ATA/ ATAPI interface. In part number , IO20 This pin is the bi-directional data bus bit 15 signal for the ATA/ ATAPI interface. In part


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PDF USB97C202 USB97C202
2003 - Datasheet-03/dioxb60

Abstract: No abstract text available
Text: active high DMA request from the ATA/ ATAPI interface. O20 This pin is the active low read signal for the , O20 This pin is the register select address bit 1 signal for the ATA/ ATAPI interface. In part , / ATAPI interface. In part number USB97C202-MN-03 or later ROM codes, this pin is high impedance when , bit 2 signal for the ATA/ ATAPI interface. In part number USB97C202-MN-03 or later ROM codes, this pin , This pin is active low write signal for the ATA/ ATAPI interface. In part number USB97C202-MN-03 or


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PDF USB97C202 USB97C202 Datasheet-03/dioxb60
2003 - Not Available

Abstract: No abstract text available
Text: INTERFACE IS This pin is the active high DMA request from the ATA/ ATAPI interface. O20 This pin is the , ATA/ ATAPI interface. This pin is the register select address bit 0 signal for the ATA/ ATAPI interface. This pin is the register select address bit 2 signal for the ATA/ ATAPI interface. This pin is the bi-directional data bus bit 15 signal for the ATA/ ATAPI interface. This pin is active low write signal for the ATA/ ATAPI interface. This pin is the active low DMA acknowledge signal for the ATA/ ATAPI interface


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PDF USB97C202
1997 - RPEN

Abstract: DD10 DD11 RA12 RA13 W88111AF W88112F rspc decoder byte
Text: after Packet FIFO receives any data issued by the host through ATAPI Data port. UINTb( pin 36) is , W88111AF/W88112F ATAPI CD-ROM Decoder & Controller Preliminary/Confidential This specification , BLOCK PIN CONFIGURATION PIN DESCRIPTIONS , Release Date: Aug, 1996 Preliminary/Confidential Revision A0.1 W88111AF/W88112F ATAPI CD-ROM Decoder


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PDF W88111AF/W88112F RPEN DD10 DD11 RA12 RA13 W88111AF W88112F rspc decoder byte
2007 - 8051 mp3 player circuit diagram

Abstract: USB97C202 100-PIN MA10 MA13 USB97C202-MV-05 DVD player circuit diagram
Text: /EE_CLK nTEST0 Revision 1.6 (01-09-07) USB 2.0 ATA/ ATAPI Controller Datasheet Pin , pins USB 2.0 ATA/ ATAPI Controller Datasheet Chapter 5 Pin Descriptions Table 5.1 - , INTERFACE IS This pin is the active high DMA request from the ATA/ ATAPI interface. O20 This pin is the , IDE_SA0 O20 This pin is the register select address bit 0 signal for the ATA/ ATAPI interface. In , the ATA/ ATAPI interface. In part number USB97C202-MN-03 or later ROM codes, this pin is high


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PDF USB97C202 12Mhz 2048GB 8051 mp3 player circuit diagram USB97C202 100-PIN MA10 MA13 USB97C202-MV-05 DVD player circuit diagram
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