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ADN2855ACPZ ADN2855ACPZ ECAD Model Analog Devices Inc Multirate 155 Mbps/622 Mbps/1244 Mbps/1250 Mbps Burst Mode Clock and Data Recovery IC with Deserializerer

496-MBps-Burst Datasheets Context Search

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1997 - 5962-9678901

Abstract: No abstract text available
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D ­ JULY 1997 ­ REVISED OCTOBER 2001 D D D D D D D D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor , Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules r Zero-Wait-State , : r 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word 5962-9678901
1997 - SMJ320C40

Abstract: SMJ320MCM42C SMJ320MCM42D
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001 ­ JULY 1997 D D D D D D D D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual 'C40 Performance With Local Memory Requiring Only 8.7


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word SMJ320MCM42C SMJ320MCM42D
1997 - SPRU063

Abstract: SMJ320MCM42C SMJ320MCM42D SMJ320C40
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001 ­ JULY 1997 D D D D D D D D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual 'C40 Performance With Local Memory Requiring Only 8.7


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word SPRU063 SMJ320MCM42C SMJ320MCM42D
1997 - 84 PIN CERAMIC QUAD FLAT PACK TEXAS INSTRUMENTS

Abstract: block diagram of of TMS320C4X Architecture of TMS320C4X Architecture of TMS320C4X FLOATING POINT PROCESSOR TJA 251 TMS320C4X FLOATING POINT PROCESSOR block diagram SMJ320C40 SMJ320MCM42C SMJ320MCM42D
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001B ­ JULY 1997 ­ REVISED FEBRUARY 2000 D Performance: D D D D D D D ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual 'C40 Performance With Local


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001B 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word 84 PIN CERAMIC QUAD FLAT PACK TEXAS INSTRUMENTS block diagram of of TMS320C4X Architecture of TMS320C4X Architecture of TMS320C4X FLOATING POINT PROCESSOR TJA 251 TMS320C4X FLOATING POINT PROCESSOR block diagram SMJ320MCM42C SMJ320MCM42D
1997 - ti c40 architecture

Abstract: Architecture of TMS320C4X FLOATING POINT PROCESSOR block diagram of of TMS320C4X TJA 251 SMJ320C40 SMJ320MCM42C SMJ320MCM42D
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001A ­ JULY 1997 ­ REVISED APRIL 1999 D D D D D D D D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual 'C40 Performance With Local


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001A 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word ti c40 architecture Architecture of TMS320C4X FLOATING POINT PROCESSOR block diagram of of TMS320C4X TJA 251 SMJ320MCM42C SMJ320MCM42D
1997 - SMJ320C40

Abstract: SMJ320MCM42C SMJ320MCM42D
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D - JULY 1997 - REVISED OCTOBER 2001 D Performance: D D D D D D D - 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules - Zero-Wait-State Local Memory for Each Processor Organization: - 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) - 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word SMJ320MCM42C SMJ320MCM42D
1997 - Not Available

Abstract: No abstract text available
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D - JULY 1997 - REVISED OCTOBER 2001 D Performance: D D D D D D D - 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules - Zero-Wait-State Local Memory for Each Processor Organization: - 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) - 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word
Not Available

Abstract: No abstract text available
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001 - JULY 1997 I · I I I · Performance: - 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules - Zero-Wait-State Local Memory for Each Processor Organization: - 128K-Word x 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) - 256K-Word x 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual 'C40 Performance With Local Memory Requiring Only 8.7 Square Inches of Board Space Enhanced


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word
1997 - SPRU063

Abstract: SMJ320C40 SMJ320MCM42C SMJ320MCM42D A30C4 D11C4 A11C4 MCM42
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D ­ JULY 1997 ­ REVISED OCTOBER 2001 D D D D D D D D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word SPRU063 SMJ320MCM42C SMJ320MCM42D A30C4 D11C4 A11C4 MCM42
1997 - Not Available

Abstract: No abstract text available
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D - JULY 1997 - REVISED OCTOBER 2001 D Performance: D D D D D D D - 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules - Zero-Wait-State Local Memory for Each Processor Organization: - 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) - 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local Memory


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word
1997 - D19C

Abstract: footprint cfp 48
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D ­ JULY 1997 ­ REVISED OCTOBER 2001 D D D D D D D D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local Memory Requiring Only 8.7 Square


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word D19C footprint cfp 48
1997 - SMJ320C40

Abstract: SMJ320MCM42C SMJ320MCM42D
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D ­ JULY 1997 ­ REVISED OCTOBER 2001 D D D D D D D D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word SMJ320MCM42C SMJ320MCM42D
1997 - IEEE ANSI 42.40

Abstract: No abstract text available
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001C ­ JULY 1997 ­ REVISED AUGUST 2001 D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local Memory Requiring Only 8.7 Square Inches of


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001C 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word IEEE ANSI 42.40
1997 - Not Available

Abstract: No abstract text available
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D - JULY 1997 - REVISED OCTOBER 2001 D Performance: D D D D D D D - 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules - Zero-Wait-State Local Memory for Each Processor Organization: - 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) - 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local Memory


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word
1997 - Not Available

Abstract: No abstract text available
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D ­ JULY 1997 ­ REVISED OCTOBER 2001 D D D D D D D D Performance: ­ 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules ­ Zero-Wait-State Local Memory for Each Processor Organization: ­ 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) ­ 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local Memory Requiring Only 8.7 Square


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word
1997 - Not Available

Abstract: No abstract text available
Text: SMJ320MCM42C, SMJ320MCM42D DUAL SMJ320C40 MULTICHIP MODULE SGKS001D - JULY 1997 - REVISED OCTOBER 2001 D Performance: D D D D D D D - 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules - Zero-Wait-State Local Memory for Each Processor Organization: - 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) - 256K-Word × 32-Bit SRAM (SMJ320MCM42C) Compliant With MIL-PRF-38535 QML Dual C40 Performance With Local Memory


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PDF SMJ320MCM42C, SMJ320MCM42D SMJ320C40 SGKS001D 496-MBps-Burst 40-MHz 128K-Word 32-Bit SMJ320MCM42D) 256K-Word
Not Available

Abstract: No abstract text available
Text: No file text available


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PDF 23456789AB9B1CDE143F 345678491A1BCD6E6F491 6451B 4565D 891D4EC4 B896D6B851 41BCD6 8142D 17BB91 5D486871DB1
2008 - eMIOS channel is set up to drive the eTPU

Abstract: No abstract text available
Text: No file text available


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PDF SPC563M60L5 SPC563M60B2 32-bit eMIOS channel is set up to drive the eTPU
2005 - MPC5553

Abstract: MPC5553 Circuit MPC5553 instruction set mpc5554 emios MPC5500 MPC5554 MPC5553 instructions mpc5554 ebi MPC5534 MPC500
Text: No file text available


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PDF MPC5553 32-bit e200z6 32-channel MPC5553PB MPC5534 MPC5553 Circuit MPC5553 instruction set mpc5554 emios MPC5500 MPC5554 MPC5553 instructions mpc5554 ebi MPC500
2006 - pittman DC Motor

Abstract: MPC5554EVB dc motor 9v DC MOTOR SPEED CONTROLLER PITTMAN encoder MPC5533 MPC5534 MPC5553 MPC5554 rev MPC5554DEMO
Text: No file text available


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PDF MPC5554 MPC5554 AN3007 MPC551x MPC5533 MPC5534 MPC5553 MPC5554, MPC5565, pittman DC Motor MPC5554EVB dc motor 9v DC MOTOR SPEED CONTROLLER PITTMAN encoder MPC5534 MPC5554 rev MPC5554DEMO
IH-035

Abstract: marking 702x
Text: No file text available


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PDF l2i25l KLEC-66RSTD VER01 dCHU--6KQP95 VER02 IH-035 marking 702x
2008 - OP 400 GP

Abstract: No abstract text available
Text: No file text available


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PDF UL1054 125VAC; 250VAC; 125VDC; 250VDC 250VDC GPTBRG11 OP 400 GP
PSC-3-13-39

Abstract: No abstract text available
Text: No file text available


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PDF PSC-3-13-39+ PSC-3-13-39
2006 - MPC5554

Abstract: IB23810 mode discrete test mpc551x Flasher DC MOTOR 100 R.P.M., 12v motion quadrature encoder chip MPC5554 GPIO AN3005 HEDS-5640 MPC5533
Text: No file text available


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PDF MPC5554 MPC5554 AN3005 MPC551x MPC5533 MPC5534 MPC5553 MPC5554, MPC5565 IB23810 mode discrete test mpc551x Flasher DC MOTOR 100 R.P.M., 12v motion quadrature encoder chip MPC5554 GPIO AN3005 HEDS-5640
2004 - dspic spi

Abstract: mpc551x SPI MPC55XX JTAG MPC5533 MPC5554 mpc5554 ebi MPC55XX CONFIG MPC5500 MPC5534 MPC5553
Text: No file text available


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PDF AN2867 MPC5500 MPC55xx MPC55xx MPC551x MPC5533 MPC5534 MPC5553 MPC5554, dspic spi mpc551x SPI MPC55XX JTAG MPC5554 mpc5554 ebi MPC55XX CONFIG
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